Lines Matching refs:APB1ENR2

1543                                            SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_CRSEN);\
1551                                            SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_MDIOSEN);\
1559                                            SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_FDCANEN);\
1567                                            SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_UCPD1EN);\
1621 #define __HAL_RCC_CRS_CLK_DISABLE()    CLEAR_BIT(RCC->APB1ENR2, RCC_APB1ENR2_CRSEN)
1623 #define __HAL_RCC_MDIOS_CLK_DISABLE()  CLEAR_BIT(RCC->APB1ENR2, RCC_APB1ENR2_MDIOSEN)
1625 #define __HAL_RCC_FDCAN_CLK_DISABLE()  CLEAR_BIT(RCC->APB1ENR2, RCC_APB1ENR2_FDCANEN)
1627 #define __HAL_RCC_UCPD1_CLK_DISABLE()  CLEAR_BIT(RCC->APB1ENR2, RCC_APB1ENR2_UCPD1EN)
2127 #define __HAL_RCC_CRS_IS_CLK_ENABLED()     (READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_CRSEN) != 0U)
2129 #define __HAL_RCC_MDIOS_IS_CLK_ENABLED()   (READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_MDIOSEN) != 0U)
2131 #define __HAL_RCC_FDCAN_IS_CLK_ENABLED()   (READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_FDCANEN) != 0U)
2133 #define __HAL_RCC_UCPD1_IS_CLK_ENABLED()   (READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_UCPD1EN) != 0U)