569   uint32_t tmpccmr1;  in LL_TIM_ENCODER_Init()  local
588   tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);  in LL_TIM_ENCODER_Init()
594   tmpccmr1 &= (uint32_t)~(TIM_CCMR1_CC1S | TIM_CCMR1_IC1F  | TIM_CCMR1_IC1PSC);  in LL_TIM_ENCODER_Init()
595   tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1ActiveInput >> 16U);  in LL_TIM_ENCODER_Init()
596   tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1Filter >> 16U);  in LL_TIM_ENCODER_Init()
597   tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1Prescaler >> 16U);  in LL_TIM_ENCODER_Init()
600   tmpccmr1 &= (uint32_t)~(TIM_CCMR1_CC2S | TIM_CCMR1_IC2F  | TIM_CCMR1_IC2PSC);  in LL_TIM_ENCODER_Init()
601   tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2ActiveInput >> 8U);  in LL_TIM_ENCODER_Init()
602   tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2Filter >> 8U);  in LL_TIM_ENCODER_Init()
603   tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2Prescaler >> 8U);  in LL_TIM_ENCODER_Init()
615   LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);  in LL_TIM_ENCODER_Init()
663   uint32_t tmpccmr1;  in LL_TIM_HALLSENSOR_Init()  local
680   tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);  in LL_TIM_HALLSENSOR_Init()
700   tmpccmr1 &= (uint32_t)~(TIM_CCMR1_CC1S | TIM_CCMR1_IC1F  | TIM_CCMR1_IC1PSC);  in LL_TIM_HALLSENSOR_Init()
701   tmpccmr1 |= (uint32_t)(LL_TIM_ACTIVEINPUT_TRC >> 16U);  in LL_TIM_HALLSENSOR_Init()
702   tmpccmr1 |= (uint32_t)(TIM_HallSensorInitStruct->IC1Filter >> 16U);  in LL_TIM_HALLSENSOR_Init()
703   tmpccmr1 |= (uint32_t)(TIM_HallSensorInitStruct->IC1Prescaler >> 16U);  in LL_TIM_HALLSENSOR_Init()
706   tmpccmr1 &= (uint32_t)~(TIM_CCMR1_OC2M | TIM_CCMR1_OC2FE  | TIM_CCMR1_OC2PE  | TIM_CCMR1_OC2CE);  in LL_TIM_HALLSENSOR_Init()
707   tmpccmr1 |= (uint32_t)(LL_TIM_OCMODE_PWM2 << 8U);  in LL_TIM_HALLSENSOR_Init()
721   LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);  in LL_TIM_HALLSENSOR_Init()
844   uint32_t tmpccmr1;  in OC1Config()  local
864   tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);  in OC1Config()
867   CLEAR_BIT(tmpccmr1, TIM_CCMR1_CC1S);  in OC1Config()
870   MODIFY_REG(tmpccmr1, TIM_CCMR1_OC1M, TIM_OCInitStruct->OCMode);  in OC1Config()
902   LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);  in OC1Config()
923   uint32_t tmpccmr1;  in OC2Config()  local
943   tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);  in OC2Config()
946   CLEAR_BIT(tmpccmr1, TIM_CCMR1_CC2S);  in OC2Config()
949   MODIFY_REG(tmpccmr1, TIM_CCMR1_OC2M, TIM_OCInitStruct->OCMode << 8U);  in OC2Config()
981   LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);  in OC2Config()