Lines Matching refs:regval
1549 uint32_t regval; in HAL_RCC_GetOscConfig() local
1561 regval = RCC->CR; in HAL_RCC_GetOscConfig()
1564 pOscInitStruct->HSEState = (regval & (RCC_CR_HSEON | RCC_CR_HSEBYP | RCC_CR_HSEEXT)); in HAL_RCC_GetOscConfig()
1567 pOscInitStruct->CSIState = regval & RCC_CR_CSION; in HAL_RCC_GetOscConfig()
1570 pOscInitStruct->HSIState = regval & RCC_CR_HSION; in HAL_RCC_GetOscConfig()
1571 pOscInitStruct->HSIDiv = regval & RCC_CR_HSIDIV; in HAL_RCC_GetOscConfig()
1576 regval = RCC->BDCR; in HAL_RCC_GetOscConfig()
1579 pOscInitStruct->LSEState = (regval & (RCC_BDCR_LSEON | RCC_BDCR_LSEBYP | RCC_BDCR_LSEEXT)); in HAL_RCC_GetOscConfig()
1582 pOscInitStruct->LSIState = regval & RCC_BDCR_LSION; in HAL_RCC_GetOscConfig()
1585 regval = RCC->CR; in HAL_RCC_GetOscConfig()
1588 pOscInitStruct->HSI48State = regval & RCC_CR_HSI48ON; in HAL_RCC_GetOscConfig()
1591 if ((regval & RCC_CR_PLL1ON) == RCC_CR_PLL1ON) in HAL_RCC_GetOscConfig()
1626 uint32_t regval; in HAL_RCC_GetClockConfig() local
1640 regval = RCC->CFGR2; in HAL_RCC_GetClockConfig()
1641 pClkInitStruct->AHBCLKDivider = (uint32_t)(regval & RCC_CFGR2_HPRE); in HAL_RCC_GetClockConfig()
1644 pClkInitStruct->APB1CLKDivider = (uint32_t)(regval & RCC_CFGR2_PPRE1); in HAL_RCC_GetClockConfig()
1647 pClkInitStruct->APB2CLKDivider = (uint32_t)((regval & RCC_CFGR2_PPRE2) >> 4); in HAL_RCC_GetClockConfig()
1650 pClkInitStruct->APB3CLKDivider = (uint32_t)((regval & RCC_CFGR2_PPRE3) >> 8); in HAL_RCC_GetClockConfig()