Lines Matching refs:hi3c
512 static HAL_StatusTypeDef I3C_Tgt_Event_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t itMasks);
513 static HAL_StatusTypeDef I3C_Ctrl_Event_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t itMasks);
514 static HAL_StatusTypeDef I3C_Tgt_Tx_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t itMasks);
515 static HAL_StatusTypeDef I3C_Tgt_Rx_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t itMasks);
517 static HAL_StatusTypeDef I3C_Tgt_Tx_DMA_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t itMasks);
518 static HAL_StatusTypeDef I3C_Tgt_Rx_DMA_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t itMasks);
520 static HAL_StatusTypeDef I3C_Tgt_HotJoin_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t itMasks);
521 static HAL_StatusTypeDef I3C_Tgt_CtrlRole_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t itMasks);
522 static HAL_StatusTypeDef I3C_Tgt_IBI_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t itMasks);
523 static HAL_StatusTypeDef I3C_Ctrl_Tx_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t itMasks);
524 static HAL_StatusTypeDef I3C_Ctrl_Rx_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t itMasks);
525 static HAL_StatusTypeDef I3C_Ctrl_Multiple_Xfer_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t itMa…
526 static HAL_StatusTypeDef I3C_Ctrl_Tx_Listen_Event_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t it…
527 static HAL_StatusTypeDef I3C_Ctrl_Rx_Listen_Event_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t it…
528 static HAL_StatusTypeDef I3C_Ctrl_Multiple_Xfer_Listen_Event_ISR(struct __I3C_HandleTypeDef *hi3c, …
530 static HAL_StatusTypeDef I3C_Ctrl_Tx_DMA_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t itMasks);
531 static HAL_StatusTypeDef I3C_Ctrl_Rx_DMA_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t itMasks);
532 static HAL_StatusTypeDef I3C_Ctrl_Multiple_Xfer_DMA_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t …
534 static HAL_StatusTypeDef I3C_Ctrl_DAA_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t itMasks);
535 static HAL_StatusTypeDef I3C_Abort_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t itMasks);
537 static HAL_StatusTypeDef I3C_WaitOnDAAUntilTimeout(I3C_HandleTypeDef *hi3c, uint32_t timeout, uint3…
538 static HAL_StatusTypeDef I3C_WaitOnFlagUntilTimeout(I3C_HandleTypeDef *hi3c, uint32_t flag, FlagSta…
540 static void I3C_TransmitByteTreatment(I3C_HandleTypeDef *hi3c);
541 static void I3C_TransmitWordTreatment(I3C_HandleTypeDef *hi3c);
542 static void I3C_ReceiveByteTreatment(I3C_HandleTypeDef *hi3c);
543 static void I3C_ReceiveWordTreatment(I3C_HandleTypeDef *hi3c);
544 static void I3C_ControlDataTreatment(I3C_HandleTypeDef *hi3c);
545 static void I3C_ErrorTreatment(I3C_HandleTypeDef *hi3c);
546 static void I3C_GetErrorSources(I3C_HandleTypeDef *hi3c);
547 static void I3C_StateUpdate(I3C_HandleTypeDef *hi3c);
555 static void I3C_Enable_IRQ(I3C_HandleTypeDef *hi3c, uint32_t InterruptRequest);
556 static void I3C_Disable_IRQ(I3C_HandleTypeDef *hi3c, uint32_t InterruptRequest);
557 static HAL_StatusTypeDef I3C_Xfer_PriorPreparation(I3C_HandleTypeDef *hi3c, uint8_t counter, uint32…
558 static uint32_t I3C_FillTxBuffer_CCC(I3C_HandleTypeDef *hi3c,
562 static uint32_t I3C_FillTxBuffer_Private(I3C_HandleTypeDef *hi3c,
566 static HAL_StatusTypeDef I3C_ControlBuffer_PriorPreparation(I3C_HandleTypeDef *hi3c,
569 static HAL_StatusTypeDef I3C_Ctrl_IsDevice_Ready(I3C_HandleTypeDef *hi3c,
573 static void I3C_TreatErrorCallback(I3C_HandleTypeDef *hi3c);
626 HAL_StatusTypeDef HAL_I3C_Init(I3C_HandleTypeDef *hi3c) in HAL_I3C_Init() argument
633 if (hi3c == NULL) in HAL_I3C_Init()
640 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Init()
641 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Init()
644 if (hi3c->State == HAL_I3C_STATE_RESET) in HAL_I3C_Init()
649 hi3c->CtrlTxCpltCallback = HAL_I3C_CtrlTxCpltCallback; in HAL_I3C_Init()
651 hi3c->CtrlRxCpltCallback = HAL_I3C_CtrlRxCpltCallback; in HAL_I3C_Init()
653 hi3c->CtrlMultipleXferCpltCallback = HAL_I3C_CtrlMultipleXferCpltCallback; in HAL_I3C_Init()
655 hi3c->CtrlDAACpltCallback = HAL_I3C_CtrlDAACpltCallback; in HAL_I3C_Init()
657 hi3c->TgtReqDynamicAddrCallback = HAL_I3C_TgtReqDynamicAddrCallback; in HAL_I3C_Init()
659 hi3c->TgtTxCpltCallback = HAL_I3C_TgtTxCpltCallback; in HAL_I3C_Init()
661 hi3c->TgtRxCpltCallback = HAL_I3C_TgtRxCpltCallback; in HAL_I3C_Init()
663 hi3c->TgtHotJoinCallback = HAL_I3C_TgtHotJoinCallback; in HAL_I3C_Init()
665 hi3c->NotifyCallback = HAL_I3C_NotifyCallback; in HAL_I3C_Init()
667 hi3c->ErrorCallback = HAL_I3C_ErrorCallback; in HAL_I3C_Init()
669 hi3c->AbortCpltCallback = HAL_I3C_AbortCpltCallback; in HAL_I3C_Init()
672 if (hi3c->MspInitCallback == NULL) in HAL_I3C_Init()
675 hi3c->MspInitCallback = HAL_I3C_MspInit; in HAL_I3C_Init()
679 hi3c->MspInitCallback(hi3c); in HAL_I3C_Init()
682 HAL_I3C_MspInit(hi3c); in HAL_I3C_Init()
688 hi3c->State = HAL_I3C_STATE_BUSY; in HAL_I3C_Init()
691 LL_I3C_Disable(hi3c->Instance); in HAL_I3C_Init()
694 if (hi3c->Mode == HAL_I3C_MODE_CONTROLLER) in HAL_I3C_Init()
697 assert_param(IS_I3C_SDAHOLDTIME_VALUE(hi3c->Init.CtrlBusCharacteristic.SDAHoldTime)); in HAL_I3C_Init()
698 assert_param(IS_I3C_WAITTIME_VALUE(hi3c->Init.CtrlBusCharacteristic.WaitTime)); in HAL_I3C_Init()
701 LL_I3C_SetMode(hi3c->Instance, LL_I3C_MODE_CONTROLLER); in HAL_I3C_Init()
705 …waveform_value = ((uint32_t)hi3c->Init.CtrlBusCharacteristic.SCLPPLowDuration … in HAL_I3C_Init()
706 … ((uint32_t)hi3c->Init.CtrlBusCharacteristic.SCLI3CHighDuration << I3C_TIMINGR0_SCLH_I3C_Pos) | in HAL_I3C_Init()
707 … ((uint32_t)hi3c->Init.CtrlBusCharacteristic.SCLODLowDuration << I3C_TIMINGR0_SCLL_OD_Pos) | in HAL_I3C_Init()
708 … ((uint32_t)hi3c->Init.CtrlBusCharacteristic.SCLI2CHighDuration << I3C_TIMINGR0_SCLH_I2C_Pos)); in HAL_I3C_Init()
710 LL_I3C_ConfigClockWaveForm(hi3c->Instance, waveform_value); in HAL_I3C_Init()
714 …timing_value = ((uint32_t)hi3c->Init.CtrlBusCharacteristic.SDAHoldTime … in HAL_I3C_Init()
715 … (uint32_t)hi3c->Init.CtrlBusCharacteristic.WaitTime | in HAL_I3C_Init()
716 … ((uint32_t)hi3c->Init.CtrlBusCharacteristic.BusFreeDuration << I3C_TIMINGR1_FREE_Pos) | in HAL_I3C_Init()
717 (uint32_t)hi3c->Init.CtrlBusCharacteristic.BusIdleDuration); in HAL_I3C_Init()
719 LL_I3C_SetCtrlBusCharacteristic(hi3c->Instance, timing_value); in HAL_I3C_Init()
724 LL_I3C_SetMode(hi3c->Instance, LL_I3C_MODE_TARGET); in HAL_I3C_Init()
728 LL_I3C_SetAvalTiming(hi3c->Instance, hi3c->Init.TgtBusCharacteristic.BusAvailableDuration); in HAL_I3C_Init()
732 LL_I3C_Enable(hi3c->Instance); in HAL_I3C_Init()
734 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in HAL_I3C_Init()
737 hi3c->State = HAL_I3C_STATE_READY; in HAL_I3C_Init()
738 hi3c->PreviousState = HAL_I3C_STATE_READY; in HAL_I3C_Init()
750 HAL_StatusTypeDef HAL_I3C_DeInit(I3C_HandleTypeDef *hi3c) in HAL_I3C_DeInit() argument
755 if (hi3c == NULL) in HAL_I3C_DeInit()
762 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_DeInit()
765 hi3c->State = HAL_I3C_STATE_BUSY; in HAL_I3C_DeInit()
768 LL_I3C_Disable(hi3c->Instance); in HAL_I3C_DeInit()
772 if (hi3c->MspDeInitCallback == NULL) in HAL_I3C_DeInit()
775 hi3c->MspDeInitCallback = HAL_I3C_MspDeInit; in HAL_I3C_DeInit()
779 hi3c->MspDeInitCallback(hi3c); in HAL_I3C_DeInit()
782 HAL_I3C_MspDeInit(hi3c); in HAL_I3C_DeInit()
787 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in HAL_I3C_DeInit()
788 hi3c->State = HAL_I3C_STATE_RESET; in HAL_I3C_DeInit()
789 hi3c->PreviousState = HAL_I3C_STATE_RESET; in HAL_I3C_DeInit()
790 hi3c->Mode = HAL_I3C_MODE_NONE; in HAL_I3C_DeInit()
802 __weak void HAL_I3C_MspInit(I3C_HandleTypeDef *hi3c) in HAL_I3C_MspInit() argument
805 UNUSED(hi3c); in HAL_I3C_MspInit()
817 __weak void HAL_I3C_MspDeInit(I3C_HandleTypeDef *hi3c) in HAL_I3C_MspDeInit() argument
820 UNUSED(hi3c); in HAL_I3C_MspDeInit()
904 HAL_StatusTypeDef HAL_I3C_RegisterCallback(I3C_HandleTypeDef *hi3c, in HAL_I3C_RegisterCallback() argument
911 if (hi3c == NULL) in HAL_I3C_RegisterCallback()
920 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_RegisterCallback()
923 else if (HAL_I3C_STATE_READY == hi3c->State) in HAL_I3C_RegisterCallback()
928 hi3c->CtrlTxCpltCallback = pCallback; in HAL_I3C_RegisterCallback()
932 hi3c->CtrlRxCpltCallback = pCallback; in HAL_I3C_RegisterCallback()
936 hi3c->CtrlMultipleXferCpltCallback = pCallback; in HAL_I3C_RegisterCallback()
940 hi3c->CtrlDAACpltCallback = pCallback; in HAL_I3C_RegisterCallback()
944 hi3c->TgtTxCpltCallback = pCallback; in HAL_I3C_RegisterCallback()
948 hi3c->TgtRxCpltCallback = pCallback; in HAL_I3C_RegisterCallback()
952 hi3c->ErrorCallback = pCallback; in HAL_I3C_RegisterCallback()
956 hi3c->AbortCpltCallback = pCallback; in HAL_I3C_RegisterCallback()
960 hi3c->MspInitCallback = pCallback; in HAL_I3C_RegisterCallback()
964 hi3c->MspDeInitCallback = pCallback; in HAL_I3C_RegisterCallback()
968 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_CALLBACK; in HAL_I3C_RegisterCallback()
973 else if (HAL_I3C_STATE_RESET == hi3c->State) in HAL_I3C_RegisterCallback()
978 hi3c->MspInitCallback = pCallback; in HAL_I3C_RegisterCallback()
982 hi3c->MspDeInitCallback = pCallback; in HAL_I3C_RegisterCallback()
986 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_CALLBACK; in HAL_I3C_RegisterCallback()
993 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_RegisterCallback()
1008 HAL_StatusTypeDef HAL_I3C_RegisterNotifyCallback(I3C_HandleTypeDef *hi3c, pI3C_NotifyCallbackTypeDe… in HAL_I3C_RegisterNotifyCallback() argument
1013 if (hi3c == NULL) in HAL_I3C_RegisterNotifyCallback()
1022 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_RegisterNotifyCallback()
1025 else if (HAL_I3C_STATE_READY == hi3c->State) in HAL_I3C_RegisterNotifyCallback()
1027 hi3c->NotifyCallback = pNotifyCallback; in HAL_I3C_RegisterNotifyCallback()
1031 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_RegisterNotifyCallback()
1046 HAL_StatusTypeDef HAL_I3C_RegisterTgtReqDynamicAddrCallback(I3C_HandleTypeDef *hi3c, in HAL_I3C_RegisterTgtReqDynamicAddrCallback() argument
1052 if (hi3c == NULL) in HAL_I3C_RegisterTgtReqDynamicAddrCallback()
1061 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_RegisterTgtReqDynamicAddrCallback()
1064 else if (HAL_I3C_STATE_READY == hi3c->State) in HAL_I3C_RegisterTgtReqDynamicAddrCallback()
1066 hi3c->TgtReqDynamicAddrCallback = pTgtReqAddrCallback; in HAL_I3C_RegisterTgtReqDynamicAddrCallback()
1070 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_RegisterTgtReqDynamicAddrCallback()
1085 HAL_StatusTypeDef HAL_I3C_RegisterTgtHotJoinCallback(I3C_HandleTypeDef *hi3c, in HAL_I3C_RegisterTgtHotJoinCallback() argument
1091 if (hi3c == NULL) in HAL_I3C_RegisterTgtHotJoinCallback()
1100 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_RegisterTgtHotJoinCallback()
1103 else if (HAL_I3C_STATE_READY == hi3c->State) in HAL_I3C_RegisterTgtHotJoinCallback()
1105 hi3c->TgtHotJoinCallback = pTgtHotJoinCallback; in HAL_I3C_RegisterTgtHotJoinCallback()
1109 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_RegisterTgtHotJoinCallback()
1141 HAL_StatusTypeDef HAL_I3C_UnRegisterCallback(I3C_HandleTypeDef *hi3c, HAL_I3C_CallbackIDTypeDef cal… in HAL_I3C_UnRegisterCallback() argument
1146 if (hi3c == NULL) in HAL_I3C_UnRegisterCallback()
1152 if (HAL_I3C_STATE_READY == hi3c->State) in HAL_I3C_UnRegisterCallback()
1158 hi3c->CtrlTxCpltCallback = HAL_I3C_CtrlTxCpltCallback; in HAL_I3C_UnRegisterCallback()
1163 hi3c->CtrlRxCpltCallback = HAL_I3C_CtrlRxCpltCallback; in HAL_I3C_UnRegisterCallback()
1168 hi3c->CtrlMultipleXferCpltCallback = HAL_I3C_CtrlMultipleXferCpltCallback; in HAL_I3C_UnRegisterCallback()
1173 hi3c->CtrlDAACpltCallback = HAL_I3C_CtrlDAACpltCallback; in HAL_I3C_UnRegisterCallback()
1178 hi3c->TgtReqDynamicAddrCallback = HAL_I3C_TgtReqDynamicAddrCallback; in HAL_I3C_UnRegisterCallback()
1183 hi3c->TgtTxCpltCallback = HAL_I3C_TgtTxCpltCallback; in HAL_I3C_UnRegisterCallback()
1188 hi3c->TgtRxCpltCallback = HAL_I3C_TgtRxCpltCallback; in HAL_I3C_UnRegisterCallback()
1193 hi3c->TgtHotJoinCallback = HAL_I3C_TgtHotJoinCallback; in HAL_I3C_UnRegisterCallback()
1198 hi3c->NotifyCallback = HAL_I3C_NotifyCallback; in HAL_I3C_UnRegisterCallback()
1203 hi3c->ErrorCallback = HAL_I3C_ErrorCallback; in HAL_I3C_UnRegisterCallback()
1208 hi3c->AbortCpltCallback = HAL_I3C_AbortCpltCallback; in HAL_I3C_UnRegisterCallback()
1213 hi3c->MspInitCallback = HAL_I3C_MspInit; in HAL_I3C_UnRegisterCallback()
1218 hi3c->MspDeInitCallback = HAL_I3C_MspDeInit; in HAL_I3C_UnRegisterCallback()
1222 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_CALLBACK; in HAL_I3C_UnRegisterCallback()
1227 else if (HAL_I3C_STATE_RESET == hi3c->State) in HAL_I3C_UnRegisterCallback()
1233 hi3c->MspInitCallback = HAL_I3C_MspInit; in HAL_I3C_UnRegisterCallback()
1238 hi3c->MspDeInitCallback = HAL_I3C_MspDeInit; in HAL_I3C_UnRegisterCallback()
1242 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_CALLBACK; in HAL_I3C_UnRegisterCallback()
1249 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_UnRegisterCallback()
1270 HAL_StatusTypeDef HAL_I3C_ActivateNotification(I3C_HandleTypeDef *hi3c, I3C_XferTypeDef *pXferData, in HAL_I3C_ActivateNotification() argument
1276 if (hi3c == NULL) in HAL_I3C_ActivateNotification()
1283 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_ActivateNotification()
1284 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_ActivateNotification()
1285 assert_param(IS_I3C_INTERRUPTMASK(hi3c->Mode, interruptMask)); in HAL_I3C_ActivateNotification()
1288 if ((hi3c->State == HAL_I3C_STATE_RESET) || in HAL_I3C_ActivateNotification()
1289 ((hi3c->Mode != HAL_I3C_MODE_CONTROLLER) && (hi3c->Mode != HAL_I3C_MODE_TARGET))) in HAL_I3C_ActivateNotification()
1291 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_ActivateNotification()
1295 else if ((hi3c->Mode == HAL_I3C_MODE_TARGET) && in HAL_I3C_ActivateNotification()
1299 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_ActivateNotification()
1305 if (hi3c->Mode == HAL_I3C_MODE_TARGET) in HAL_I3C_ActivateNotification()
1309 hi3c->pXferData = pXferData; in HAL_I3C_ActivateNotification()
1310 hi3c->RxXferCount = hi3c->pXferData->RxBuf.Size; in HAL_I3C_ActivateNotification()
1313 if (LL_I3C_GetRxFIFOThreshold(hi3c->Instance) == LL_I3C_RXFIFO_THRESHOLD_1_4) in HAL_I3C_ActivateNotification()
1316 hi3c->ptrRxFunc = &I3C_ReceiveByteTreatment; in HAL_I3C_ActivateNotification()
1321 hi3c->ptrRxFunc = &I3C_ReceiveWordTreatment; in HAL_I3C_ActivateNotification()
1325 hi3c->XferISR = I3C_Tgt_Event_ISR; in HAL_I3C_ActivateNotification()
1330 hi3c->XferISR = I3C_Ctrl_Event_ISR; in HAL_I3C_ActivateNotification()
1334 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in HAL_I3C_ActivateNotification()
1335 hi3c->State = HAL_I3C_STATE_LISTEN; in HAL_I3C_ActivateNotification()
1336 hi3c->PreviousState = HAL_I3C_STATE_LISTEN; in HAL_I3C_ActivateNotification()
1341 I3C_Enable_IRQ(hi3c, (interruptMask | I3C_XFER_LISTEN_IT)); in HAL_I3C_ActivateNotification()
1358 HAL_StatusTypeDef HAL_I3C_DeactivateNotification(I3C_HandleTypeDef *hi3c, uint32_t interruptMask) in HAL_I3C_DeactivateNotification() argument
1363 if (hi3c == NULL) in HAL_I3C_DeactivateNotification()
1370 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_DeactivateNotification()
1373 if (hi3c->State == HAL_I3C_STATE_RESET) in HAL_I3C_DeactivateNotification()
1375 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_DeactivateNotification()
1381 I3C_Disable_IRQ(hi3c, (interruptMask | I3C_XFER_LISTEN_IT)); in HAL_I3C_DeactivateNotification()
1383 if (READ_REG(hi3c->Instance->IER) == 0U) in HAL_I3C_DeactivateNotification()
1386 hi3c->XferISR = NULL; in HAL_I3C_DeactivateNotification()
1389 hi3c->State = HAL_I3C_STATE_READY; in HAL_I3C_DeactivateNotification()
1390 hi3c->PreviousState = HAL_I3C_STATE_READY; in HAL_I3C_DeactivateNotification()
1404 __weak void HAL_I3C_CtrlTxCpltCallback(I3C_HandleTypeDef *hi3c) in HAL_I3C_CtrlTxCpltCallback() argument
1407 UNUSED(hi3c); in HAL_I3C_CtrlTxCpltCallback()
1420 __weak void HAL_I3C_CtrlRxCpltCallback(I3C_HandleTypeDef *hi3c) in HAL_I3C_CtrlRxCpltCallback() argument
1423 UNUSED(hi3c); in HAL_I3C_CtrlRxCpltCallback()
1436 __weak void HAL_I3C_CtrlMultipleXferCpltCallback(I3C_HandleTypeDef *hi3c) in HAL_I3C_CtrlMultipleXferCpltCallback() argument
1439 UNUSED(hi3c); in HAL_I3C_CtrlMultipleXferCpltCallback()
1452 __weak void HAL_I3C_CtrlDAACpltCallback(I3C_HandleTypeDef *hi3c) in HAL_I3C_CtrlDAACpltCallback() argument
1455 UNUSED(hi3c); in HAL_I3C_CtrlDAACpltCallback()
1469 __weak void HAL_I3C_TgtReqDynamicAddrCallback(I3C_HandleTypeDef *hi3c, uint64_t targetPayload) in HAL_I3C_TgtReqDynamicAddrCallback() argument
1472 UNUSED(hi3c); in HAL_I3C_TgtReqDynamicAddrCallback()
1486 __weak void HAL_I3C_TgtTxCpltCallback(I3C_HandleTypeDef *hi3c) in HAL_I3C_TgtTxCpltCallback() argument
1489 UNUSED(hi3c); in HAL_I3C_TgtTxCpltCallback()
1502 __weak void HAL_I3C_TgtRxCpltCallback(I3C_HandleTypeDef *hi3c) in HAL_I3C_TgtRxCpltCallback() argument
1505 UNUSED(hi3c); in HAL_I3C_TgtRxCpltCallback()
1519 __weak void HAL_I3C_TgtHotJoinCallback(I3C_HandleTypeDef *hi3c, uint8_t dynamicAddress) in HAL_I3C_TgtHotJoinCallback() argument
1522 UNUSED(hi3c); in HAL_I3C_TgtHotJoinCallback()
1538 __weak void HAL_I3C_NotifyCallback(I3C_HandleTypeDef *hi3c, uint32_t eventId) in HAL_I3C_NotifyCallback() argument
1541 UNUSED(hi3c); in HAL_I3C_NotifyCallback()
1555 __weak void HAL_I3C_AbortCpltCallback(I3C_HandleTypeDef *hi3c) in HAL_I3C_AbortCpltCallback() argument
1558 UNUSED(hi3c); in HAL_I3C_AbortCpltCallback()
1571 __weak void HAL_I3C_ErrorCallback(I3C_HandleTypeDef *hi3c) in HAL_I3C_ErrorCallback() argument
1574 UNUSED(hi3c); in HAL_I3C_ErrorCallback()
1587 void HAL_I3C_ER_IRQHandler(I3C_HandleTypeDef *hi3c) in HAL_I3C_ER_IRQHandler() argument
1589 uint32_t it_flag = READ_REG(hi3c->Instance->EVR); in HAL_I3C_ER_IRQHandler()
1590 uint32_t it_source = READ_REG(hi3c->Instance->IER); in HAL_I3C_ER_IRQHandler()
1597 LL_I3C_ClearFlag_ERR(hi3c->Instance); in HAL_I3C_ER_IRQHandler()
1599 if (hi3c->State != HAL_I3C_STATE_ABORT) in HAL_I3C_ER_IRQHandler()
1602 I3C_GetErrorSources(hi3c); in HAL_I3C_ER_IRQHandler()
1606 I3C_ErrorTreatment(hi3c); in HAL_I3C_ER_IRQHandler()
1616 void HAL_I3C_EV_IRQHandler(I3C_HandleTypeDef *hi3c) /* Derogation MISRAC2012-Rule-8.13 */ in HAL_I3C_EV_IRQHandler() argument
1618 uint32_t it_flags = READ_REG(hi3c->Instance->EVR); in HAL_I3C_EV_IRQHandler()
1619 uint32_t it_sources = READ_REG(hi3c->Instance->IER); in HAL_I3C_EV_IRQHandler()
1624 if (hi3c->XferISR != NULL) in HAL_I3C_EV_IRQHandler()
1626 hi3c->XferISR(hi3c, it_masks); in HAL_I3C_EV_IRQHandler()
1685 HAL_StatusTypeDef HAL_I3C_Ctrl_BusCharacteristicConfig(I3C_HandleTypeDef *hi3c, in HAL_I3C_Ctrl_BusCharacteristicConfig() argument
1693 if (hi3c == NULL) in HAL_I3C_Ctrl_BusCharacteristicConfig()
1700 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Ctrl_BusCharacteristicConfig()
1701 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Ctrl_BusCharacteristicConfig()
1706 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_Ctrl_BusCharacteristicConfig()
1710 else if ((hi3c->State != HAL_I3C_STATE_READY) || (hi3c->Mode != HAL_I3C_MODE_CONTROLLER)) in HAL_I3C_Ctrl_BusCharacteristicConfig()
1712 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Ctrl_BusCharacteristicConfig()
1722 LL_I3C_Disable(hi3c->Instance); in HAL_I3C_Ctrl_BusCharacteristicConfig()
1731 LL_I3C_ConfigClockWaveForm(hi3c->Instance, waveform_value); in HAL_I3C_Ctrl_BusCharacteristicConfig()
1740 LL_I3C_SetCtrlBusCharacteristic(hi3c->Instance, timing_value); in HAL_I3C_Ctrl_BusCharacteristicConfig()
1743 LL_I3C_Enable(hi3c->Instance); in HAL_I3C_Ctrl_BusCharacteristicConfig()
1757 HAL_StatusTypeDef HAL_I3C_Tgt_BusCharacteristicConfig(I3C_HandleTypeDef *hi3c, in HAL_I3C_Tgt_BusCharacteristicConfig() argument
1763 if (hi3c == NULL) in HAL_I3C_Tgt_BusCharacteristicConfig()
1772 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_Tgt_BusCharacteristicConfig()
1778 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Tgt_BusCharacteristicConfig()
1779 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Tgt_BusCharacteristicConfig()
1782 if ((hi3c->State != HAL_I3C_STATE_READY) || (hi3c->Mode != HAL_I3C_MODE_TARGET)) in HAL_I3C_Tgt_BusCharacteristicConfig()
1784 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Tgt_BusCharacteristicConfig()
1790 LL_I3C_Disable(hi3c->Instance); in HAL_I3C_Tgt_BusCharacteristicConfig()
1794 LL_I3C_SetAvalTiming(hi3c->Instance, pConfig->BusAvailableDuration); in HAL_I3C_Tgt_BusCharacteristicConfig()
1797 LL_I3C_Enable(hi3c->Instance); in HAL_I3C_Tgt_BusCharacteristicConfig()
1812 HAL_StatusTypeDef HAL_I3C_SetConfigFifo(I3C_HandleTypeDef *hi3c, const I3C_FifoConfTypeDef *pConfig) in HAL_I3C_SetConfigFifo() argument
1819 if (hi3c == NULL) in HAL_I3C_SetConfigFifo()
1828 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_SetConfigFifo()
1832 else if (hi3c->State == HAL_I3C_STATE_RESET) in HAL_I3C_SetConfigFifo()
1834 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_SetConfigFifo()
1840 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_SetConfigFifo()
1841 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_SetConfigFifo()
1852 if (hi3c->Mode == HAL_I3C_MODE_CONTROLLER) in HAL_I3C_SetConfigFifo()
1864 MODIFY_REG(hi3c->Instance->CFGR, cfgr_mask, cfgr_value); in HAL_I3C_SetConfigFifo()
1879 HAL_StatusTypeDef HAL_I3C_Ctrl_Config(I3C_HandleTypeDef *hi3c, const I3C_CtrlConfTypeDef *pConfig) in HAL_I3C_Ctrl_Config() argument
1886 if (hi3c == NULL) in HAL_I3C_Ctrl_Config()
1893 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Ctrl_Config()
1894 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Ctrl_Config()
1899 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_Ctrl_Config()
1903 else if ((hi3c->State == HAL_I3C_STATE_RESET) || (hi3c->Mode != HAL_I3C_MODE_CONTROLLER)) in HAL_I3C_Ctrl_Config()
1905 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Ctrl_Config()
1920 LL_I3C_Disable(hi3c->Instance); in HAL_I3C_Ctrl_Config()
1930 WRITE_REG(hi3c->Instance->TIMINGR2, timing2_value); in HAL_I3C_Ctrl_Config()
1937 MODIFY_REG(hi3c->Instance->CFGR, I3C_CFGR_HKSDAEN | I3C_CFGR_HJACK, cfgr_value); in HAL_I3C_Ctrl_Config()
1940 LL_I3C_SetOwnDynamicAddress(hi3c->Instance, pConfig->DynamicAddr); in HAL_I3C_Ctrl_Config()
1943 LL_I3C_EnableOwnDynAddress(hi3c->Instance); in HAL_I3C_Ctrl_Config()
1946 LL_I3C_Enable(hi3c->Instance); in HAL_I3C_Ctrl_Config()
1961 HAL_StatusTypeDef HAL_I3C_Tgt_Config(I3C_HandleTypeDef *hi3c, const I3C_TgtConfTypeDef *pConfig) in HAL_I3C_Tgt_Config() argument
1971 if (hi3c == NULL) in HAL_I3C_Tgt_Config()
1978 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Tgt_Config()
1979 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Tgt_Config()
1984 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_Tgt_Config()
1988 else if ((hi3c->State == HAL_I3C_STATE_RESET) || (hi3c->Mode != HAL_I3C_MODE_TARGET)) in HAL_I3C_Tgt_Config()
1990 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Tgt_Config()
2012 LL_I3C_Disable(hi3c->Instance); in HAL_I3C_Tgt_Config()
2019 WRITE_REG(hi3c->Instance->GETMXDSR, getmxdsr_value); in HAL_I3C_Tgt_Config()
2025 WRITE_REG(hi3c->Instance->MAXRLR, maxrlr_value); in HAL_I3C_Tgt_Config()
2028 LL_I3C_SetMaxWriteLength(hi3c->Instance, pConfig->MaxWriteDataSize); in HAL_I3C_Tgt_Config()
2031 LL_I3C_SetMIPIInstanceID(hi3c->Instance, pConfig->MIPIIdentifier); in HAL_I3C_Tgt_Config()
2034 LL_I3C_SetDeviceCharacteristics(hi3c->Instance, pConfig->Identifier); in HAL_I3C_Tgt_Config()
2041 WRITE_REG(hi3c->Instance->CRCAPR, crccapr_value); in HAL_I3C_Tgt_Config()
2044 …LL_I3C_SetPendingReadMDB(hi3c->Instance, ((uint32_t)pConfig->PendingReadMDB << I3C_GETCAPR_CAPPEND… in HAL_I3C_Tgt_Config()
2052 WRITE_REG(hi3c->Instance->BCR, bcr_value); in HAL_I3C_Tgt_Config()
2060 …MODIFY_REG(hi3c->Instance->DEVR0, (I3C_DEVR0_HJEN | I3C_DEVR0_IBIEN | I3C_DEVR0_CREN), devr0_value… in HAL_I3C_Tgt_Config()
2063 LL_I3C_Enable(hi3c->Instance); in HAL_I3C_Tgt_Config()
2083 HAL_StatusTypeDef HAL_I3C_Ctrl_ConfigBusDevices(I3C_HandleTypeDef *hi3c, in HAL_I3C_Ctrl_ConfigBusDevices() argument
2091 if (hi3c == NULL) in HAL_I3C_Ctrl_ConfigBusDevices()
2100 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_Ctrl_ConfigBusDevices()
2104 else if ((hi3c->State == HAL_I3C_STATE_RESET) || (hi3c->Mode != HAL_I3C_MODE_CONTROLLER)) in HAL_I3C_Ctrl_ConfigBusDevices()
2106 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Ctrl_ConfigBusDevices()
2112 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Ctrl_ConfigBusDevices()
2113 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Ctrl_ConfigBusDevices()
2135 WRITE_REG(hi3c->Instance->DEVRX[(pDesc[index].DeviceIndex - 1U)], write_value); in HAL_I3C_Ctrl_ConfigBusDevices()
2160 HAL_StatusTypeDef HAL_I3C_AddDescToFrame(I3C_HandleTypeDef *hi3c, in HAL_I3C_AddDescToFrame() argument
2171 if (hi3c == NULL) in HAL_I3C_AddDescToFrame()
2178 handle_state = hi3c->State; in HAL_I3C_AddDescToFrame()
2181 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in HAL_I3C_AddDescToFrame()
2182 hi3c->pCCCDesc = pCCCDesc; in HAL_I3C_AddDescToFrame()
2183 hi3c->pPrivateDesc = pPrivateDesc; in HAL_I3C_AddDescToFrame()
2184 hi3c->pXferData = pXferData; in HAL_I3C_AddDescToFrame()
2185 hi3c->RxXferCount = 0; in HAL_I3C_AddDescToFrame()
2186 hi3c->TxXferCount = 0; in HAL_I3C_AddDescToFrame()
2199 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_AddDescToFrame()
2208 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_AddDescToFrame()
2219 if (I3C_ControlBuffer_PriorPreparation(hi3c, nbFrame, option) != HAL_OK) in HAL_I3C_AddDescToFrame()
2221 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_AddDescToFrame()
2226 if (I3C_Xfer_PriorPreparation(hi3c, nbFrame, option) != HAL_OK) in HAL_I3C_AddDescToFrame()
2251 HAL_StatusTypeDef HAL_I3C_Ctrl_SetConfigResetPattern(I3C_HandleTypeDef *hi3c, uint32_t resetPattern) in HAL_I3C_Ctrl_SetConfigResetPattern() argument
2257 if (hi3c == NULL) in HAL_I3C_Ctrl_SetConfigResetPattern()
2264 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Ctrl_SetConfigResetPattern()
2265 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Ctrl_SetConfigResetPattern()
2269 handle_state = hi3c->State; in HAL_I3C_Ctrl_SetConfigResetPattern()
2272 if (hi3c->Mode != HAL_I3C_MODE_CONTROLLER) in HAL_I3C_Ctrl_SetConfigResetPattern()
2274 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Ctrl_SetConfigResetPattern()
2284 hi3c->State = HAL_I3C_STATE_BUSY; in HAL_I3C_Ctrl_SetConfigResetPattern()
2288 LL_I3C_EnableResetPattern(hi3c->Instance); in HAL_I3C_Ctrl_SetConfigResetPattern()
2292 LL_I3C_DisableResetPattern(hi3c->Instance); in HAL_I3C_Ctrl_SetConfigResetPattern()
2296 I3C_StateUpdate(hi3c); in HAL_I3C_Ctrl_SetConfigResetPattern()
2311 HAL_StatusTypeDef HAL_I3C_Ctrl_GetConfigResetPattern(I3C_HandleTypeDef *hi3c, uint32_t *pResetPatte… in HAL_I3C_Ctrl_GetConfigResetPattern() argument
2316 if (hi3c == NULL) in HAL_I3C_Ctrl_GetConfigResetPattern()
2328 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Ctrl_GetConfigResetPattern()
2329 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Ctrl_GetConfigResetPattern()
2332 if (LL_I3C_IsEnabledResetPattern(hi3c->Instance) == 1U) in HAL_I3C_Ctrl_GetConfigResetPattern()
2385 HAL_StatusTypeDef HAL_I3C_FlushAllFifo(I3C_HandleTypeDef *hi3c) in HAL_I3C_FlushAllFifo() argument
2391 if (hi3c == NULL) in HAL_I3C_FlushAllFifo()
2398 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_FlushAllFifo()
2399 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_FlushAllFifo()
2402 if (hi3c->State == HAL_I3C_STATE_RESET) in HAL_I3C_FlushAllFifo()
2404 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_FlushAllFifo()
2413 if (hi3c->Mode == HAL_I3C_MODE_CONTROLLER) in HAL_I3C_FlushAllFifo()
2420 MODIFY_REG(hi3c->Instance->CFGR, cfgr_value, cfgr_value); in HAL_I3C_FlushAllFifo()
2433 HAL_StatusTypeDef HAL_I3C_FlushTxFifo(I3C_HandleTypeDef *hi3c) in HAL_I3C_FlushTxFifo() argument
2438 if (hi3c == NULL) in HAL_I3C_FlushTxFifo()
2445 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_FlushTxFifo()
2446 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_FlushTxFifo()
2449 if (hi3c->State == HAL_I3C_STATE_RESET) in HAL_I3C_FlushTxFifo()
2451 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_FlushTxFifo()
2457 LL_I3C_RequestTxFIFOFlush(hi3c->Instance); in HAL_I3C_FlushTxFifo()
2470 HAL_StatusTypeDef HAL_I3C_FlushRxFifo(I3C_HandleTypeDef *hi3c) in HAL_I3C_FlushRxFifo() argument
2475 if (hi3c == NULL) in HAL_I3C_FlushRxFifo()
2483 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_FlushRxFifo()
2484 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_FlushRxFifo()
2487 if (hi3c->State == HAL_I3C_STATE_RESET) in HAL_I3C_FlushRxFifo()
2489 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_FlushRxFifo()
2495 LL_I3C_RequestRxFIFOFlush(hi3c->Instance); in HAL_I3C_FlushRxFifo()
2508 HAL_StatusTypeDef HAL_I3C_FlushControlFifo(I3C_HandleTypeDef *hi3c) in HAL_I3C_FlushControlFifo() argument
2513 if (hi3c == NULL) in HAL_I3C_FlushControlFifo()
2520 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_FlushControlFifo()
2521 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_FlushControlFifo()
2524 if ((hi3c->State == HAL_I3C_STATE_RESET) || (hi3c->Mode != HAL_I3C_MODE_CONTROLLER)) in HAL_I3C_FlushControlFifo()
2526 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_FlushControlFifo()
2532 LL_I3C_RequestControlFIFOFlush(hi3c->Instance); in HAL_I3C_FlushControlFifo()
2545 HAL_StatusTypeDef HAL_I3C_FlushStatusFifo(I3C_HandleTypeDef *hi3c) in HAL_I3C_FlushStatusFifo() argument
2550 if (hi3c == NULL) in HAL_I3C_FlushStatusFifo()
2557 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_FlushStatusFifo()
2558 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_FlushStatusFifo()
2561 if ((hi3c->State == HAL_I3C_STATE_RESET) || (hi3c->Mode != HAL_I3C_MODE_CONTROLLER)) in HAL_I3C_FlushStatusFifo()
2563 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_FlushStatusFifo()
2569 LL_I3C_RequestStatusFIFOFlush(hi3c->Instance); in HAL_I3C_FlushStatusFifo()
2582 HAL_StatusTypeDef HAL_I3C_ClearConfigFifo(I3C_HandleTypeDef *hi3c) in HAL_I3C_ClearConfigFifo() argument
2589 if (hi3c == NULL) in HAL_I3C_ClearConfigFifo()
2596 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_ClearConfigFifo()
2597 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_ClearConfigFifo()
2600 if (hi3c->State == HAL_I3C_STATE_RESET) in HAL_I3C_ClearConfigFifo()
2602 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_ClearConfigFifo()
2612 if (hi3c->Mode == HAL_I3C_MODE_CONTROLLER) in HAL_I3C_ClearConfigFifo()
2620 MODIFY_REG(hi3c->Instance->CFGR, cfgr_mask, cfgr_value); in HAL_I3C_ClearConfigFifo()
2634 HAL_StatusTypeDef HAL_I3C_GetConfigFifo(I3C_HandleTypeDef *hi3c, I3C_FifoConfTypeDef *pConfig) in HAL_I3C_GetConfigFifo() argument
2639 if (hi3c == NULL) in HAL_I3C_GetConfigFifo()
2646 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_GetConfigFifo()
2647 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_GetConfigFifo()
2652 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_GetConfigFifo()
2656 else if (hi3c->State == HAL_I3C_STATE_RESET) in HAL_I3C_GetConfigFifo()
2658 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_GetConfigFifo()
2664 pConfig->TxFifoThreshold = LL_I3C_GetTxFIFOThreshold(hi3c->Instance); in HAL_I3C_GetConfigFifo()
2667 pConfig->RxFifoThreshold = LL_I3C_GetRxFIFOThreshold(hi3c->Instance); in HAL_I3C_GetConfigFifo()
2670 …pConfig->ControlFifo = (uint32_t)(LL_I3C_IsEnabledControlFIFO(hi3c->Instance) << I3C_CFGR_TMODE_Po… in HAL_I3C_GetConfigFifo()
2673 …pConfig->StatusFifo = (uint32_t)(LL_I3C_IsEnabledStatusFIFO(hi3c->Instance) << I3C_CFGR_SMODE_Pos); in HAL_I3C_GetConfigFifo()
2741 HAL_StatusTypeDef HAL_I3C_Ctrl_TransmitCCC(I3C_HandleTypeDef *hi3c, in HAL_I3C_Ctrl_TransmitCCC() argument
2751 if (hi3c == NULL) in HAL_I3C_Ctrl_TransmitCCC()
2758 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Ctrl_TransmitCCC()
2759 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Ctrl_TransmitCCC()
2762 handle_state = hi3c->State; in HAL_I3C_Ctrl_TransmitCCC()
2766 ((hi3c->TxXferCount != 0U) && (pXferData->TxBuf.pBuffer == NULL))) in HAL_I3C_Ctrl_TransmitCCC()
2768 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_Ctrl_TransmitCCC()
2772 else if (hi3c->Mode != HAL_I3C_MODE_CONTROLLER) in HAL_I3C_Ctrl_TransmitCCC()
2774 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Ctrl_TransmitCCC()
2786 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in HAL_I3C_Ctrl_TransmitCCC()
2787 hi3c->State = HAL_I3C_STATE_BUSY_TX; in HAL_I3C_Ctrl_TransmitCCC()
2788 hi3c->pXferData = pXferData; in HAL_I3C_Ctrl_TransmitCCC()
2791 if (LL_I3C_GetTxFIFOThreshold(hi3c->Instance) == LL_I3C_TXFIFO_THRESHOLD_1_4) in HAL_I3C_Ctrl_TransmitCCC()
2794 hi3c->ptrTxFunc = &I3C_TransmitByteTreatment; in HAL_I3C_Ctrl_TransmitCCC()
2799 hi3c->ptrTxFunc = &I3C_TransmitWordTreatment; in HAL_I3C_Ctrl_TransmitCCC()
2806 if (LL_I3C_IsEnabledControlFIFO(hi3c->Instance) == 1U) in HAL_I3C_Ctrl_TransmitCCC()
2809 LL_I3C_RequestTransfer(hi3c->Instance); in HAL_I3C_Ctrl_TransmitCCC()
2814 hi3c->ControlXferCount--; in HAL_I3C_Ctrl_TransmitCCC()
2817 WRITE_REG(hi3c->Instance->CR, *hi3c->pXferData->CtrlBuf.pBuffer); in HAL_I3C_Ctrl_TransmitCCC()
2820 hi3c->pXferData->CtrlBuf.pBuffer++; in HAL_I3C_Ctrl_TransmitCCC()
2827 if (hi3c->ControlXferCount > 0U) in HAL_I3C_Ctrl_TransmitCCC()
2830 I3C_ControlDataTreatment(hi3c); in HAL_I3C_Ctrl_TransmitCCC()
2834 if (hi3c->TxXferCount > 0U) in HAL_I3C_Ctrl_TransmitCCC()
2837 hi3c->ptrTxFunc(hi3c); in HAL_I3C_Ctrl_TransmitCCC()
2845 hi3c->ErrorCode = HAL_I3C_ERROR_TIMEOUT; in HAL_I3C_Ctrl_TransmitCCC()
2851 if ((__HAL_I3C_GET_FLAG(hi3c, HAL_I3C_FLAG_FCF) == SET) && (hi3c->ControlXferCount > 0U)) in HAL_I3C_Ctrl_TransmitCCC()
2854 LL_I3C_ClearFlag_FC(hi3c->Instance); in HAL_I3C_Ctrl_TransmitCCC()
2857 LL_I3C_RequestTransfer(hi3c->Instance); in HAL_I3C_Ctrl_TransmitCCC()
2861 exit_condition = (READ_REG(hi3c->Instance->EVR) & (I3C_EVR_FCF | I3C_EVR_ERRF)); in HAL_I3C_Ctrl_TransmitCCC()
2863 ((exit_condition == I3C_EVR_FCF) && (hi3c->ControlXferCount > 0U))); in HAL_I3C_Ctrl_TransmitCCC()
2866 if (__HAL_I3C_GET_FLAG(hi3c, HAL_I3C_FLAG_FCF) == SET) in HAL_I3C_Ctrl_TransmitCCC()
2868 LL_I3C_ClearFlag_FC(hi3c->Instance); in HAL_I3C_Ctrl_TransmitCCC()
2872 if (__HAL_I3C_GET_FLAG(hi3c, HAL_I3C_FLAG_ERRF) == SET) in HAL_I3C_Ctrl_TransmitCCC()
2875 LL_I3C_ClearFlag_ERR(hi3c->Instance); in HAL_I3C_Ctrl_TransmitCCC()
2878 I3C_GetErrorSources(hi3c); in HAL_I3C_Ctrl_TransmitCCC()
2885 I3C_StateUpdate(hi3c); in HAL_I3C_Ctrl_TransmitCCC()
2904 HAL_StatusTypeDef HAL_I3C_Ctrl_TransmitCCC_IT(I3C_HandleTypeDef *hi3c, in HAL_I3C_Ctrl_TransmitCCC_IT() argument
2911 if (hi3c == NULL) in HAL_I3C_Ctrl_TransmitCCC_IT()
2918 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Ctrl_TransmitCCC_IT()
2919 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Ctrl_TransmitCCC_IT()
2922 handle_state = hi3c->State; in HAL_I3C_Ctrl_TransmitCCC_IT()
2926 ((hi3c->TxXferCount != 0U) && (pXferData->TxBuf.pBuffer == NULL))) in HAL_I3C_Ctrl_TransmitCCC_IT()
2928 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_Ctrl_TransmitCCC_IT()
2932 else if (hi3c->Mode != HAL_I3C_MODE_CONTROLLER) in HAL_I3C_Ctrl_TransmitCCC_IT()
2934 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Ctrl_TransmitCCC_IT()
2945 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in HAL_I3C_Ctrl_TransmitCCC_IT()
2949 hi3c->XferISR = I3C_Ctrl_Tx_Listen_Event_ISR; in HAL_I3C_Ctrl_TransmitCCC_IT()
2953 hi3c->XferISR = I3C_Ctrl_Tx_ISR; in HAL_I3C_Ctrl_TransmitCCC_IT()
2956 hi3c->pXferData = pXferData; in HAL_I3C_Ctrl_TransmitCCC_IT()
2957 hi3c->State = HAL_I3C_STATE_BUSY_TX; in HAL_I3C_Ctrl_TransmitCCC_IT()
2961 if (LL_I3C_GetTxFIFOThreshold(hi3c->Instance) == LL_I3C_TXFIFO_THRESHOLD_1_4) in HAL_I3C_Ctrl_TransmitCCC_IT()
2964 hi3c->ptrTxFunc = &I3C_TransmitByteTreatment; in HAL_I3C_Ctrl_TransmitCCC_IT()
2969 hi3c->ptrTxFunc = &I3C_TransmitWordTreatment; in HAL_I3C_Ctrl_TransmitCCC_IT()
2976 I3C_Enable_IRQ(hi3c, I3C_XFER_CONTROLLER_TX_IT); in HAL_I3C_Ctrl_TransmitCCC_IT()
2979 LL_I3C_RequestTransfer(hi3c->Instance); in HAL_I3C_Ctrl_TransmitCCC_IT()
2999 HAL_StatusTypeDef HAL_I3C_Ctrl_TransmitCCC_DMA(I3C_HandleTypeDef *hi3c, in HAL_I3C_Ctrl_TransmitCCC_DMA() argument
3009 if (hi3c == NULL) in HAL_I3C_Ctrl_TransmitCCC_DMA()
3016 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Ctrl_TransmitCCC_DMA()
3017 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Ctrl_TransmitCCC_DMA()
3020 handle_state = hi3c->State; in HAL_I3C_Ctrl_TransmitCCC_DMA()
3024 ((hi3c->TxXferCount != 0U) && (pXferData->TxBuf.pBuffer == NULL))) in HAL_I3C_Ctrl_TransmitCCC_DMA()
3026 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_Ctrl_TransmitCCC_DMA()
3030 else if ((hi3c->hdmatx == NULL) || (hi3c->hdmacr == NULL)) in HAL_I3C_Ctrl_TransmitCCC_DMA()
3032 hi3c->ErrorCode = HAL_I3C_ERROR_DMA_PARAM; in HAL_I3C_Ctrl_TransmitCCC_DMA()
3036 else if (hi3c->Mode != HAL_I3C_MODE_CONTROLLER) in HAL_I3C_Ctrl_TransmitCCC_DMA()
3038 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Ctrl_TransmitCCC_DMA()
3049 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in HAL_I3C_Ctrl_TransmitCCC_DMA()
3050 hi3c->XferISR = I3C_Ctrl_Tx_DMA_ISR; in HAL_I3C_Ctrl_TransmitCCC_DMA()
3051 hi3c->pXferData = pXferData; in HAL_I3C_Ctrl_TransmitCCC_DMA()
3052 hi3c->State = HAL_I3C_STATE_BUSY_TX; in HAL_I3C_Ctrl_TransmitCCC_DMA()
3056 hi3c->hdmacr->XferCpltCallback = I3C_DMAControlTransmitCplt; in HAL_I3C_Ctrl_TransmitCCC_DMA()
3059 hi3c->hdmacr->XferErrorCallback = I3C_DMAError; in HAL_I3C_Ctrl_TransmitCCC_DMA()
3062 hi3c->hdmacr->XferHalfCpltCallback = NULL; in HAL_I3C_Ctrl_TransmitCCC_DMA()
3063 hi3c->hdmacr->XferAbortCallback = NULL; in HAL_I3C_Ctrl_TransmitCCC_DMA()
3066 assert_param(IS_I3C_DMASOURCEWORD_VALUE(hi3c->hdmacr->Init.SrcDataWidth)); in HAL_I3C_Ctrl_TransmitCCC_DMA()
3067 assert_param(IS_I3C_DMADESTINATIONWORD_VALUE(hi3c->hdmacr->Init.DestDataWidth)); in HAL_I3C_Ctrl_TransmitCCC_DMA()
3070 … control_dma_status = HAL_DMA_Start_IT(hi3c->hdmacr, (uint32_t)hi3c->pXferData->CtrlBuf.pBuffer, in HAL_I3C_Ctrl_TransmitCCC_DMA()
3071 … (uint32_t)&hi3c->Instance->CR, (hi3c->ControlXferCount * 4U)); in HAL_I3C_Ctrl_TransmitCCC_DMA()
3075 if (hi3c->TxXferCount != 0U) in HAL_I3C_Ctrl_TransmitCCC_DMA()
3078 hi3c->hdmatx->XferCpltCallback = I3C_DMADataTransmitCplt; in HAL_I3C_Ctrl_TransmitCCC_DMA()
3081 hi3c->hdmatx->XferErrorCallback = I3C_DMAError; in HAL_I3C_Ctrl_TransmitCCC_DMA()
3084 hi3c->hdmatx->XferHalfCpltCallback = NULL; in HAL_I3C_Ctrl_TransmitCCC_DMA()
3085 hi3c->hdmatx->XferAbortCallback = NULL; in HAL_I3C_Ctrl_TransmitCCC_DMA()
3088 if (LL_I3C_GetTxFIFOThreshold(hi3c->Instance) == LL_I3C_TXFIFO_THRESHOLD_1_4) in HAL_I3C_Ctrl_TransmitCCC_DMA()
3091 assert_param(IS_I3C_DMASOURCEBYTE_VALUE(hi3c->hdmatx->Init.SrcDataWidth)); in HAL_I3C_Ctrl_TransmitCCC_DMA()
3092 assert_param(IS_I3C_DMADESTINATIONBYTE_VALUE(hi3c->hdmatx->Init.DestDataWidth)); in HAL_I3C_Ctrl_TransmitCCC_DMA()
3095 tx_dma_status = HAL_DMA_Start_IT(hi3c->hdmatx, (uint32_t)hi3c->pXferData->TxBuf.pBuffer, in HAL_I3C_Ctrl_TransmitCCC_DMA()
3096 … (uint32_t)&hi3c->Instance->TDR, hi3c->pXferData->TxBuf.Size); in HAL_I3C_Ctrl_TransmitCCC_DMA()
3101 assert_param(IS_I3C_DMASOURCEWORD_VALUE(hi3c->hdmatx->Init.SrcDataWidth)); in HAL_I3C_Ctrl_TransmitCCC_DMA()
3102 assert_param(IS_I3C_DMADESTINATIONWORD_VALUE(hi3c->hdmatx->Init.DestDataWidth)); in HAL_I3C_Ctrl_TransmitCCC_DMA()
3105 if ((hi3c->pXferData->TxBuf.Size % 4U) == 0U) in HAL_I3C_Ctrl_TransmitCCC_DMA()
3108 size_align_word = hi3c->pXferData->TxBuf.Size; in HAL_I3C_Ctrl_TransmitCCC_DMA()
3113 … size_align_word = ((hi3c->pXferData->TxBuf.Size + 4U) - (hi3c->pXferData->TxBuf.Size % 4U)); in HAL_I3C_Ctrl_TransmitCCC_DMA()
3117 tx_dma_status = HAL_DMA_Start_IT(hi3c->hdmatx, (uint32_t)hi3c->pXferData->TxBuf.pBuffer, in HAL_I3C_Ctrl_TransmitCCC_DMA()
3118 (uint32_t)&hi3c->Instance->TDWR, size_align_word); in HAL_I3C_Ctrl_TransmitCCC_DMA()
3129 I3C_Enable_IRQ(hi3c, I3C_XFER_DMA); in HAL_I3C_Ctrl_TransmitCCC_DMA()
3132 hi3c->ControlXferCount = 0U; in HAL_I3C_Ctrl_TransmitCCC_DMA()
3135 LL_I3C_EnableDMAReq_Control(hi3c->Instance); in HAL_I3C_Ctrl_TransmitCCC_DMA()
3138 if (hi3c->TxXferCount != 0U) in HAL_I3C_Ctrl_TransmitCCC_DMA()
3141 hi3c->TxXferCount = 0U; in HAL_I3C_Ctrl_TransmitCCC_DMA()
3144 LL_I3C_EnableDMAReq_TX(hi3c->Instance); in HAL_I3C_Ctrl_TransmitCCC_DMA()
3148 LL_I3C_RequestTransfer(hi3c->Instance); in HAL_I3C_Ctrl_TransmitCCC_DMA()
3153 if (HAL_DMA_Abort(hi3c->hdmacr) == HAL_OK) in HAL_I3C_Ctrl_TransmitCCC_DMA()
3155 hi3c->hdmacr->XferCpltCallback = NULL; in HAL_I3C_Ctrl_TransmitCCC_DMA()
3156 hi3c->hdmacr->XferErrorCallback = NULL; in HAL_I3C_Ctrl_TransmitCCC_DMA()
3160 if (HAL_DMA_Abort(hi3c->hdmatx) == HAL_OK) in HAL_I3C_Ctrl_TransmitCCC_DMA()
3162 hi3c->hdmatx->XferCpltCallback = NULL; in HAL_I3C_Ctrl_TransmitCCC_DMA()
3163 hi3c->hdmatx->XferErrorCallback = NULL; in HAL_I3C_Ctrl_TransmitCCC_DMA()
3166 hi3c->ErrorCode = HAL_I3C_ERROR_DMA; in HAL_I3C_Ctrl_TransmitCCC_DMA()
3170 I3C_StateUpdate(hi3c); in HAL_I3C_Ctrl_TransmitCCC_DMA()
3191 HAL_StatusTypeDef HAL_I3C_Ctrl_ReceiveCCC(I3C_HandleTypeDef *hi3c, in HAL_I3C_Ctrl_ReceiveCCC() argument
3201 if (hi3c == NULL) in HAL_I3C_Ctrl_ReceiveCCC()
3208 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Ctrl_ReceiveCCC()
3209 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Ctrl_ReceiveCCC()
3212 handle_state = hi3c->State; in HAL_I3C_Ctrl_ReceiveCCC()
3217 ((pXferData->TxBuf.pBuffer == NULL) && (hi3c->TxXferCount != 0U))) in HAL_I3C_Ctrl_ReceiveCCC()
3219 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_Ctrl_ReceiveCCC()
3223 else if (hi3c->Mode != HAL_I3C_MODE_CONTROLLER) in HAL_I3C_Ctrl_ReceiveCCC()
3225 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Ctrl_ReceiveCCC()
3236 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in HAL_I3C_Ctrl_ReceiveCCC()
3237 hi3c->State = HAL_I3C_STATE_BUSY_RX; in HAL_I3C_Ctrl_ReceiveCCC()
3238 hi3c->pXferData = pXferData; in HAL_I3C_Ctrl_ReceiveCCC()
3239 hi3c->RxXferCount = hi3c->pXferData->RxBuf.Size; in HAL_I3C_Ctrl_ReceiveCCC()
3242 if (hi3c->TxXferCount != 0U) in HAL_I3C_Ctrl_ReceiveCCC()
3245 if (LL_I3C_GetTxFIFOThreshold(hi3c->Instance) == LL_I3C_TXFIFO_THRESHOLD_1_4) in HAL_I3C_Ctrl_ReceiveCCC()
3248 hi3c->ptrTxFunc = &I3C_TransmitByteTreatment; in HAL_I3C_Ctrl_ReceiveCCC()
3253 hi3c->ptrTxFunc = &I3C_TransmitWordTreatment; in HAL_I3C_Ctrl_ReceiveCCC()
3258 if (LL_I3C_GetRxFIFOThreshold(hi3c->Instance) == LL_I3C_RXFIFO_THRESHOLD_1_4) in HAL_I3C_Ctrl_ReceiveCCC()
3261 hi3c->ptrRxFunc = &I3C_ReceiveByteTreatment; in HAL_I3C_Ctrl_ReceiveCCC()
3266 hi3c->ptrRxFunc = &I3C_ReceiveWordTreatment; in HAL_I3C_Ctrl_ReceiveCCC()
3273 if (LL_I3C_IsEnabledControlFIFO(hi3c->Instance) == 1U) in HAL_I3C_Ctrl_ReceiveCCC()
3276 LL_I3C_RequestTransfer(hi3c->Instance); in HAL_I3C_Ctrl_ReceiveCCC()
3281 hi3c->ControlXferCount--; in HAL_I3C_Ctrl_ReceiveCCC()
3284 WRITE_REG(hi3c->Instance->CR, *hi3c->pXferData->CtrlBuf.pBuffer); in HAL_I3C_Ctrl_ReceiveCCC()
3287 hi3c->pXferData->CtrlBuf.pBuffer++; in HAL_I3C_Ctrl_ReceiveCCC()
3294 I3C_ControlDataTreatment(hi3c); in HAL_I3C_Ctrl_ReceiveCCC()
3296 if (hi3c->TxXferCount != 0U) in HAL_I3C_Ctrl_ReceiveCCC()
3299 hi3c->ptrTxFunc(hi3c); in HAL_I3C_Ctrl_ReceiveCCC()
3303 hi3c->ptrRxFunc(hi3c); in HAL_I3C_Ctrl_ReceiveCCC()
3310 hi3c->ErrorCode = HAL_I3C_ERROR_TIMEOUT; in HAL_I3C_Ctrl_ReceiveCCC()
3317 if ((__HAL_I3C_GET_FLAG(hi3c, HAL_I3C_FLAG_FCF) == SET) && (hi3c->ControlXferCount > 0U)) in HAL_I3C_Ctrl_ReceiveCCC()
3320 LL_I3C_ClearFlag_FC(hi3c->Instance); in HAL_I3C_Ctrl_ReceiveCCC()
3323 LL_I3C_RequestTransfer(hi3c->Instance); in HAL_I3C_Ctrl_ReceiveCCC()
3327 exit_condition = (READ_REG(hi3c->Instance->EVR) & (I3C_EVR_FCF | I3C_EVR_ERRF)); in HAL_I3C_Ctrl_ReceiveCCC()
3329 ((exit_condition == I3C_EVR_FCF) && (hi3c->ControlXferCount > 0U))); in HAL_I3C_Ctrl_ReceiveCCC()
3332 if (__HAL_I3C_GET_FLAG(hi3c, HAL_I3C_FLAG_FCF) == SET) in HAL_I3C_Ctrl_ReceiveCCC()
3334 LL_I3C_ClearFlag_FC(hi3c->Instance); in HAL_I3C_Ctrl_ReceiveCCC()
3338 if ((hi3c->RxXferCount != 0U) && (status == HAL_OK)) in HAL_I3C_Ctrl_ReceiveCCC()
3340 hi3c->ErrorCode = HAL_I3C_ERROR_SIZE; in HAL_I3C_Ctrl_ReceiveCCC()
3345 if (__HAL_I3C_GET_FLAG(hi3c, HAL_I3C_FLAG_ERRF) == SET) in HAL_I3C_Ctrl_ReceiveCCC()
3348 LL_I3C_ClearFlag_ERR(hi3c->Instance); in HAL_I3C_Ctrl_ReceiveCCC()
3351 I3C_GetErrorSources(hi3c); in HAL_I3C_Ctrl_ReceiveCCC()
3358 I3C_StateUpdate(hi3c); in HAL_I3C_Ctrl_ReceiveCCC()
3376 HAL_StatusTypeDef HAL_I3C_Ctrl_ReceiveCCC_IT(I3C_HandleTypeDef *hi3c, in HAL_I3C_Ctrl_ReceiveCCC_IT() argument
3383 if (hi3c == NULL) in HAL_I3C_Ctrl_ReceiveCCC_IT()
3390 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Ctrl_ReceiveCCC_IT()
3391 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Ctrl_ReceiveCCC_IT()
3394 handle_state = hi3c->State; in HAL_I3C_Ctrl_ReceiveCCC_IT()
3399 ((pXferData->TxBuf.pBuffer == NULL) && (hi3c->TxXferCount != 0U))) in HAL_I3C_Ctrl_ReceiveCCC_IT()
3401 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_Ctrl_ReceiveCCC_IT()
3405 else if (hi3c->Mode != HAL_I3C_MODE_CONTROLLER) in HAL_I3C_Ctrl_ReceiveCCC_IT()
3407 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Ctrl_ReceiveCCC_IT()
3418 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in HAL_I3C_Ctrl_ReceiveCCC_IT()
3421 hi3c->XferISR = I3C_Ctrl_Rx_Listen_Event_ISR; in HAL_I3C_Ctrl_ReceiveCCC_IT()
3425 hi3c->XferISR = I3C_Ctrl_Rx_ISR; in HAL_I3C_Ctrl_ReceiveCCC_IT()
3427 hi3c->pXferData = pXferData; in HAL_I3C_Ctrl_ReceiveCCC_IT()
3428 hi3c->RxXferCount = pXferData->RxBuf.Size; in HAL_I3C_Ctrl_ReceiveCCC_IT()
3429 hi3c->State = HAL_I3C_STATE_BUSY_RX; in HAL_I3C_Ctrl_ReceiveCCC_IT()
3432 if (hi3c->TxXferCount != 0U) in HAL_I3C_Ctrl_ReceiveCCC_IT()
3435 if (LL_I3C_GetTxFIFOThreshold(hi3c->Instance) == LL_I3C_TXFIFO_THRESHOLD_1_4) in HAL_I3C_Ctrl_ReceiveCCC_IT()
3438 hi3c->ptrTxFunc = &I3C_TransmitByteTreatment; in HAL_I3C_Ctrl_ReceiveCCC_IT()
3443 hi3c->ptrTxFunc = &I3C_TransmitWordTreatment; in HAL_I3C_Ctrl_ReceiveCCC_IT()
3448 if (LL_I3C_GetRxFIFOThreshold(hi3c->Instance) == LL_I3C_RXFIFO_THRESHOLD_1_4) in HAL_I3C_Ctrl_ReceiveCCC_IT()
3451 hi3c->ptrRxFunc = &I3C_ReceiveByteTreatment; in HAL_I3C_Ctrl_ReceiveCCC_IT()
3456 hi3c->ptrRxFunc = &I3C_ReceiveWordTreatment; in HAL_I3C_Ctrl_ReceiveCCC_IT()
3463 I3C_Enable_IRQ(hi3c, I3C_XFER_CONTROLLER_RX_CCC_IT); in HAL_I3C_Ctrl_ReceiveCCC_IT()
3466 LL_I3C_RequestTransfer(hi3c->Instance); in HAL_I3C_Ctrl_ReceiveCCC_IT()
3485 HAL_StatusTypeDef HAL_I3C_Ctrl_ReceiveCCC_DMA(I3C_HandleTypeDef *hi3c, in HAL_I3C_Ctrl_ReceiveCCC_DMA() argument
3496 if (hi3c == NULL) in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3503 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3504 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3507 handle_state = hi3c->State; in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3512 ((pXferData->TxBuf.pBuffer == NULL) && (hi3c->TxXferCount != 0U))) in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3514 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3518 else if ((hi3c->hdmarx == NULL) || (hi3c->hdmacr == NULL)) in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3520 hi3c->ErrorCode = HAL_I3C_ERROR_DMA_PARAM; in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3523 else if ((hi3c->TxXferCount != 0U) && (hi3c->hdmatx == NULL)) in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3525 hi3c->ErrorCode = HAL_I3C_ERROR_DMA_PARAM; in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3529 else if (hi3c->Mode != HAL_I3C_MODE_CONTROLLER) in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3531 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3542 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3543 hi3c->XferISR = I3C_Ctrl_Rx_DMA_ISR; in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3544 hi3c->pXferData = pXferData; in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3545 hi3c->RxXferCount = hi3c->pXferData->RxBuf.Size; in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3546 hi3c->State = HAL_I3C_STATE_BUSY_RX; in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3550 hi3c->hdmacr->XferCpltCallback = I3C_DMAControlTransmitCplt; in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3553 hi3c->hdmacr->XferErrorCallback = I3C_DMAError; in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3556 hi3c->hdmacr->XferHalfCpltCallback = NULL; in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3557 hi3c->hdmacr->XferAbortCallback = NULL; in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3560 assert_param(IS_I3C_DMASOURCEWORD_VALUE(hi3c->hdmacr->Init.SrcDataWidth)); in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3561 assert_param(IS_I3C_DMADESTINATIONWORD_VALUE(hi3c->hdmacr->Init.DestDataWidth)); in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3564 … control_dma_status = HAL_DMA_Start_IT(hi3c->hdmacr, (uint32_t)hi3c->pXferData->CtrlBuf.pBuffer, in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3565 … (uint32_t)&hi3c->Instance->CR, (hi3c->ControlXferCount * 4U)); in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3569 if (hi3c->TxXferCount != 0U) in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3572 hi3c->hdmatx->XferCpltCallback = I3C_DMADataTransmitCplt; in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3575 hi3c->hdmatx->XferErrorCallback = I3C_DMAError; in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3578 hi3c->hdmatx->XferHalfCpltCallback = NULL; in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3579 hi3c->hdmatx->XferAbortCallback = NULL; in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3582 if (LL_I3C_GetTxFIFOThreshold(hi3c->Instance) == LL_I3C_TXFIFO_THRESHOLD_1_4) in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3585 assert_param(IS_I3C_DMASOURCEBYTE_VALUE(hi3c->hdmatx->Init.SrcDataWidth)); in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3586 assert_param(IS_I3C_DMADESTINATIONBYTE_VALUE(hi3c->hdmatx->Init.DestDataWidth)); in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3589 tx_dma_status = HAL_DMA_Start_IT(hi3c->hdmatx, (uint32_t)hi3c->pXferData->TxBuf.pBuffer, in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3590 … (uint32_t)&hi3c->Instance->TDR, hi3c->pXferData->TxBuf.Size); in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3595 assert_param(IS_I3C_DMASOURCEWORD_VALUE(hi3c->hdmatx->Init.SrcDataWidth)); in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3596 assert_param(IS_I3C_DMADESTINATIONWORD_VALUE(hi3c->hdmatx->Init.DestDataWidth)); in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3599 … size_align_word = ((hi3c->pXferData->TxBuf.Size + 4U) - (hi3c->pXferData->TxBuf.Size % 4U)); in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3602 tx_dma_status = HAL_DMA_Start_IT(hi3c->hdmatx, (uint32_t)hi3c->pXferData->TxBuf.pBuffer, in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3603 (uint32_t)&hi3c->Instance->TDWR, size_align_word); in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3608 if (hi3c->RxXferCount != 0U) in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3611 hi3c->hdmarx->XferCpltCallback = I3C_DMADataReceiveCplt; in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3614 hi3c->hdmarx->XferErrorCallback = I3C_DMAError; in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3617 hi3c->hdmarx->XferHalfCpltCallback = NULL; in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3618 hi3c->hdmarx->XferAbortCallback = NULL; in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3621 if (LL_I3C_GetRxFIFOThreshold(hi3c->Instance) == LL_I3C_RXFIFO_THRESHOLD_1_4) in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3624 assert_param(IS_I3C_DMASOURCEBYTE_VALUE(hi3c->hdmarx->Init.SrcDataWidth)); in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3625 assert_param(IS_I3C_DMADESTINATIONBYTE_VALUE(hi3c->hdmarx->Init.DestDataWidth)); in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3628 rx_dma_status = HAL_DMA_Start_IT(hi3c->hdmarx, (uint32_t)&hi3c->Instance->RDR, in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3629 … (uint32_t)hi3c->pXferData->RxBuf.pBuffer, hi3c->pXferData->RxBuf.Size); in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3634 assert_param(IS_I3C_DMASOURCEWORD_VALUE(hi3c->hdmarx->Init.SrcDataWidth)); in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3635 assert_param(IS_I3C_DMADESTINATIONWORD_VALUE(hi3c->hdmarx->Init.DestDataWidth)); in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3638 if ((hi3c->pXferData->RxBuf.Size % 4U) == 0U) in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3641 size_align_word = hi3c->pXferData->RxBuf.Size; in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3646 … size_align_word = ((hi3c->pXferData->RxBuf.Size + 4U) - (hi3c->pXferData->RxBuf.Size % 4U)); in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3650 rx_dma_status = HAL_DMA_Start_IT(hi3c->hdmarx, (uint32_t)&hi3c->Instance->RDWR, in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3651 … (uint32_t)hi3c->pXferData->RxBuf.pBuffer, size_align_word); in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3662 I3C_Enable_IRQ(hi3c, I3C_XFER_DMA); in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3665 hi3c->ControlXferCount = 0U; in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3668 LL_I3C_EnableDMAReq_Control(hi3c->Instance); in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3671 if (hi3c->TxXferCount != 0U) in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3674 hi3c->TxXferCount = 0U; in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3677 LL_I3C_EnableDMAReq_TX(hi3c->Instance); in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3681 if (hi3c->RxXferCount != 0U) in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3684 hi3c->RxXferCount = 0U; in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3687 LL_I3C_EnableDMAReq_RX(hi3c->Instance); in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3691 LL_I3C_RequestTransfer(hi3c->Instance); in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3696 if (HAL_DMA_Abort(hi3c->hdmacr) == HAL_OK) in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3698 hi3c->hdmacr->XferCpltCallback = NULL; in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3699 hi3c->hdmacr->XferErrorCallback = NULL; in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3703 if (HAL_DMA_Abort(hi3c->hdmatx) == HAL_OK) in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3705 hi3c->hdmatx->XferCpltCallback = NULL; in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3706 hi3c->hdmatx->XferErrorCallback = NULL; in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3710 if (HAL_DMA_Abort(hi3c->hdmarx) == HAL_OK) in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3712 hi3c->hdmarx->XferCpltCallback = NULL; in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3713 hi3c->hdmarx->XferErrorCallback = NULL; in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3716 hi3c->ErrorCode = HAL_I3C_ERROR_DMA; in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3720 I3C_StateUpdate(hi3c); in HAL_I3C_Ctrl_ReceiveCCC_DMA()
3743 HAL_StatusTypeDef HAL_I3C_Ctrl_Transmit(I3C_HandleTypeDef *hi3c, in HAL_I3C_Ctrl_Transmit() argument
3753 if (hi3c == NULL) in HAL_I3C_Ctrl_Transmit()
3760 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Ctrl_Transmit()
3761 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Ctrl_Transmit()
3764 handle_state = hi3c->State; in HAL_I3C_Ctrl_Transmit()
3768 ((hi3c->TxXferCount != 0U) && (pXferData->TxBuf.pBuffer == NULL))) in HAL_I3C_Ctrl_Transmit()
3770 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_Ctrl_Transmit()
3774 else if (hi3c->Mode != HAL_I3C_MODE_CONTROLLER) in HAL_I3C_Ctrl_Transmit()
3776 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Ctrl_Transmit()
3787 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in HAL_I3C_Ctrl_Transmit()
3788 hi3c->State = HAL_I3C_STATE_BUSY_TX; in HAL_I3C_Ctrl_Transmit()
3789 hi3c->pXferData = pXferData; in HAL_I3C_Ctrl_Transmit()
3792 if (LL_I3C_GetTxFIFOThreshold(hi3c->Instance) == LL_I3C_TXFIFO_THRESHOLD_1_4) in HAL_I3C_Ctrl_Transmit()
3795 hi3c->ptrTxFunc = &I3C_TransmitByteTreatment; in HAL_I3C_Ctrl_Transmit()
3800 hi3c->ptrTxFunc = &I3C_TransmitWordTreatment; in HAL_I3C_Ctrl_Transmit()
3807 if (LL_I3C_IsEnabledControlFIFO(hi3c->Instance) == 1U) in HAL_I3C_Ctrl_Transmit()
3810 LL_I3C_RequestTransfer(hi3c->Instance); in HAL_I3C_Ctrl_Transmit()
3815 hi3c->ControlXferCount--; in HAL_I3C_Ctrl_Transmit()
3818 WRITE_REG(hi3c->Instance->CR, *hi3c->pXferData->CtrlBuf.pBuffer); in HAL_I3C_Ctrl_Transmit()
3821 hi3c->pXferData->CtrlBuf.pBuffer++; in HAL_I3C_Ctrl_Transmit()
3828 I3C_ControlDataTreatment(hi3c); in HAL_I3C_Ctrl_Transmit()
3831 hi3c->ptrTxFunc(hi3c); in HAL_I3C_Ctrl_Transmit()
3838 hi3c->ErrorCode = HAL_I3C_ERROR_TIMEOUT; in HAL_I3C_Ctrl_Transmit()
3845 if ((__HAL_I3C_GET_FLAG(hi3c, HAL_I3C_FLAG_FCF) == SET) && (hi3c->ControlXferCount > 0U)) in HAL_I3C_Ctrl_Transmit()
3848 LL_I3C_ClearFlag_FC(hi3c->Instance); in HAL_I3C_Ctrl_Transmit()
3851 LL_I3C_RequestTransfer(hi3c->Instance); in HAL_I3C_Ctrl_Transmit()
3855 exit_condition = (READ_REG(hi3c->Instance->EVR) & (I3C_EVR_FCF | I3C_EVR_ERRF)); in HAL_I3C_Ctrl_Transmit()
3857 ((exit_condition == I3C_EVR_FCF) && (hi3c->ControlXferCount > 0U))); in HAL_I3C_Ctrl_Transmit()
3860 if (__HAL_I3C_GET_FLAG(hi3c, HAL_I3C_FLAG_FCF) == SET) in HAL_I3C_Ctrl_Transmit()
3862 LL_I3C_ClearFlag_FC(hi3c->Instance); in HAL_I3C_Ctrl_Transmit()
3866 if ((hi3c->TxXferCount != 0U) && (status == HAL_OK)) in HAL_I3C_Ctrl_Transmit()
3868 hi3c->ErrorCode = HAL_I3C_ERROR_SIZE; in HAL_I3C_Ctrl_Transmit()
3873 if (__HAL_I3C_GET_FLAG(hi3c, HAL_I3C_FLAG_ERRF) == SET) in HAL_I3C_Ctrl_Transmit()
3876 LL_I3C_ClearFlag_ERR(hi3c->Instance); in HAL_I3C_Ctrl_Transmit()
3879 I3C_GetErrorSources(hi3c); in HAL_I3C_Ctrl_Transmit()
3886 I3C_StateUpdate(hi3c); in HAL_I3C_Ctrl_Transmit()
3906 HAL_StatusTypeDef HAL_I3C_Ctrl_Transmit_IT(I3C_HandleTypeDef *hi3c, in HAL_I3C_Ctrl_Transmit_IT() argument
3913 if (hi3c == NULL) in HAL_I3C_Ctrl_Transmit_IT()
3920 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Ctrl_Transmit_IT()
3921 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Ctrl_Transmit_IT()
3924 handle_state = hi3c->State; in HAL_I3C_Ctrl_Transmit_IT()
3928 ((hi3c->TxXferCount != 0U) && (pXferData->TxBuf.pBuffer == NULL))) in HAL_I3C_Ctrl_Transmit_IT()
3930 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_Ctrl_Transmit_IT()
3934 else if (hi3c->Mode != HAL_I3C_MODE_CONTROLLER) in HAL_I3C_Ctrl_Transmit_IT()
3936 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Ctrl_Transmit_IT()
3947 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in HAL_I3C_Ctrl_Transmit_IT()
3950 hi3c->XferISR = I3C_Ctrl_Tx_Listen_Event_ISR; in HAL_I3C_Ctrl_Transmit_IT()
3954 hi3c->XferISR = I3C_Ctrl_Tx_ISR; in HAL_I3C_Ctrl_Transmit_IT()
3956 hi3c->pXferData = pXferData; in HAL_I3C_Ctrl_Transmit_IT()
3957 hi3c->State = HAL_I3C_STATE_BUSY_TX; in HAL_I3C_Ctrl_Transmit_IT()
3960 if (LL_I3C_GetTxFIFOThreshold(hi3c->Instance) == LL_I3C_TXFIFO_THRESHOLD_1_4) in HAL_I3C_Ctrl_Transmit_IT()
3963 hi3c->ptrTxFunc = &I3C_TransmitByteTreatment; in HAL_I3C_Ctrl_Transmit_IT()
3968 hi3c->ptrTxFunc = &I3C_TransmitWordTreatment; in HAL_I3C_Ctrl_Transmit_IT()
3975 I3C_Enable_IRQ(hi3c, I3C_XFER_CONTROLLER_TX_IT); in HAL_I3C_Ctrl_Transmit_IT()
3978 LL_I3C_RequestTransfer(hi3c->Instance); in HAL_I3C_Ctrl_Transmit_IT()
3999 HAL_StatusTypeDef HAL_I3C_Ctrl_Transmit_DMA(I3C_HandleTypeDef *hi3c, in HAL_I3C_Ctrl_Transmit_DMA() argument
4009 if (hi3c == NULL) in HAL_I3C_Ctrl_Transmit_DMA()
4016 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Ctrl_Transmit_DMA()
4017 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Ctrl_Transmit_DMA()
4020 handle_state = hi3c->State; in HAL_I3C_Ctrl_Transmit_DMA()
4024 ((hi3c->TxXferCount != 0U) && (pXferData->TxBuf.pBuffer == NULL))) in HAL_I3C_Ctrl_Transmit_DMA()
4026 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_Ctrl_Transmit_DMA()
4030 else if ((hi3c->hdmatx == NULL) || (hi3c->hdmacr == NULL)) in HAL_I3C_Ctrl_Transmit_DMA()
4032 hi3c->ErrorCode = HAL_I3C_ERROR_DMA_PARAM; in HAL_I3C_Ctrl_Transmit_DMA()
4036 else if (hi3c->Mode != HAL_I3C_MODE_CONTROLLER) in HAL_I3C_Ctrl_Transmit_DMA()
4038 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Ctrl_Transmit_DMA()
4049 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in HAL_I3C_Ctrl_Transmit_DMA()
4050 hi3c->XferISR = I3C_Ctrl_Tx_DMA_ISR; in HAL_I3C_Ctrl_Transmit_DMA()
4051 hi3c->State = HAL_I3C_STATE_BUSY_TX; in HAL_I3C_Ctrl_Transmit_DMA()
4052 hi3c->pXferData = pXferData; in HAL_I3C_Ctrl_Transmit_DMA()
4056 hi3c->hdmacr->XferCpltCallback = I3C_DMAControlTransmitCplt; in HAL_I3C_Ctrl_Transmit_DMA()
4059 hi3c->hdmacr->XferErrorCallback = I3C_DMAError; in HAL_I3C_Ctrl_Transmit_DMA()
4062 hi3c->hdmacr->XferHalfCpltCallback = NULL; in HAL_I3C_Ctrl_Transmit_DMA()
4063 hi3c->hdmacr->XferAbortCallback = NULL; in HAL_I3C_Ctrl_Transmit_DMA()
4066 assert_param(IS_I3C_DMASOURCEWORD_VALUE(hi3c->hdmacr->Init.SrcDataWidth)); in HAL_I3C_Ctrl_Transmit_DMA()
4067 assert_param(IS_I3C_DMADESTINATIONWORD_VALUE(hi3c->hdmacr->Init.DestDataWidth)); in HAL_I3C_Ctrl_Transmit_DMA()
4070 … control_dma_status = HAL_DMA_Start_IT(hi3c->hdmacr, (uint32_t)hi3c->pXferData->CtrlBuf.pBuffer, in HAL_I3C_Ctrl_Transmit_DMA()
4071 … (uint32_t)&hi3c->Instance->CR, (hi3c->ControlXferCount * 4U)); in HAL_I3C_Ctrl_Transmit_DMA()
4075 if (hi3c->TxXferCount != 0U) in HAL_I3C_Ctrl_Transmit_DMA()
4078 hi3c->hdmatx->XferCpltCallback = I3C_DMADataTransmitCplt; in HAL_I3C_Ctrl_Transmit_DMA()
4081 hi3c->hdmatx->XferErrorCallback = I3C_DMAError; in HAL_I3C_Ctrl_Transmit_DMA()
4084 hi3c->hdmatx->XferHalfCpltCallback = NULL; in HAL_I3C_Ctrl_Transmit_DMA()
4085 hi3c->hdmatx->XferAbortCallback = NULL; in HAL_I3C_Ctrl_Transmit_DMA()
4088 if (LL_I3C_GetTxFIFOThreshold(hi3c->Instance) == LL_I3C_TXFIFO_THRESHOLD_1_4) in HAL_I3C_Ctrl_Transmit_DMA()
4091 assert_param(IS_I3C_DMASOURCEBYTE_VALUE(hi3c->hdmatx->Init.SrcDataWidth)); in HAL_I3C_Ctrl_Transmit_DMA()
4092 assert_param(IS_I3C_DMADESTINATIONBYTE_VALUE(hi3c->hdmatx->Init.DestDataWidth)); in HAL_I3C_Ctrl_Transmit_DMA()
4095 tx_dma_status = HAL_DMA_Start_IT(hi3c->hdmatx, (uint32_t)hi3c->pXferData->TxBuf.pBuffer, in HAL_I3C_Ctrl_Transmit_DMA()
4096 … (uint32_t)&hi3c->Instance->TDR, hi3c->pXferData->TxBuf.Size); in HAL_I3C_Ctrl_Transmit_DMA()
4101 assert_param(IS_I3C_DMASOURCEWORD_VALUE(hi3c->hdmatx->Init.SrcDataWidth)); in HAL_I3C_Ctrl_Transmit_DMA()
4102 assert_param(IS_I3C_DMADESTINATIONWORD_VALUE(hi3c->hdmatx->Init.DestDataWidth)); in HAL_I3C_Ctrl_Transmit_DMA()
4105 if ((hi3c->pXferData->TxBuf.Size % 4U) == 0U) in HAL_I3C_Ctrl_Transmit_DMA()
4108 size_align_word = hi3c->pXferData->TxBuf.Size; in HAL_I3C_Ctrl_Transmit_DMA()
4113 … size_align_word = ((hi3c->pXferData->TxBuf.Size + 4U) - (hi3c->pXferData->TxBuf.Size % 4U)); in HAL_I3C_Ctrl_Transmit_DMA()
4117 tx_dma_status = HAL_DMA_Start_IT(hi3c->hdmatx, (uint32_t)hi3c->pXferData->TxBuf.pBuffer, in HAL_I3C_Ctrl_Transmit_DMA()
4118 (uint32_t)&hi3c->Instance->TDWR, size_align_word); in HAL_I3C_Ctrl_Transmit_DMA()
4129 I3C_Enable_IRQ(hi3c, I3C_XFER_DMA); in HAL_I3C_Ctrl_Transmit_DMA()
4132 hi3c->ControlXferCount = 0U; in HAL_I3C_Ctrl_Transmit_DMA()
4135 LL_I3C_EnableDMAReq_Control(hi3c->Instance); in HAL_I3C_Ctrl_Transmit_DMA()
4138 if (hi3c->TxXferCount != 0U) in HAL_I3C_Ctrl_Transmit_DMA()
4141 hi3c->TxXferCount = 0U; in HAL_I3C_Ctrl_Transmit_DMA()
4144 LL_I3C_EnableDMAReq_TX(hi3c->Instance); in HAL_I3C_Ctrl_Transmit_DMA()
4148 LL_I3C_RequestTransfer(hi3c->Instance); in HAL_I3C_Ctrl_Transmit_DMA()
4153 if (HAL_DMA_Abort(hi3c->hdmacr) == HAL_OK) in HAL_I3C_Ctrl_Transmit_DMA()
4155 hi3c->hdmacr->XferCpltCallback = NULL; in HAL_I3C_Ctrl_Transmit_DMA()
4156 hi3c->hdmacr->XferErrorCallback = NULL; in HAL_I3C_Ctrl_Transmit_DMA()
4160 if (HAL_DMA_Abort(hi3c->hdmatx) == HAL_OK) in HAL_I3C_Ctrl_Transmit_DMA()
4162 hi3c->hdmatx->XferCpltCallback = NULL; in HAL_I3C_Ctrl_Transmit_DMA()
4163 hi3c->hdmatx->XferErrorCallback = NULL; in HAL_I3C_Ctrl_Transmit_DMA()
4166 hi3c->ErrorCode = HAL_I3C_ERROR_DMA; in HAL_I3C_Ctrl_Transmit_DMA()
4170 I3C_StateUpdate(hi3c); in HAL_I3C_Ctrl_Transmit_DMA()
4191 HAL_StatusTypeDef HAL_I3C_Ctrl_Receive(I3C_HandleTypeDef *hi3c, in HAL_I3C_Ctrl_Receive() argument
4201 if (hi3c == NULL) in HAL_I3C_Ctrl_Receive()
4208 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Ctrl_Receive()
4209 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Ctrl_Receive()
4212 handle_state = hi3c->State; in HAL_I3C_Ctrl_Receive()
4217 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_Ctrl_Receive()
4221 else if (hi3c->Mode != HAL_I3C_MODE_CONTROLLER) in HAL_I3C_Ctrl_Receive()
4223 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Ctrl_Receive()
4234 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in HAL_I3C_Ctrl_Receive()
4235 hi3c->State = HAL_I3C_STATE_BUSY_RX; in HAL_I3C_Ctrl_Receive()
4236 hi3c->pXferData = pXferData; in HAL_I3C_Ctrl_Receive()
4237 hi3c->RxXferCount = hi3c->pXferData->RxBuf.Size; in HAL_I3C_Ctrl_Receive()
4240 if (LL_I3C_GetRxFIFOThreshold(hi3c->Instance) == LL_I3C_RXFIFO_THRESHOLD_1_4) in HAL_I3C_Ctrl_Receive()
4243 hi3c->ptrRxFunc = &I3C_ReceiveByteTreatment; in HAL_I3C_Ctrl_Receive()
4248 hi3c->ptrRxFunc = &I3C_ReceiveWordTreatment; in HAL_I3C_Ctrl_Receive()
4255 if (LL_I3C_IsEnabledControlFIFO(hi3c->Instance) == 1U) in HAL_I3C_Ctrl_Receive()
4258 LL_I3C_RequestTransfer(hi3c->Instance); in HAL_I3C_Ctrl_Receive()
4263 hi3c->ControlXferCount--; in HAL_I3C_Ctrl_Receive()
4266 WRITE_REG(hi3c->Instance->CR, *hi3c->pXferData->CtrlBuf.pBuffer); in HAL_I3C_Ctrl_Receive()
4269 hi3c->pXferData->CtrlBuf.pBuffer++; in HAL_I3C_Ctrl_Receive()
4276 I3C_ControlDataTreatment(hi3c); in HAL_I3C_Ctrl_Receive()
4279 hi3c->ptrRxFunc(hi3c); in HAL_I3C_Ctrl_Receive()
4286 hi3c->ErrorCode = HAL_I3C_ERROR_TIMEOUT; in HAL_I3C_Ctrl_Receive()
4293 if ((__HAL_I3C_GET_FLAG(hi3c, HAL_I3C_FLAG_FCF) == SET) && (hi3c->ControlXferCount > 0U)) in HAL_I3C_Ctrl_Receive()
4296 LL_I3C_ClearFlag_FC(hi3c->Instance); in HAL_I3C_Ctrl_Receive()
4299 LL_I3C_RequestTransfer(hi3c->Instance); in HAL_I3C_Ctrl_Receive()
4303 exit_condition = (READ_REG(hi3c->Instance->EVR) & (I3C_EVR_FCF | I3C_EVR_ERRF)); in HAL_I3C_Ctrl_Receive()
4305 ((exit_condition == I3C_EVR_FCF) && (hi3c->ControlXferCount > 0U))); in HAL_I3C_Ctrl_Receive()
4308 if (__HAL_I3C_GET_FLAG(hi3c, HAL_I3C_FLAG_FCF) == SET) in HAL_I3C_Ctrl_Receive()
4310 LL_I3C_ClearFlag_FC(hi3c->Instance); in HAL_I3C_Ctrl_Receive()
4314 if ((hi3c->RxXferCount != 0U) && (status == HAL_OK)) in HAL_I3C_Ctrl_Receive()
4316 hi3c->ErrorCode = HAL_I3C_ERROR_SIZE; in HAL_I3C_Ctrl_Receive()
4321 if (__HAL_I3C_GET_FLAG(hi3c, HAL_I3C_FLAG_ERRF) == SET) in HAL_I3C_Ctrl_Receive()
4324 LL_I3C_ClearFlag_ERR(hi3c->Instance); in HAL_I3C_Ctrl_Receive()
4327 I3C_GetErrorSources(hi3c); in HAL_I3C_Ctrl_Receive()
4334 I3C_StateUpdate(hi3c); in HAL_I3C_Ctrl_Receive()
4352 HAL_StatusTypeDef HAL_I3C_Ctrl_Receive_IT(I3C_HandleTypeDef *hi3c, in HAL_I3C_Ctrl_Receive_IT() argument
4359 if (hi3c == NULL) in HAL_I3C_Ctrl_Receive_IT()
4366 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Ctrl_Receive_IT()
4367 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Ctrl_Receive_IT()
4370 handle_state = hi3c->State; in HAL_I3C_Ctrl_Receive_IT()
4375 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_Ctrl_Receive_IT()
4379 else if (hi3c->Mode != HAL_I3C_MODE_CONTROLLER) in HAL_I3C_Ctrl_Receive_IT()
4381 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Ctrl_Receive_IT()
4392 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in HAL_I3C_Ctrl_Receive_IT()
4395 hi3c->XferISR = I3C_Ctrl_Rx_Listen_Event_ISR; in HAL_I3C_Ctrl_Receive_IT()
4399 hi3c->XferISR = I3C_Ctrl_Rx_ISR; in HAL_I3C_Ctrl_Receive_IT()
4401 hi3c->pXferData = pXferData; in HAL_I3C_Ctrl_Receive_IT()
4402 hi3c->RxXferCount = hi3c->pXferData->RxBuf.Size; in HAL_I3C_Ctrl_Receive_IT()
4403 hi3c->State = HAL_I3C_STATE_BUSY_RX; in HAL_I3C_Ctrl_Receive_IT()
4406 if (LL_I3C_GetRxFIFOThreshold(hi3c->Instance) == LL_I3C_RXFIFO_THRESHOLD_1_4) in HAL_I3C_Ctrl_Receive_IT()
4409 hi3c->ptrRxFunc = &I3C_ReceiveByteTreatment; in HAL_I3C_Ctrl_Receive_IT()
4414 hi3c->ptrRxFunc = &I3C_ReceiveWordTreatment; in HAL_I3C_Ctrl_Receive_IT()
4421 I3C_Enable_IRQ(hi3c, I3C_XFER_CONTROLLER_RX_IT); in HAL_I3C_Ctrl_Receive_IT()
4424 LL_I3C_RequestTransfer(hi3c->Instance); in HAL_I3C_Ctrl_Receive_IT()
4443 HAL_StatusTypeDef HAL_I3C_Ctrl_Receive_DMA(I3C_HandleTypeDef *hi3c, in HAL_I3C_Ctrl_Receive_DMA() argument
4453 if (hi3c == NULL) in HAL_I3C_Ctrl_Receive_DMA()
4460 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Ctrl_Receive_DMA()
4461 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Ctrl_Receive_DMA()
4464 handle_state = hi3c->State; in HAL_I3C_Ctrl_Receive_DMA()
4469 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_Ctrl_Receive_DMA()
4473 else if ((hi3c->hdmarx == NULL) || (hi3c->hdmacr == NULL)) in HAL_I3C_Ctrl_Receive_DMA()
4475 hi3c->ErrorCode = HAL_I3C_ERROR_DMA_PARAM; in HAL_I3C_Ctrl_Receive_DMA()
4479 else if (hi3c->Mode != HAL_I3C_MODE_CONTROLLER) in HAL_I3C_Ctrl_Receive_DMA()
4481 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Ctrl_Receive_DMA()
4492 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in HAL_I3C_Ctrl_Receive_DMA()
4493 hi3c->XferISR = I3C_Ctrl_Rx_DMA_ISR; in HAL_I3C_Ctrl_Receive_DMA()
4494 hi3c->pXferData = pXferData; in HAL_I3C_Ctrl_Receive_DMA()
4495 hi3c->RxXferCount = hi3c->pXferData->RxBuf.Size; in HAL_I3C_Ctrl_Receive_DMA()
4496 hi3c->State = HAL_I3C_STATE_BUSY_RX; in HAL_I3C_Ctrl_Receive_DMA()
4500 hi3c->hdmacr->XferCpltCallback = I3C_DMAControlTransmitCplt; in HAL_I3C_Ctrl_Receive_DMA()
4503 hi3c->hdmacr->XferErrorCallback = I3C_DMAError; in HAL_I3C_Ctrl_Receive_DMA()
4506 hi3c->hdmacr->XferHalfCpltCallback = NULL; in HAL_I3C_Ctrl_Receive_DMA()
4507 hi3c->hdmacr->XferAbortCallback = NULL; in HAL_I3C_Ctrl_Receive_DMA()
4510 assert_param(IS_I3C_DMASOURCEWORD_VALUE(hi3c->hdmacr->Init.SrcDataWidth)); in HAL_I3C_Ctrl_Receive_DMA()
4511 assert_param(IS_I3C_DMADESTINATIONWORD_VALUE(hi3c->hdmacr->Init.DestDataWidth)); in HAL_I3C_Ctrl_Receive_DMA()
4514 … control_dma_status = HAL_DMA_Start_IT(hi3c->hdmacr, (uint32_t)hi3c->pXferData->CtrlBuf.pBuffer, in HAL_I3C_Ctrl_Receive_DMA()
4515 … (uint32_t)&hi3c->Instance->CR, (hi3c->ControlXferCount * 4U)); in HAL_I3C_Ctrl_Receive_DMA()
4519 if (hi3c->RxXferCount != 0U) in HAL_I3C_Ctrl_Receive_DMA()
4522 hi3c->hdmarx->XferCpltCallback = I3C_DMADataReceiveCplt; in HAL_I3C_Ctrl_Receive_DMA()
4525 hi3c->hdmarx->XferErrorCallback = I3C_DMAError; in HAL_I3C_Ctrl_Receive_DMA()
4528 hi3c->hdmarx->XferHalfCpltCallback = NULL; in HAL_I3C_Ctrl_Receive_DMA()
4529 hi3c->hdmarx->XferAbortCallback = NULL; in HAL_I3C_Ctrl_Receive_DMA()
4532 if (LL_I3C_GetRxFIFOThreshold(hi3c->Instance) == LL_I3C_RXFIFO_THRESHOLD_1_4) in HAL_I3C_Ctrl_Receive_DMA()
4535 assert_param(IS_I3C_DMASOURCEBYTE_VALUE(hi3c->hdmarx->Init.SrcDataWidth)); in HAL_I3C_Ctrl_Receive_DMA()
4536 assert_param(IS_I3C_DMADESTINATIONBYTE_VALUE(hi3c->hdmarx->Init.DestDataWidth)); in HAL_I3C_Ctrl_Receive_DMA()
4539 rx_dma_status = HAL_DMA_Start_IT(hi3c->hdmarx, (uint32_t)&hi3c->Instance->RDR, in HAL_I3C_Ctrl_Receive_DMA()
4540 … (uint32_t)hi3c->pXferData->RxBuf.pBuffer, hi3c->pXferData->RxBuf.Size); in HAL_I3C_Ctrl_Receive_DMA()
4545 assert_param(IS_I3C_DMASOURCEWORD_VALUE(hi3c->hdmarx->Init.SrcDataWidth)); in HAL_I3C_Ctrl_Receive_DMA()
4546 assert_param(IS_I3C_DMADESTINATIONWORD_VALUE(hi3c->hdmarx->Init.DestDataWidth)); in HAL_I3C_Ctrl_Receive_DMA()
4549 if ((hi3c->pXferData->RxBuf.Size % 4U) == 0U) in HAL_I3C_Ctrl_Receive_DMA()
4552 size_align_word = hi3c->pXferData->RxBuf.Size; in HAL_I3C_Ctrl_Receive_DMA()
4557 … size_align_word = ((hi3c->pXferData->RxBuf.Size + 4U) - (hi3c->pXferData->RxBuf.Size % 4U)); in HAL_I3C_Ctrl_Receive_DMA()
4561 rx_dma_status = HAL_DMA_Start_IT(hi3c->hdmarx, (uint32_t)&hi3c->Instance->RDWR, in HAL_I3C_Ctrl_Receive_DMA()
4562 … (uint32_t)hi3c->pXferData->RxBuf.pBuffer, size_align_word); in HAL_I3C_Ctrl_Receive_DMA()
4573 I3C_Enable_IRQ(hi3c, I3C_XFER_DMA); in HAL_I3C_Ctrl_Receive_DMA()
4576 hi3c->ControlXferCount = 0U; in HAL_I3C_Ctrl_Receive_DMA()
4579 LL_I3C_EnableDMAReq_Control(hi3c->Instance); in HAL_I3C_Ctrl_Receive_DMA()
4582 if (hi3c->RxXferCount != 0U) in HAL_I3C_Ctrl_Receive_DMA()
4585 hi3c->RxXferCount = 0U; in HAL_I3C_Ctrl_Receive_DMA()
4588 LL_I3C_EnableDMAReq_RX(hi3c->Instance); in HAL_I3C_Ctrl_Receive_DMA()
4592 LL_I3C_RequestTransfer(hi3c->Instance); in HAL_I3C_Ctrl_Receive_DMA()
4597 if (HAL_DMA_Abort(hi3c->hdmacr) == HAL_OK) in HAL_I3C_Ctrl_Receive_DMA()
4599 hi3c->hdmacr->XferCpltCallback = NULL; in HAL_I3C_Ctrl_Receive_DMA()
4600 hi3c->hdmacr->XferErrorCallback = NULL; in HAL_I3C_Ctrl_Receive_DMA()
4604 if (HAL_DMA_Abort(hi3c->hdmarx) == HAL_OK) in HAL_I3C_Ctrl_Receive_DMA()
4606 hi3c->hdmarx->XferCpltCallback = NULL; in HAL_I3C_Ctrl_Receive_DMA()
4607 hi3c->hdmarx->XferErrorCallback = NULL; in HAL_I3C_Ctrl_Receive_DMA()
4610 hi3c->ErrorCode = HAL_I3C_ERROR_DMA; in HAL_I3C_Ctrl_Receive_DMA()
4614 I3C_StateUpdate(hi3c); in HAL_I3C_Ctrl_Receive_DMA()
4639 HAL_StatusTypeDef HAL_I3C_Ctrl_MultipleTransfer_IT(I3C_HandleTypeDef *hi3c, in HAL_I3C_Ctrl_MultipleTransfer_IT() argument
4646 if (hi3c == NULL) in HAL_I3C_Ctrl_MultipleTransfer_IT()
4653 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Ctrl_MultipleTransfer_IT()
4654 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Ctrl_MultipleTransfer_IT()
4657 handle_state = hi3c->State; in HAL_I3C_Ctrl_MultipleTransfer_IT()
4661 ((pXferData->RxBuf.pBuffer == NULL) && (hi3c->RxXferCount != 0U)) || in HAL_I3C_Ctrl_MultipleTransfer_IT()
4662 ((pXferData->TxBuf.pBuffer == NULL) && (hi3c->TxXferCount != 0U))) in HAL_I3C_Ctrl_MultipleTransfer_IT()
4664 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_Ctrl_MultipleTransfer_IT()
4668 else if (hi3c->Mode != HAL_I3C_MODE_CONTROLLER) in HAL_I3C_Ctrl_MultipleTransfer_IT()
4670 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Ctrl_MultipleTransfer_IT()
4681 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in HAL_I3C_Ctrl_MultipleTransfer_IT()
4684 hi3c->XferISR = I3C_Ctrl_Multiple_Xfer_Listen_Event_ISR; in HAL_I3C_Ctrl_MultipleTransfer_IT()
4688 hi3c->XferISR = I3C_Ctrl_Multiple_Xfer_ISR; in HAL_I3C_Ctrl_MultipleTransfer_IT()
4690 hi3c->pXferData = pXferData; in HAL_I3C_Ctrl_MultipleTransfer_IT()
4691 hi3c->TxXferCount = hi3c->pXferData->TxBuf.Size; in HAL_I3C_Ctrl_MultipleTransfer_IT()
4692 hi3c->RxXferCount = hi3c->pXferData->RxBuf.Size; in HAL_I3C_Ctrl_MultipleTransfer_IT()
4693 hi3c->State = HAL_I3C_STATE_BUSY_TX_RX; in HAL_I3C_Ctrl_MultipleTransfer_IT()
4696 if (LL_I3C_GetTxFIFOThreshold(hi3c->Instance) == LL_I3C_TXFIFO_THRESHOLD_1_4) in HAL_I3C_Ctrl_MultipleTransfer_IT()
4699 hi3c->ptrTxFunc = &I3C_TransmitByteTreatment; in HAL_I3C_Ctrl_MultipleTransfer_IT()
4704 hi3c->ptrTxFunc = &I3C_TransmitWordTreatment; in HAL_I3C_Ctrl_MultipleTransfer_IT()
4708 if (LL_I3C_GetRxFIFOThreshold(hi3c->Instance) == LL_I3C_RXFIFO_THRESHOLD_1_4) in HAL_I3C_Ctrl_MultipleTransfer_IT()
4711 hi3c->ptrRxFunc = &I3C_ReceiveByteTreatment; in HAL_I3C_Ctrl_MultipleTransfer_IT()
4716 hi3c->ptrRxFunc = &I3C_ReceiveWordTreatment; in HAL_I3C_Ctrl_MultipleTransfer_IT()
4723 I3C_Enable_IRQ(hi3c, (I3C_XFER_CONTROLLER_TX_IT | I3C_XFER_CONTROLLER_RX_IT)); in HAL_I3C_Ctrl_MultipleTransfer_IT()
4726 LL_I3C_RequestTransfer(hi3c->Instance); in HAL_I3C_Ctrl_MultipleTransfer_IT()
4748 HAL_StatusTypeDef HAL_I3C_Ctrl_MultipleTransfer_DMA(I3C_HandleTypeDef *hi3c, I3C_XferTypeDef … in HAL_I3C_Ctrl_MultipleTransfer_DMA() argument
4758 if (hi3c == NULL) in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4765 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4766 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4769 handle_state = hi3c->State; in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4773 ((pXferData->RxBuf.pBuffer == NULL) && (hi3c->RxXferCount != 0U)) || in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4774 ((pXferData->TxBuf.pBuffer == NULL) && (hi3c->TxXferCount != 0U))) in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4776 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4780 else if ((hi3c->hdmatx == NULL) || (hi3c->hdmacr == NULL) || (hi3c->hdmarx == NULL)) in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4782 hi3c->ErrorCode = HAL_I3C_ERROR_DMA_PARAM; in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4786 else if (hi3c->Mode != HAL_I3C_MODE_CONTROLLER) in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4788 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4799 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4800 hi3c->XferISR = I3C_Ctrl_Multiple_Xfer_DMA_ISR; in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4801 hi3c->pXferData = pXferData; in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4802 hi3c->RxXferCount = hi3c->pXferData->RxBuf.Size; in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4803 hi3c->TxXferCount = hi3c->pXferData->TxBuf.Size; in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4804 hi3c->State = HAL_I3C_STATE_BUSY_TX_RX; in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4808 hi3c->hdmacr->XferCpltCallback = I3C_DMAControlTransmitCplt; in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4811 hi3c->hdmacr->XferErrorCallback = I3C_DMAError; in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4814 hi3c->hdmacr->XferHalfCpltCallback = NULL; in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4815 hi3c->hdmacr->XferAbortCallback = NULL; in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4818 assert_param(IS_I3C_DMASOURCEWORD_VALUE(hi3c->hdmacr->Init.SrcDataWidth)); in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4819 assert_param(IS_I3C_DMADESTINATIONWORD_VALUE(hi3c->hdmacr->Init.DestDataWidth)); in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4822 … control_dma_status = HAL_DMA_Start_IT(hi3c->hdmacr, (uint32_t)hi3c->pXferData->CtrlBuf.pBuffer, in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4823 … (uint32_t)&hi3c->Instance->CR, (hi3c->ControlXferCount * 4U)); in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4827 if (hi3c->RxXferCount != 0U) in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4830 hi3c->hdmarx->XferCpltCallback = I3C_DMADataReceiveCplt; in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4833 hi3c->hdmarx->XferErrorCallback = I3C_DMAError; in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4836 hi3c->hdmarx->XferHalfCpltCallback = NULL; in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4837 hi3c->hdmarx->XferAbortCallback = NULL; in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4840 if (LL_I3C_GetRxFIFOThreshold(hi3c->Instance) == LL_I3C_RXFIFO_THRESHOLD_1_4) in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4843 assert_param(IS_I3C_DMASOURCEBYTE_VALUE(hi3c->hdmarx->Init.SrcDataWidth)); in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4844 assert_param(IS_I3C_DMADESTINATIONBYTE_VALUE(hi3c->hdmarx->Init.DestDataWidth)); in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4847 rx_dma_status = HAL_DMA_Start_IT(hi3c->hdmarx, (uint32_t)&hi3c->Instance->RDR, in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4848 … (uint32_t)hi3c->pXferData->RxBuf.pBuffer, hi3c->pXferData->RxBuf.Size); in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4853 assert_param(IS_I3C_DMASOURCEWORD_VALUE(hi3c->hdmarx->Init.SrcDataWidth)); in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4854 assert_param(IS_I3C_DMADESTINATIONWORD_VALUE(hi3c->hdmarx->Init.DestDataWidth)); in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4857 if ((hi3c->pXferData->RxBuf.Size % 4U) == 0U) in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4860 size_align_word = hi3c->pXferData->RxBuf.Size; in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4865 … size_align_word = ((hi3c->pXferData->RxBuf.Size + 4U) - (hi3c->pXferData->RxBuf.Size % 4U)); in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4869 rx_dma_status = HAL_DMA_Start_IT(hi3c->hdmarx, (uint32_t)&hi3c->Instance->RDWR, in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4870 … (uint32_t)hi3c->pXferData->RxBuf.pBuffer, size_align_word); in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4876 if (hi3c->TxXferCount != 0U) in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4879 hi3c->hdmatx->XferCpltCallback = I3C_DMADataTransmitCplt; in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4882 hi3c->hdmatx->XferErrorCallback = I3C_DMAError; in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4885 hi3c->hdmatx->XferHalfCpltCallback = NULL; in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4886 hi3c->hdmatx->XferAbortCallback = NULL; in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4889 if (LL_I3C_GetTxFIFOThreshold(hi3c->Instance) == LL_I3C_TXFIFO_THRESHOLD_1_4) in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4892 assert_param(IS_I3C_DMASOURCEBYTE_VALUE(hi3c->hdmatx->Init.SrcDataWidth)); in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4893 assert_param(IS_I3C_DMADESTINATIONBYTE_VALUE(hi3c->hdmatx->Init.DestDataWidth)); in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4896 tx_dma_status = HAL_DMA_Start_IT(hi3c->hdmatx, (uint32_t)hi3c->pXferData->TxBuf.pBuffer, in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4897 … (uint32_t)&hi3c->Instance->TDR, hi3c->pXferData->TxBuf.Size); in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4902 assert_param(IS_I3C_DMASOURCEWORD_VALUE(hi3c->hdmatx->Init.SrcDataWidth)); in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4903 assert_param(IS_I3C_DMADESTINATIONWORD_VALUE(hi3c->hdmatx->Init.DestDataWidth)); in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4906 if ((hi3c->pXferData->TxBuf.Size % 4U) == 0U) in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4909 size_align_word = hi3c->pXferData->TxBuf.Size; in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4914 … size_align_word = ((hi3c->pXferData->TxBuf.Size + 4U) - (hi3c->pXferData->TxBuf.Size % 4U)); in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4918 tx_dma_status = HAL_DMA_Start_IT(hi3c->hdmatx, (uint32_t)hi3c->pXferData->TxBuf.pBuffer, in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4919 (uint32_t)&hi3c->Instance->TDWR, size_align_word); in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4930 I3C_Enable_IRQ(hi3c, I3C_XFER_DMA); in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4933 hi3c->ControlXferCount = 0U; in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4936 LL_I3C_EnableDMAReq_Control(hi3c->Instance); in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4939 if (hi3c->RxXferCount != 0U) in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4942 hi3c->RxXferCount = 0U; in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4945 LL_I3C_EnableDMAReq_RX(hi3c->Instance); in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4949 if (hi3c->TxXferCount != 0U) in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4952 hi3c->TxXferCount = 0U; in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4955 LL_I3C_EnableDMAReq_TX(hi3c->Instance); in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4959 LL_I3C_RequestTransfer(hi3c->Instance); in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4964 if (HAL_DMA_Abort(hi3c->hdmacr) == HAL_OK) in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4966 hi3c->hdmacr->XferCpltCallback = NULL; in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4967 hi3c->hdmacr->XferErrorCallback = NULL; in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4971 if (HAL_DMA_Abort(hi3c->hdmatx) == HAL_OK) in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4973 hi3c->hdmatx->XferCpltCallback = NULL; in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4974 hi3c->hdmatx->XferErrorCallback = NULL; in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4978 if (HAL_DMA_Abort(hi3c->hdmarx) == HAL_OK) in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4980 hi3c->hdmarx->XferCpltCallback = NULL; in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4981 hi3c->hdmarx->XferErrorCallback = NULL; in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4984 hi3c->ErrorCode = HAL_I3C_ERROR_DMA; in HAL_I3C_Ctrl_MultipleTransfer_DMA()
4988 I3C_StateUpdate(hi3c); in HAL_I3C_Ctrl_MultipleTransfer_DMA()
5006 HAL_StatusTypeDef HAL_I3C_Ctrl_DynAddrAssign(I3C_HandleTypeDef *hi3c, in HAL_I3C_Ctrl_DynAddrAssign() argument
5019 if (hi3c == NULL) in HAL_I3C_Ctrl_DynAddrAssign()
5026 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Ctrl_DynAddrAssign()
5027 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Ctrl_DynAddrAssign()
5030 handle_state = hi3c->State; in HAL_I3C_Ctrl_DynAddrAssign()
5034 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_Ctrl_DynAddrAssign()
5038 else if (hi3c->Mode != HAL_I3C_MODE_CONTROLLER) in HAL_I3C_Ctrl_DynAddrAssign()
5040 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Ctrl_DynAddrAssign()
5050 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in HAL_I3C_Ctrl_DynAddrAssign()
5051 hi3c->State = HAL_I3C_STATE_BUSY_DAA; in HAL_I3C_Ctrl_DynAddrAssign()
5057 LL_I3C_EnableArbitrationHeader(hi3c->Instance); in HAL_I3C_Ctrl_DynAddrAssign()
5060 LL_I3C_ControllerHandleCCC(hi3c->Instance, I3C_BROADCAST_RSTDAA, 0U, LL_I3C_GENERATE_STOP); in HAL_I3C_Ctrl_DynAddrAssign()
5063 status = I3C_WaitOnFlagUntilTimeout(hi3c, HAL_I3C_FLAG_FCF, RESET, timeout, tickstart); in HAL_I3C_Ctrl_DynAddrAssign()
5066 if (__HAL_I3C_GET_FLAG(hi3c, HAL_I3C_FLAG_FCF) == SET) in HAL_I3C_Ctrl_DynAddrAssign()
5068 LL_I3C_ClearFlag_FC(hi3c->Instance); in HAL_I3C_Ctrl_DynAddrAssign()
5072 if (__HAL_I3C_GET_FLAG(hi3c, HAL_I3C_FLAG_ERRF) == SET) in HAL_I3C_Ctrl_DynAddrAssign()
5075 LL_I3C_ClearFlag_ERR(hi3c->Instance); in HAL_I3C_Ctrl_DynAddrAssign()
5078 I3C_GetErrorSources(hi3c); in HAL_I3C_Ctrl_DynAddrAssign()
5084 I3C_StateUpdate(hi3c); in HAL_I3C_Ctrl_DynAddrAssign()
5097 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in HAL_I3C_Ctrl_DynAddrAssign()
5098 hi3c->State = HAL_I3C_STATE_BUSY_DAA; in HAL_I3C_Ctrl_DynAddrAssign()
5104 LL_I3C_EnableArbitrationHeader(hi3c->Instance); in HAL_I3C_Ctrl_DynAddrAssign()
5107 … LL_I3C_ControllerHandleCCC(hi3c->Instance, I3C_BROADCAST_ENTDAA, 0U, LL_I3C_GENERATE_STOP); in HAL_I3C_Ctrl_DynAddrAssign()
5116 status = I3C_WaitOnDAAUntilTimeout(hi3c, timeout, tickstart); in HAL_I3C_Ctrl_DynAddrAssign()
5119 if (__HAL_I3C_GET_FLAG(hi3c, HAL_I3C_FLAG_TXFNFF) == SET) in HAL_I3C_Ctrl_DynAddrAssign()
5122 if (LL_I3C_GetRxFIFOThreshold(hi3c->Instance) == LL_I3C_RXFIFO_THRESHOLD_1_4) in HAL_I3C_Ctrl_DynAddrAssign()
5128 … *target_payload |= (uint64_t)((uint64_t)LL_I3C_ReceiveData8(hi3c->Instance) << (index * 8U)); in HAL_I3C_Ctrl_DynAddrAssign()
5134 *target_payload = (uint64_t)LL_I3C_ReceiveData32(hi3c->Instance); in HAL_I3C_Ctrl_DynAddrAssign()
5137 *target_payload |= (uint64_t)((uint64_t)LL_I3C_ReceiveData32(hi3c->Instance) << 32U); in HAL_I3C_Ctrl_DynAddrAssign()
5146 if (__HAL_I3C_GET_FLAG(hi3c, HAL_I3C_FLAG_FCF) == SET) in HAL_I3C_Ctrl_DynAddrAssign()
5149 LL_I3C_ClearFlag_FC(hi3c->Instance); in HAL_I3C_Ctrl_DynAddrAssign()
5152 I3C_StateUpdate(hi3c); in HAL_I3C_Ctrl_DynAddrAssign()
5157 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Ctrl_DynAddrAssign()
5175 HAL_StatusTypeDef HAL_I3C_Ctrl_DynAddrAssign_IT(I3C_HandleTypeDef *hi3c, uint32_t dynOption) in HAL_I3C_Ctrl_DynAddrAssign_IT() argument
5184 if (hi3c == NULL) in HAL_I3C_Ctrl_DynAddrAssign_IT()
5191 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Ctrl_DynAddrAssign_IT()
5192 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Ctrl_DynAddrAssign_IT()
5195 handle_state = hi3c->State; in HAL_I3C_Ctrl_DynAddrAssign_IT()
5198 if (hi3c->Mode != HAL_I3C_MODE_CONTROLLER) in HAL_I3C_Ctrl_DynAddrAssign_IT()
5200 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Ctrl_DynAddrAssign_IT()
5211 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in HAL_I3C_Ctrl_DynAddrAssign_IT()
5212 hi3c->State = HAL_I3C_STATE_BUSY_DAA; in HAL_I3C_Ctrl_DynAddrAssign_IT()
5213 hi3c->XferISR = I3C_Ctrl_DAA_ISR; in HAL_I3C_Ctrl_DynAddrAssign_IT()
5219 I3C_Enable_IRQ(hi3c, I3C_XFER_CONTROLLER_DAA_IT); in HAL_I3C_Ctrl_DynAddrAssign_IT()
5222 LL_I3C_EnableArbitrationHeader(hi3c->Instance); in HAL_I3C_Ctrl_DynAddrAssign_IT()
5228 … LL_I3C_ControllerHandleCCC(hi3c->Instance, I3C_BROADCAST_RSTDAA, 0U, LL_I3C_GENERATE_RESTART); in HAL_I3C_Ctrl_DynAddrAssign_IT()
5233 LL_I3C_ControllerHandleCCC(hi3c->Instance, I3C_BROADCAST_ENTDAA, 0U, LL_I3C_GENERATE_STOP); in HAL_I3C_Ctrl_DynAddrAssign_IT()
5248 HAL_StatusTypeDef HAL_I3C_Ctrl_SetDynAddr(I3C_HandleTypeDef *hi3c, uint8_t devAddress) in HAL_I3C_Ctrl_SetDynAddr() argument
5253 if (hi3c == NULL) in HAL_I3C_Ctrl_SetDynAddr()
5260 if (__HAL_I3C_GET_FLAG(hi3c, HAL_I3C_FLAG_TXFNFF) == SET) in HAL_I3C_Ctrl_SetDynAddr()
5263 LL_I3C_TransmitData8(hi3c->Instance, devAddress); in HAL_I3C_Ctrl_SetDynAddr()
5283 HAL_StatusTypeDef HAL_I3C_Ctrl_IsDeviceI3C_Ready(I3C_HandleTypeDef *hi3c, in HAL_I3C_Ctrl_IsDeviceI3C_Ready() argument
5292 if (hi3c == NULL) in HAL_I3C_Ctrl_IsDeviceI3C_Ready()
5299 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Ctrl_IsDeviceI3C_Ready()
5300 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Ctrl_IsDeviceI3C_Ready()
5309 status = I3C_Ctrl_IsDevice_Ready(hi3c, &device, trials, timeout); in HAL_I3C_Ctrl_IsDeviceI3C_Ready()
5324 HAL_StatusTypeDef HAL_I3C_Ctrl_IsDeviceI2C_Ready(I3C_HandleTypeDef *hi3c, in HAL_I3C_Ctrl_IsDeviceI2C_Ready() argument
5333 if (hi3c == NULL) in HAL_I3C_Ctrl_IsDeviceI2C_Ready()
5340 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Ctrl_IsDeviceI2C_Ready()
5341 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Ctrl_IsDeviceI2C_Ready()
5350 status = I3C_Ctrl_IsDevice_Ready(hi3c, &device, trials, timeout); in HAL_I3C_Ctrl_IsDeviceI2C_Ready()
5363 HAL_StatusTypeDef HAL_I3C_Ctrl_GenerateArbitration(I3C_HandleTypeDef *hi3c, uint32_t timeout) in HAL_I3C_Ctrl_GenerateArbitration() argument
5371 if (hi3c == NULL) in HAL_I3C_Ctrl_GenerateArbitration()
5378 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Ctrl_GenerateArbitration()
5379 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Ctrl_GenerateArbitration()
5382 handle_state = hi3c->State; in HAL_I3C_Ctrl_GenerateArbitration()
5385 if (hi3c->Mode != HAL_I3C_MODE_CONTROLLER) in HAL_I3C_Ctrl_GenerateArbitration()
5387 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Ctrl_GenerateArbitration()
5397 hi3c->State = HAL_I3C_STATE_BUSY; in HAL_I3C_Ctrl_GenerateArbitration()
5400 LL_I3C_DisableExitPattern(hi3c->Instance); in HAL_I3C_Ctrl_GenerateArbitration()
5402 LL_I3C_DisableResetPattern(hi3c->Instance); in HAL_I3C_Ctrl_GenerateArbitration()
5405 WRITE_REG(hi3c->Instance->CR, LL_I3C_CONTROLLER_MTYPE_HEADER | LL_I3C_GENERATE_STOP); in HAL_I3C_Ctrl_GenerateArbitration()
5408 exit_condition = (READ_REG(hi3c->Instance->EVR) & (I3C_EVR_FCF | I3C_EVR_ERRF)); in HAL_I3C_Ctrl_GenerateArbitration()
5419 hi3c->ErrorCode |= HAL_I3C_ERROR_TIMEOUT; in HAL_I3C_Ctrl_GenerateArbitration()
5426 exit_condition = (READ_REG(hi3c->Instance->EVR) & (I3C_EVR_FCF | I3C_EVR_ERRF)); in HAL_I3C_Ctrl_GenerateArbitration()
5432 if (__HAL_I3C_GET_FLAG(hi3c, I3C_EVR_FCF) == SET) in HAL_I3C_Ctrl_GenerateArbitration()
5435 LL_I3C_ClearFlag_FC(hi3c->Instance); in HAL_I3C_Ctrl_GenerateArbitration()
5440 LL_I3C_ClearFlag_ERR(hi3c->Instance); in HAL_I3C_Ctrl_GenerateArbitration()
5443 I3C_GetErrorSources(hi3c); in HAL_I3C_Ctrl_GenerateArbitration()
5451 I3C_StateUpdate(hi3c); in HAL_I3C_Ctrl_GenerateArbitration()
5501 HAL_StatusTypeDef HAL_I3C_Tgt_Transmit(I3C_HandleTypeDef *hi3c, I3C_XferTypeDef *pXferData, uint32_… in HAL_I3C_Tgt_Transmit() argument
5509 if (hi3c == NULL) in HAL_I3C_Tgt_Transmit()
5516 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Tgt_Transmit()
5517 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Tgt_Transmit()
5519 it_source = READ_REG(hi3c->Instance->IER); in HAL_I3C_Tgt_Transmit()
5522 handle_state = hi3c->State; in HAL_I3C_Tgt_Transmit()
5527 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_Tgt_Transmit()
5531 else if (hi3c->Mode != HAL_I3C_MODE_TARGET) in HAL_I3C_Tgt_Transmit()
5533 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Tgt_Transmit()
5545 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Tgt_Transmit()
5549 else if (LL_I3C_IsEnabledOwnDynAddress(hi3c->Instance) != 1U) in HAL_I3C_Tgt_Transmit()
5551 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Tgt_Transmit()
5557 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in HAL_I3C_Tgt_Transmit()
5558 hi3c->State = HAL_I3C_STATE_BUSY_TX; in HAL_I3C_Tgt_Transmit()
5559 hi3c->pXferData = pXferData; in HAL_I3C_Tgt_Transmit()
5560 hi3c->TxXferCount = pXferData->TxBuf.Size; in HAL_I3C_Tgt_Transmit()
5563 if (LL_I3C_GetTxFIFOThreshold(hi3c->Instance) == LL_I3C_TXFIFO_THRESHOLD_1_4) in HAL_I3C_Tgt_Transmit()
5566 hi3c->ptrTxFunc = &I3C_TransmitByteTreatment; in HAL_I3C_Tgt_Transmit()
5571 hi3c->ptrTxFunc = &I3C_TransmitWordTreatment; in HAL_I3C_Tgt_Transmit()
5575 LL_I3C_ConfigTxPreload(hi3c->Instance, (uint16_t)hi3c->pXferData->TxBuf.Size); in HAL_I3C_Tgt_Transmit()
5584 hi3c->ptrTxFunc(hi3c); in HAL_I3C_Tgt_Transmit()
5591 hi3c->ErrorCode = HAL_I3C_ERROR_TIMEOUT; in HAL_I3C_Tgt_Transmit()
5598 } while ((READ_REG(hi3c->Instance->EVR) & (I3C_EVR_FCF | I3C_EVR_ERRF)) == 0U); in HAL_I3C_Tgt_Transmit()
5601 if (__HAL_I3C_GET_FLAG(hi3c, HAL_I3C_FLAG_FCF) == SET) in HAL_I3C_Tgt_Transmit()
5603 LL_I3C_ClearFlag_FC(hi3c->Instance); in HAL_I3C_Tgt_Transmit()
5607 …if ((LL_I3C_GetXferDataCount(hi3c->Instance) != hi3c->pXferData->TxBuf.Size) && (status == HAL_OK)) in HAL_I3C_Tgt_Transmit()
5609 hi3c->ErrorCode = HAL_I3C_ERROR_SIZE; in HAL_I3C_Tgt_Transmit()
5614 if (__HAL_I3C_GET_FLAG(hi3c, HAL_I3C_FLAG_ERRF) == SET) in HAL_I3C_Tgt_Transmit()
5617 LL_I3C_ClearFlag_ERR(hi3c->Instance); in HAL_I3C_Tgt_Transmit()
5620 I3C_GetErrorSources(hi3c); in HAL_I3C_Tgt_Transmit()
5627 I3C_StateUpdate(hi3c); in HAL_I3C_Tgt_Transmit()
5643 HAL_StatusTypeDef HAL_I3C_Tgt_Transmit_IT(I3C_HandleTypeDef *hi3c, I3C_XferTypeDef *pXferData) in HAL_I3C_Tgt_Transmit_IT() argument
5650 if (hi3c == NULL) in HAL_I3C_Tgt_Transmit_IT()
5657 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Tgt_Transmit_IT()
5658 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Tgt_Transmit_IT()
5660 it_source = READ_REG(hi3c->Instance->IER); in HAL_I3C_Tgt_Transmit_IT()
5663 handle_state = hi3c->State; in HAL_I3C_Tgt_Transmit_IT()
5668 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_Tgt_Transmit_IT()
5672 else if (hi3c->Mode != HAL_I3C_MODE_TARGET) in HAL_I3C_Tgt_Transmit_IT()
5674 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Tgt_Transmit_IT()
5686 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Tgt_Transmit_IT()
5690 else if (LL_I3C_IsEnabledOwnDynAddress(hi3c->Instance) != 1U) in HAL_I3C_Tgt_Transmit_IT()
5692 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Tgt_Transmit_IT()
5699 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in HAL_I3C_Tgt_Transmit_IT()
5700 hi3c->State = HAL_I3C_STATE_BUSY_TX; in HAL_I3C_Tgt_Transmit_IT()
5701 hi3c->pXferData = pXferData; in HAL_I3C_Tgt_Transmit_IT()
5702 hi3c->TxXferCount = pXferData->TxBuf.Size; in HAL_I3C_Tgt_Transmit_IT()
5703 hi3c->XferISR = I3C_Tgt_Tx_ISR; in HAL_I3C_Tgt_Transmit_IT()
5706 if (LL_I3C_GetTxFIFOThreshold(hi3c->Instance) == LL_I3C_TXFIFO_THRESHOLD_1_4) in HAL_I3C_Tgt_Transmit_IT()
5709 hi3c->ptrTxFunc = &I3C_TransmitByteTreatment; in HAL_I3C_Tgt_Transmit_IT()
5714 hi3c->ptrTxFunc = &I3C_TransmitWordTreatment; in HAL_I3C_Tgt_Transmit_IT()
5718 LL_I3C_ConfigTxPreload(hi3c->Instance, (uint16_t)hi3c->pXferData->TxBuf.Size); in HAL_I3C_Tgt_Transmit_IT()
5724 I3C_Enable_IRQ(hi3c, I3C_XFER_TARGET_TX_IT); in HAL_I3C_Tgt_Transmit_IT()
5741 HAL_StatusTypeDef HAL_I3C_Tgt_Transmit_DMA(I3C_HandleTypeDef *hi3c, I3C_XferTypeDef *pXferData) in HAL_I3C_Tgt_Transmit_DMA() argument
5750 if (hi3c == NULL) in HAL_I3C_Tgt_Transmit_DMA()
5757 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Tgt_Transmit_DMA()
5758 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Tgt_Transmit_DMA()
5760 it_source = READ_REG(hi3c->Instance->IER); in HAL_I3C_Tgt_Transmit_DMA()
5763 handle_state = hi3c->State; in HAL_I3C_Tgt_Transmit_DMA()
5768 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_Tgt_Transmit_DMA()
5772 else if (hi3c->hdmatx == NULL) in HAL_I3C_Tgt_Transmit_DMA()
5774 hi3c->ErrorCode = HAL_I3C_ERROR_DMA_PARAM; in HAL_I3C_Tgt_Transmit_DMA()
5778 else if (hi3c->Mode != HAL_I3C_MODE_TARGET) in HAL_I3C_Tgt_Transmit_DMA()
5780 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Tgt_Transmit_DMA()
5792 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Tgt_Transmit_DMA()
5796 else if (LL_I3C_IsEnabledOwnDynAddress(hi3c->Instance) != 1U) in HAL_I3C_Tgt_Transmit_DMA()
5798 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Tgt_Transmit_DMA()
5804 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in HAL_I3C_Tgt_Transmit_DMA()
5805 hi3c->State = HAL_I3C_STATE_BUSY_TX; in HAL_I3C_Tgt_Transmit_DMA()
5806 hi3c->pXferData = pXferData; in HAL_I3C_Tgt_Transmit_DMA()
5807 hi3c->TxXferCount = pXferData->TxBuf.Size; in HAL_I3C_Tgt_Transmit_DMA()
5808 hi3c->XferISR = I3C_Tgt_Tx_DMA_ISR; in HAL_I3C_Tgt_Transmit_DMA()
5811 LL_I3C_ConfigTxPreload(hi3c->Instance, (uint16_t)hi3c->pXferData->TxBuf.Size); in HAL_I3C_Tgt_Transmit_DMA()
5815 hi3c->hdmatx->XferCpltCallback = I3C_DMADataTransmitCplt; in HAL_I3C_Tgt_Transmit_DMA()
5818 hi3c->hdmatx->XferErrorCallback = I3C_DMAError; in HAL_I3C_Tgt_Transmit_DMA()
5821 hi3c->hdmatx->XferHalfCpltCallback = NULL; in HAL_I3C_Tgt_Transmit_DMA()
5822 hi3c->hdmatx->XferAbortCallback = NULL; in HAL_I3C_Tgt_Transmit_DMA()
5825 if (LL_I3C_GetTxFIFOThreshold(hi3c->Instance) == LL_I3C_TXFIFO_THRESHOLD_1_4) in HAL_I3C_Tgt_Transmit_DMA()
5828 assert_param(IS_I3C_DMASOURCEBYTE_VALUE(hi3c->hdmatx->Init.SrcDataWidth)); in HAL_I3C_Tgt_Transmit_DMA()
5829 assert_param(IS_I3C_DMADESTINATIONBYTE_VALUE(hi3c->hdmatx->Init.DestDataWidth)); in HAL_I3C_Tgt_Transmit_DMA()
5832 tx_dma_status = HAL_DMA_Start_IT(hi3c->hdmatx, (uint32_t)hi3c->pXferData->TxBuf.pBuffer, in HAL_I3C_Tgt_Transmit_DMA()
5833 … (uint32_t)&hi3c->Instance->TDR, hi3c->pXferData->TxBuf.Size); in HAL_I3C_Tgt_Transmit_DMA()
5838 assert_param(IS_I3C_DMASOURCEWORD_VALUE(hi3c->hdmatx->Init.SrcDataWidth)); in HAL_I3C_Tgt_Transmit_DMA()
5839 assert_param(IS_I3C_DMADESTINATIONWORD_VALUE(hi3c->hdmatx->Init.DestDataWidth)); in HAL_I3C_Tgt_Transmit_DMA()
5842 if ((hi3c->pXferData->TxBuf.Size % 4U) == 0U) in HAL_I3C_Tgt_Transmit_DMA()
5845 size_align_word = hi3c->pXferData->TxBuf.Size; in HAL_I3C_Tgt_Transmit_DMA()
5850 … size_align_word = ((hi3c->pXferData->TxBuf.Size + 4U) - (hi3c->pXferData->TxBuf.Size % 4U)); in HAL_I3C_Tgt_Transmit_DMA()
5854 tx_dma_status = HAL_DMA_Start_IT(hi3c->hdmatx, (uint32_t)hi3c->pXferData->TxBuf.pBuffer, in HAL_I3C_Tgt_Transmit_DMA()
5855 (uint32_t)&hi3c->Instance->TDWR, size_align_word); in HAL_I3C_Tgt_Transmit_DMA()
5865 I3C_Enable_IRQ(hi3c, I3C_XFER_DMA); in HAL_I3C_Tgt_Transmit_DMA()
5868 hi3c->TxXferCount = 0U; in HAL_I3C_Tgt_Transmit_DMA()
5871 LL_I3C_EnableDMAReq_TX(hi3c->Instance); in HAL_I3C_Tgt_Transmit_DMA()
5876 hi3c->hdmatx->XferCpltCallback = NULL; in HAL_I3C_Tgt_Transmit_DMA()
5877 hi3c->hdmatx->XferErrorCallback = NULL; in HAL_I3C_Tgt_Transmit_DMA()
5879 hi3c->ErrorCode = HAL_I3C_ERROR_DMA; in HAL_I3C_Tgt_Transmit_DMA()
5883 I3C_StateUpdate(hi3c); in HAL_I3C_Tgt_Transmit_DMA()
5902 HAL_StatusTypeDef HAL_I3C_Tgt_Receive(I3C_HandleTypeDef *hi3c, I3C_XferTypeDef *pXferData, uint32_t… in HAL_I3C_Tgt_Receive() argument
5910 if (hi3c == NULL) in HAL_I3C_Tgt_Receive()
5917 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Tgt_Receive()
5918 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Tgt_Receive()
5920 it_source = READ_REG(hi3c->Instance->IER); in HAL_I3C_Tgt_Receive()
5923 handle_state = hi3c->State; in HAL_I3C_Tgt_Receive()
5928 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_Tgt_Receive()
5932 else if (hi3c->Mode != HAL_I3C_MODE_TARGET) in HAL_I3C_Tgt_Receive()
5934 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Tgt_Receive()
5946 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Tgt_Receive()
5950 else if (LL_I3C_IsEnabledOwnDynAddress(hi3c->Instance) != 1U) in HAL_I3C_Tgt_Receive()
5952 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Tgt_Receive()
5958 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in HAL_I3C_Tgt_Receive()
5959 hi3c->State = HAL_I3C_STATE_BUSY_RX; in HAL_I3C_Tgt_Receive()
5960 hi3c->pXferData = pXferData; in HAL_I3C_Tgt_Receive()
5961 hi3c->RxXferCount = pXferData->RxBuf.Size; in HAL_I3C_Tgt_Receive()
5964 if (LL_I3C_GetRxFIFOThreshold(hi3c->Instance) == LL_I3C_RXFIFO_THRESHOLD_1_4) in HAL_I3C_Tgt_Receive()
5967 hi3c->ptrRxFunc = &I3C_ReceiveByteTreatment; in HAL_I3C_Tgt_Receive()
5972 hi3c->ptrRxFunc = &I3C_ReceiveWordTreatment; in HAL_I3C_Tgt_Receive()
5981 if (hi3c->RxXferCount > 0U) in HAL_I3C_Tgt_Receive()
5984 hi3c->ptrRxFunc(hi3c); in HAL_I3C_Tgt_Receive()
5992 hi3c->ErrorCode = HAL_I3C_ERROR_TIMEOUT; in HAL_I3C_Tgt_Receive()
5999 } while ((READ_REG(hi3c->Instance->EVR) & (I3C_EVR_FCF | I3C_EVR_ERRF)) == 0U); in HAL_I3C_Tgt_Receive()
6002 if (__HAL_I3C_GET_FLAG(hi3c, HAL_I3C_FLAG_FCF) == SET) in HAL_I3C_Tgt_Receive()
6004 LL_I3C_ClearFlag_FC(hi3c->Instance); in HAL_I3C_Tgt_Receive()
6008 …if ((LL_I3C_GetXferDataCount(hi3c->Instance) != hi3c->pXferData->RxBuf.Size) && (status == HAL_OK)) in HAL_I3C_Tgt_Receive()
6010 hi3c->ErrorCode = HAL_I3C_ERROR_SIZE; in HAL_I3C_Tgt_Receive()
6015 if (__HAL_I3C_GET_FLAG(hi3c, HAL_I3C_FLAG_ERRF) == SET) in HAL_I3C_Tgt_Receive()
6018 LL_I3C_ClearFlag_ERR(hi3c->Instance); in HAL_I3C_Tgt_Receive()
6021 I3C_GetErrorSources(hi3c); in HAL_I3C_Tgt_Receive()
6027 I3C_StateUpdate(hi3c); in HAL_I3C_Tgt_Receive()
6043 HAL_StatusTypeDef HAL_I3C_Tgt_Receive_IT(I3C_HandleTypeDef *hi3c, I3C_XferTypeDef *pXferData) in HAL_I3C_Tgt_Receive_IT() argument
6050 if (hi3c == NULL) in HAL_I3C_Tgt_Receive_IT()
6057 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Tgt_Receive_IT()
6058 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Tgt_Receive_IT()
6060 it_source = READ_REG(hi3c->Instance->IER); in HAL_I3C_Tgt_Receive_IT()
6063 handle_state = hi3c->State; in HAL_I3C_Tgt_Receive_IT()
6068 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_Tgt_Receive_IT()
6072 else if (hi3c->Mode != HAL_I3C_MODE_TARGET) in HAL_I3C_Tgt_Receive_IT()
6074 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Tgt_Receive_IT()
6086 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Tgt_Receive_IT()
6090 else if (LL_I3C_IsEnabledOwnDynAddress(hi3c->Instance) != 1U) in HAL_I3C_Tgt_Receive_IT()
6092 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Tgt_Receive_IT()
6098 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in HAL_I3C_Tgt_Receive_IT()
6099 hi3c->State = HAL_I3C_STATE_BUSY_RX; in HAL_I3C_Tgt_Receive_IT()
6100 hi3c->pXferData = pXferData; in HAL_I3C_Tgt_Receive_IT()
6101 hi3c->RxXferCount = pXferData->RxBuf.Size; in HAL_I3C_Tgt_Receive_IT()
6102 hi3c->XferISR = I3C_Tgt_Rx_ISR; in HAL_I3C_Tgt_Receive_IT()
6105 if (LL_I3C_GetRxFIFOThreshold(hi3c->Instance) == LL_I3C_RXFIFO_THRESHOLD_1_4) in HAL_I3C_Tgt_Receive_IT()
6108 hi3c->ptrRxFunc = &I3C_ReceiveByteTreatment; in HAL_I3C_Tgt_Receive_IT()
6113 hi3c->ptrRxFunc = &I3C_ReceiveWordTreatment; in HAL_I3C_Tgt_Receive_IT()
6120 I3C_Enable_IRQ(hi3c, I3C_XFER_TARGET_RX_IT); in HAL_I3C_Tgt_Receive_IT()
6137 HAL_StatusTypeDef HAL_I3C_Tgt_Receive_DMA(I3C_HandleTypeDef *hi3c, I3C_XferTypeDef *pXferData) in HAL_I3C_Tgt_Receive_DMA() argument
6146 if (hi3c == NULL) in HAL_I3C_Tgt_Receive_DMA()
6153 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Tgt_Receive_DMA()
6154 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Tgt_Receive_DMA()
6156 it_source = READ_REG(hi3c->Instance->IER); in HAL_I3C_Tgt_Receive_DMA()
6159 handle_state = hi3c->State; in HAL_I3C_Tgt_Receive_DMA()
6164 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_Tgt_Receive_DMA()
6168 else if (hi3c->hdmarx == NULL) in HAL_I3C_Tgt_Receive_DMA()
6170 hi3c->ErrorCode = HAL_I3C_ERROR_DMA_PARAM; in HAL_I3C_Tgt_Receive_DMA()
6174 I3C_StateUpdate(hi3c); in HAL_I3C_Tgt_Receive_DMA()
6177 else if (hi3c->Mode != HAL_I3C_MODE_TARGET) in HAL_I3C_Tgt_Receive_DMA()
6179 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Tgt_Receive_DMA()
6191 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Tgt_Receive_DMA()
6195 else if (LL_I3C_IsEnabledOwnDynAddress(hi3c->Instance) != 1U) in HAL_I3C_Tgt_Receive_DMA()
6197 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Tgt_Receive_DMA()
6203 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in HAL_I3C_Tgt_Receive_DMA()
6204 hi3c->State = HAL_I3C_STATE_BUSY_RX; in HAL_I3C_Tgt_Receive_DMA()
6205 hi3c->pXferData = pXferData; in HAL_I3C_Tgt_Receive_DMA()
6206 hi3c->RxXferCount = pXferData->RxBuf.Size; in HAL_I3C_Tgt_Receive_DMA()
6207 hi3c->XferISR = I3C_Tgt_Rx_DMA_ISR; in HAL_I3C_Tgt_Receive_DMA()
6211 hi3c->hdmarx->XferCpltCallback = I3C_DMADataReceiveCplt; in HAL_I3C_Tgt_Receive_DMA()
6214 hi3c->hdmarx->XferErrorCallback = I3C_DMAError; in HAL_I3C_Tgt_Receive_DMA()
6217 hi3c->hdmarx->XferHalfCpltCallback = NULL; in HAL_I3C_Tgt_Receive_DMA()
6218 hi3c->hdmarx->XferAbortCallback = NULL; in HAL_I3C_Tgt_Receive_DMA()
6221 if (LL_I3C_GetRxFIFOThreshold(hi3c->Instance) == LL_I3C_RXFIFO_THRESHOLD_1_4) in HAL_I3C_Tgt_Receive_DMA()
6224 assert_param(IS_I3C_DMASOURCEBYTE_VALUE(hi3c->hdmarx->Init.SrcDataWidth)); in HAL_I3C_Tgt_Receive_DMA()
6225 assert_param(IS_I3C_DMADESTINATIONBYTE_VALUE(hi3c->hdmarx->Init.DestDataWidth)); in HAL_I3C_Tgt_Receive_DMA()
6228 rx_dma_status = HAL_DMA_Start_IT(hi3c->hdmarx, (uint32_t)&hi3c->Instance->RDR, in HAL_I3C_Tgt_Receive_DMA()
6229 … (uint32_t)hi3c->pXferData->RxBuf.pBuffer, hi3c->pXferData->RxBuf.Size); in HAL_I3C_Tgt_Receive_DMA()
6234 assert_param(IS_I3C_DMASOURCEWORD_VALUE(hi3c->hdmarx->Init.SrcDataWidth)); in HAL_I3C_Tgt_Receive_DMA()
6235 assert_param(IS_I3C_DMADESTINATIONWORD_VALUE(hi3c->hdmarx->Init.DestDataWidth)); in HAL_I3C_Tgt_Receive_DMA()
6238 if ((hi3c->pXferData->RxBuf.Size % 4U) == 0U) in HAL_I3C_Tgt_Receive_DMA()
6241 size_align_word = hi3c->pXferData->RxBuf.Size; in HAL_I3C_Tgt_Receive_DMA()
6246 … size_align_word = ((hi3c->pXferData->RxBuf.Size + 4U) - (hi3c->pXferData->RxBuf.Size % 4U)); in HAL_I3C_Tgt_Receive_DMA()
6250 rx_dma_status = HAL_DMA_Start_IT(hi3c->hdmarx, (uint32_t)&hi3c->Instance->RDWR, in HAL_I3C_Tgt_Receive_DMA()
6251 (uint32_t)hi3c->pXferData->RxBuf.pBuffer, size_align_word); in HAL_I3C_Tgt_Receive_DMA()
6260 I3C_Enable_IRQ(hi3c, I3C_XFER_DMA); in HAL_I3C_Tgt_Receive_DMA()
6263 hi3c->RxXferCount = 0U; in HAL_I3C_Tgt_Receive_DMA()
6266 LL_I3C_EnableDMAReq_RX(hi3c->Instance); in HAL_I3C_Tgt_Receive_DMA()
6271 hi3c->hdmarx->XferCpltCallback = NULL; in HAL_I3C_Tgt_Receive_DMA()
6272 hi3c->hdmarx->XferErrorCallback = NULL; in HAL_I3C_Tgt_Receive_DMA()
6274 hi3c->ErrorCode = HAL_I3C_ERROR_DMA; in HAL_I3C_Tgt_Receive_DMA()
6278 I3C_StateUpdate(hi3c); in HAL_I3C_Tgt_Receive_DMA()
6294 HAL_StatusTypeDef HAL_I3C_Tgt_ControlRoleReq(I3C_HandleTypeDef *hi3c, uint32_t timeout) in HAL_I3C_Tgt_ControlRoleReq() argument
6301 if (hi3c == NULL) in HAL_I3C_Tgt_ControlRoleReq()
6308 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Tgt_ControlRoleReq()
6309 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Tgt_ControlRoleReq()
6312 handle_state = hi3c->State; in HAL_I3C_Tgt_ControlRoleReq()
6315 if (hi3c->Mode != HAL_I3C_MODE_TARGET) in HAL_I3C_Tgt_ControlRoleReq()
6317 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Tgt_ControlRoleReq()
6326 else if (LL_I3C_IsEnabledOwnDynAddress(hi3c->Instance) != 1U) in HAL_I3C_Tgt_ControlRoleReq()
6328 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Tgt_ControlRoleReq()
6334 if (LL_I3C_IsEnabledControllerRoleReq(hi3c->Instance) != 1U) in HAL_I3C_Tgt_ControlRoleReq()
6336 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Tgt_ControlRoleReq()
6343 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in HAL_I3C_Tgt_ControlRoleReq()
6344 hi3c->State = HAL_I3C_STATE_BUSY; in HAL_I3C_Tgt_ControlRoleReq()
6350 LL_I3C_TargetHandleMessage(hi3c->Instance, LL_I3C_TARGET_MTYPE_CONTROLLER_ROLE_REQ, 0U); in HAL_I3C_Tgt_ControlRoleReq()
6353 status = I3C_WaitOnFlagUntilTimeout(hi3c, HAL_I3C_FLAG_CRUPDF, RESET, timeout, tickstart); in HAL_I3C_Tgt_ControlRoleReq()
6356 if (__HAL_I3C_GET_FLAG(hi3c, HAL_I3C_FLAG_CRUPDF) == SET) in HAL_I3C_Tgt_ControlRoleReq()
6358 LL_I3C_ClearFlag_CRUPD(hi3c->Instance); in HAL_I3C_Tgt_ControlRoleReq()
6362 if (__HAL_I3C_GET_FLAG(hi3c, HAL_I3C_FLAG_ERRF) == SET) in HAL_I3C_Tgt_ControlRoleReq()
6365 LL_I3C_ClearFlag_ERR(hi3c->Instance); in HAL_I3C_Tgt_ControlRoleReq()
6368 I3C_GetErrorSources(hi3c); in HAL_I3C_Tgt_ControlRoleReq()
6371 I3C_StateUpdate(hi3c); in HAL_I3C_Tgt_ControlRoleReq()
6378 I3C_StateUpdate(hi3c); in HAL_I3C_Tgt_ControlRoleReq()
6392 HAL_StatusTypeDef HAL_I3C_Tgt_ControlRoleReq_IT(I3C_HandleTypeDef *hi3c) in HAL_I3C_Tgt_ControlRoleReq_IT() argument
6398 if (hi3c == NULL) in HAL_I3C_Tgt_ControlRoleReq_IT()
6405 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Tgt_ControlRoleReq_IT()
6406 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Tgt_ControlRoleReq_IT()
6409 handle_state = hi3c->State; in HAL_I3C_Tgt_ControlRoleReq_IT()
6412 if (hi3c->Mode != HAL_I3C_MODE_TARGET) in HAL_I3C_Tgt_ControlRoleReq_IT()
6414 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Tgt_ControlRoleReq_IT()
6423 else if (LL_I3C_IsEnabledOwnDynAddress(hi3c->Instance) != 1U) in HAL_I3C_Tgt_ControlRoleReq_IT()
6425 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Tgt_ControlRoleReq_IT()
6431 if (LL_I3C_IsEnabledControllerRoleReq(hi3c->Instance) != 1U) in HAL_I3C_Tgt_ControlRoleReq_IT()
6433 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Tgt_ControlRoleReq_IT()
6441 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in HAL_I3C_Tgt_ControlRoleReq_IT()
6442 hi3c->State = HAL_I3C_STATE_BUSY; in HAL_I3C_Tgt_ControlRoleReq_IT()
6443 hi3c->XferISR = I3C_Tgt_CtrlRole_ISR; in HAL_I3C_Tgt_ControlRoleReq_IT()
6446 I3C_Enable_IRQ(hi3c, I3C_XFER_TARGET_CTRLROLE); in HAL_I3C_Tgt_ControlRoleReq_IT()
6449 LL_I3C_TargetHandleMessage(hi3c->Instance, LL_I3C_TARGET_MTYPE_CONTROLLER_ROLE_REQ, 0U); in HAL_I3C_Tgt_ControlRoleReq_IT()
6464 HAL_StatusTypeDef HAL_I3C_Tgt_HotJoinReq(I3C_HandleTypeDef *hi3c, uint8_t *pAddress, uint32_t timeo… in HAL_I3C_Tgt_HotJoinReq() argument
6472 if (hi3c == NULL) in HAL_I3C_Tgt_HotJoinReq()
6479 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Tgt_HotJoinReq()
6480 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Tgt_HotJoinReq()
6483 handle_state = hi3c->State; in HAL_I3C_Tgt_HotJoinReq()
6488 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_Tgt_HotJoinReq()
6492 else if (hi3c->Mode != HAL_I3C_MODE_TARGET) in HAL_I3C_Tgt_HotJoinReq()
6494 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Tgt_HotJoinReq()
6505 if (LL_I3C_IsEnabledHotJoin(hi3c->Instance) != 1U) in HAL_I3C_Tgt_HotJoinReq()
6507 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Tgt_HotJoinReq()
6514 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in HAL_I3C_Tgt_HotJoinReq()
6515 hi3c->State = HAL_I3C_STATE_BUSY; in HAL_I3C_Tgt_HotJoinReq()
6521 LL_I3C_TargetHandleMessage(hi3c->Instance, LL_I3C_TARGET_MTYPE_HOT_JOIN, 0U); in HAL_I3C_Tgt_HotJoinReq()
6524 status = I3C_WaitOnFlagUntilTimeout(hi3c, HAL_I3C_FLAG_DAUPDF, RESET, timeout, tickstart); in HAL_I3C_Tgt_HotJoinReq()
6527 if (__HAL_I3C_GET_FLAG(hi3c, HAL_I3C_FLAG_DAUPDF) == SET) in HAL_I3C_Tgt_HotJoinReq()
6529 LL_I3C_ClearFlag_DAUPD(hi3c->Instance); in HAL_I3C_Tgt_HotJoinReq()
6533 valid_dynamic_address = LL_I3C_IsEnabledOwnDynAddress(hi3c->Instance); in HAL_I3C_Tgt_HotJoinReq()
6538 hi3c->ErrorCode = HAL_I3C_ERROR_DYNAMIC_ADDR; in HAL_I3C_Tgt_HotJoinReq()
6542 I3C_StateUpdate(hi3c); in HAL_I3C_Tgt_HotJoinReq()
6545 else if (__HAL_I3C_GET_FLAG(hi3c, HAL_I3C_FLAG_ERRF) == SET) in HAL_I3C_Tgt_HotJoinReq()
6548 LL_I3C_ClearFlag_ERR(hi3c->Instance); in HAL_I3C_Tgt_HotJoinReq()
6551 I3C_GetErrorSources(hi3c); in HAL_I3C_Tgt_HotJoinReq()
6554 I3C_StateUpdate(hi3c); in HAL_I3C_Tgt_HotJoinReq()
6561 I3C_StateUpdate(hi3c); in HAL_I3C_Tgt_HotJoinReq()
6564 *pAddress = LL_I3C_GetOwnDynamicAddress(hi3c->Instance); in HAL_I3C_Tgt_HotJoinReq()
6578 HAL_StatusTypeDef HAL_I3C_Tgt_HotJoinReq_IT(I3C_HandleTypeDef *hi3c) in HAL_I3C_Tgt_HotJoinReq_IT() argument
6584 if (hi3c == NULL) in HAL_I3C_Tgt_HotJoinReq_IT()
6591 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Tgt_HotJoinReq_IT()
6592 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Tgt_HotJoinReq_IT()
6595 handle_state = hi3c->State; in HAL_I3C_Tgt_HotJoinReq_IT()
6598 if (hi3c->Mode != HAL_I3C_MODE_TARGET) in HAL_I3C_Tgt_HotJoinReq_IT()
6600 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Tgt_HotJoinReq_IT()
6609 else if (LL_I3C_IsEnabledHotJoin(hi3c->Instance) != 1U) in HAL_I3C_Tgt_HotJoinReq_IT()
6611 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Tgt_HotJoinReq_IT()
6617 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in HAL_I3C_Tgt_HotJoinReq_IT()
6618 hi3c->State = HAL_I3C_STATE_BUSY; in HAL_I3C_Tgt_HotJoinReq_IT()
6619 hi3c->XferISR = I3C_Tgt_HotJoin_ISR; in HAL_I3C_Tgt_HotJoinReq_IT()
6622 I3C_Enable_IRQ(hi3c, I3C_XFER_TARGET_HOTJOIN); in HAL_I3C_Tgt_HotJoinReq_IT()
6625 LL_I3C_TargetHandleMessage(hi3c->Instance, LL_I3C_TARGET_MTYPE_HOT_JOIN, 0U); in HAL_I3C_Tgt_HotJoinReq_IT()
6641 HAL_StatusTypeDef HAL_I3C_Tgt_IBIReq(I3C_HandleTypeDef *hi3c, const uint8_t *pPayload, in HAL_I3C_Tgt_IBIReq() argument
6650 if (hi3c == NULL) in HAL_I3C_Tgt_IBIReq()
6657 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Tgt_IBIReq()
6658 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Tgt_IBIReq()
6661 handle_state = hi3c->State; in HAL_I3C_Tgt_IBIReq()
6664 if (hi3c->Mode != HAL_I3C_MODE_TARGET) in HAL_I3C_Tgt_IBIReq()
6666 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Tgt_IBIReq()
6675 else if (LL_I3C_IsEnabledOwnDynAddress(hi3c->Instance) != 1U) in HAL_I3C_Tgt_IBIReq()
6677 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Tgt_IBIReq()
6683 if ((LL_I3C_IsEnabledIBI(hi3c->Instance) != 1U)) in HAL_I3C_Tgt_IBIReq()
6685 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Tgt_IBIReq()
6693 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in HAL_I3C_Tgt_IBIReq()
6694 hi3c->State = HAL_I3C_STATE_BUSY; in HAL_I3C_Tgt_IBIReq()
6697 if (LL_I3C_GetDeviceIBIPayload(hi3c->Instance) == LL_I3C_IBI_ADDITIONAL_DATA) in HAL_I3C_Tgt_IBIReq()
6702 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_Tgt_IBIReq()
6706 I3C_StateUpdate(hi3c); in HAL_I3C_Tgt_IBIReq()
6717 LL_I3C_SetIBIPayload(hi3c->Instance, payload_value); in HAL_I3C_Tgt_IBIReq()
6727 LL_I3C_TargetHandleMessage(hi3c->Instance, LL_I3C_TARGET_MTYPE_IBI, payloadSize); in HAL_I3C_Tgt_IBIReq()
6730 status = I3C_WaitOnFlagUntilTimeout(hi3c, HAL_I3C_FLAG_IBIENDF, RESET, timeout, tickstart); in HAL_I3C_Tgt_IBIReq()
6732 if (__HAL_I3C_GET_FLAG(hi3c, HAL_I3C_FLAG_IBIENDF) == SET) in HAL_I3C_Tgt_IBIReq()
6735 LL_I3C_ClearFlag_IBIEND(hi3c->Instance); in HAL_I3C_Tgt_IBIReq()
6739 if (__HAL_I3C_GET_FLAG(hi3c, HAL_I3C_FLAG_ERRF) == SET) in HAL_I3C_Tgt_IBIReq()
6742 LL_I3C_ClearFlag_ERR(hi3c->Instance); in HAL_I3C_Tgt_IBIReq()
6745 I3C_GetErrorSources(hi3c); in HAL_I3C_Tgt_IBIReq()
6748 I3C_StateUpdate(hi3c); in HAL_I3C_Tgt_IBIReq()
6755 I3C_StateUpdate(hi3c); in HAL_I3C_Tgt_IBIReq()
6772 HAL_StatusTypeDef HAL_I3C_Tgt_IBIReq_IT(I3C_HandleTypeDef *hi3c, const uint8_t *pPayload, uint8_t p… in HAL_I3C_Tgt_IBIReq_IT() argument
6779 if (hi3c == NULL) in HAL_I3C_Tgt_IBIReq_IT()
6786 assert_param(IS_I3C_ALL_INSTANCE(hi3c->Instance)); in HAL_I3C_Tgt_IBIReq_IT()
6787 assert_param(IS_I3C_MODE(hi3c->Mode)); in HAL_I3C_Tgt_IBIReq_IT()
6790 handle_state = hi3c->State; in HAL_I3C_Tgt_IBIReq_IT()
6793 if (hi3c->Mode != HAL_I3C_MODE_TARGET) in HAL_I3C_Tgt_IBIReq_IT()
6795 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Tgt_IBIReq_IT()
6804 else if (LL_I3C_IsEnabledOwnDynAddress(hi3c->Instance) != 1U) in HAL_I3C_Tgt_IBIReq_IT()
6806 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Tgt_IBIReq_IT()
6812 if (LL_I3C_IsEnabledIBI(hi3c->Instance) != 1U) in HAL_I3C_Tgt_IBIReq_IT()
6814 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_Tgt_IBIReq_IT()
6822 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in HAL_I3C_Tgt_IBIReq_IT()
6823 hi3c->State = HAL_I3C_STATE_BUSY; in HAL_I3C_Tgt_IBIReq_IT()
6824 hi3c->XferISR = I3C_Tgt_IBI_ISR; in HAL_I3C_Tgt_IBIReq_IT()
6827 if (LL_I3C_GetDeviceIBIPayload(hi3c->Instance) == LL_I3C_IBI_ADDITIONAL_DATA) in HAL_I3C_Tgt_IBIReq_IT()
6832 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_Tgt_IBIReq_IT()
6836 I3C_StateUpdate(hi3c); in HAL_I3C_Tgt_IBIReq_IT()
6847 LL_I3C_SetIBIPayload(hi3c->Instance, payload_value); in HAL_I3C_Tgt_IBIReq_IT()
6852 I3C_Enable_IRQ(hi3c, I3C_XFER_TARGET_IBI); in HAL_I3C_Tgt_IBIReq_IT()
6855 LL_I3C_TargetHandleMessage(hi3c->Instance, LL_I3C_TARGET_MTYPE_IBI, payloadSize); in HAL_I3C_Tgt_IBIReq_IT()
6891 HAL_StatusTypeDef HAL_I3C_Abort_IT(I3C_HandleTypeDef *hi3c) in HAL_I3C_Abort_IT() argument
6896 if (hi3c == NULL) in HAL_I3C_Abort_IT()
6902 if (hi3c->State != HAL_I3C_STATE_ABORT) in HAL_I3C_Abort_IT()
6905 hi3c->State = HAL_I3C_STATE_ABORT; in HAL_I3C_Abort_IT()
6908 __HAL_I3C_DISABLE_IT(hi3c, HAL_I3C_IT_ERRIE); in HAL_I3C_Abort_IT()
6910 hi3c->XferISR = I3C_Abort_ISR; in HAL_I3C_Abort_IT()
6914 LL_I3C_RequestTxFIFOFlush(hi3c->Instance); in HAL_I3C_Abort_IT()
6917 LL_I3C_RequestRxFIFOFlush(hi3c->Instance); in HAL_I3C_Abort_IT()
6920 if (hi3c->Mode == HAL_I3C_MODE_CONTROLLER) in HAL_I3C_Abort_IT()
6923 LL_I3C_RequestControlFIFOFlush(hi3c->Instance); in HAL_I3C_Abort_IT()
6926 LL_I3C_RequestStatusFIFOFlush(hi3c->Instance); in HAL_I3C_Abort_IT()
6930 LL_I3C_DisableDMAReq_Control(hi3c->Instance); in HAL_I3C_Abort_IT()
6931 LL_I3C_DisableDMAReq_RX(hi3c->Instance); in HAL_I3C_Abort_IT()
6932 LL_I3C_DisableDMAReq_TX(hi3c->Instance); in HAL_I3C_Abort_IT()
6933 LL_I3C_DisableDMAReq_Status(hi3c->Instance); in HAL_I3C_Abort_IT()
6935 if (hi3c->Mode == HAL_I3C_MODE_CONTROLLER) in HAL_I3C_Abort_IT()
6940 I3C_Enable_IRQ(hi3c, I3C_XFER_CONTROLLER_RX_CCC_IT); in HAL_I3C_Abort_IT()
6947 I3C_Enable_IRQ(hi3c, I3C_XFER_TARGET_RX_IT); in HAL_I3C_Abort_IT()
6965 HAL_I3C_StateTypeDef HAL_I3C_GetState(const I3C_HandleTypeDef *hi3c) in HAL_I3C_GetState() argument
6967 return hi3c->State; in HAL_I3C_GetState()
6976 HAL_I3C_ModeTypeDef HAL_I3C_GetMode(const I3C_HandleTypeDef *hi3c) in HAL_I3C_GetMode() argument
6978 return hi3c->Mode; in HAL_I3C_GetMode()
6987 uint32_t HAL_I3C_GetError(const I3C_HandleTypeDef *hi3c) in HAL_I3C_GetError() argument
6989 return hi3c->ErrorCode; in HAL_I3C_GetError()
7002 HAL_StatusTypeDef HAL_I3C_GetCCCInfo(I3C_HandleTypeDef *hi3c, in HAL_I3C_GetCCCInfo() argument
7009 if (hi3c == NULL) in HAL_I3C_GetCCCInfo()
7019 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_GetCCCInfo()
7023 else if (hi3c->State == HAL_I3C_STATE_RESET) in HAL_I3C_GetCCCInfo()
7026 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in HAL_I3C_GetCCCInfo()
7034 pCCCInfo->DynamicAddrValid = LL_I3C_IsEnabledOwnDynAddress(hi3c->Instance); in HAL_I3C_GetCCCInfo()
7035 pCCCInfo->DynamicAddr = LL_I3C_GetOwnDynamicAddress(hi3c->Instance); in HAL_I3C_GetCCCInfo()
7041 pCCCInfo->MaxWriteLength = LL_I3C_GetMaxWriteLength(hi3c->Instance); in HAL_I3C_GetCCCInfo()
7047 pCCCInfo->MaxReadLength = LL_I3C_GetMaxReadLength(hi3c->Instance); in HAL_I3C_GetCCCInfo()
7053 pCCCInfo->ResetAction = LL_I3C_GetResetAction(hi3c->Instance); in HAL_I3C_GetCCCInfo()
7059 pCCCInfo->ActivityState = LL_I3C_GetActivityState(hi3c->Instance); in HAL_I3C_GetCCCInfo()
7065 pCCCInfo->HotJoinAllowed = LL_I3C_IsEnabledHotJoin(hi3c->Instance); in HAL_I3C_GetCCCInfo()
7066 pCCCInfo->InBandAllowed = LL_I3C_IsEnabledIBI(hi3c->Instance); in HAL_I3C_GetCCCInfo()
7067 pCCCInfo->CtrlRoleAllowed = LL_I3C_IsEnabledControllerRoleReq(hi3c->Instance); in HAL_I3C_GetCCCInfo()
7073 pCCCInfo->IBICRTgtAddr = LL_I3C_GetIBITargetAddr(hi3c->Instance); in HAL_I3C_GetCCCInfo()
7074 pCCCInfo->IBITgtNbPayload = LL_I3C_GetNbIBIAddData(hi3c->Instance); in HAL_I3C_GetCCCInfo()
7075 pCCCInfo->IBITgtPayload = LL_I3C_GetIBIPayload(hi3c->Instance); in HAL_I3C_GetCCCInfo()
7081 pCCCInfo->IBICRTgtAddr = LL_I3C_GetIBITargetAddr(hi3c->Instance); in HAL_I3C_GetCCCInfo()
7098 HAL_StatusTypeDef HAL_I3C_Get_ENTDAA_Payload_Info(I3C_HandleTypeDef *hi3c, in HAL_I3C_Get_ENTDAA_Payload_Info() argument
7107 if (hi3c == NULL) in HAL_I3C_Get_ENTDAA_Payload_Info()
7117 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in HAL_I3C_Get_ENTDAA_Payload_Info()
7175 static HAL_StatusTypeDef I3C_Tgt_Event_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t itMasks) in I3C_Tgt_Event_ISR() argument
7183 hi3c->ptrRxFunc(hi3c); in I3C_Tgt_Event_ISR()
7190 LL_I3C_ClearFlag_CRUPD(hi3c->Instance); in I3C_Tgt_Event_ISR()
7200 LL_I3C_ClearFlag_GET(hi3c->Instance); in I3C_Tgt_Event_ISR()
7210 LL_I3C_ClearFlag_STA(hi3c->Instance); in I3C_Tgt_Event_ISR()
7220 LL_I3C_ClearFlag_DAUPD(hi3c->Instance); in I3C_Tgt_Event_ISR()
7230 LL_I3C_ClearFlag_MWLUPD(hi3c->Instance); in I3C_Tgt_Event_ISR()
7240 LL_I3C_ClearFlag_MRLUPD(hi3c->Instance); in I3C_Tgt_Event_ISR()
7250 LL_I3C_ClearFlag_RST(hi3c->Instance); in I3C_Tgt_Event_ISR()
7260 LL_I3C_ClearFlag_ASUPD(hi3c->Instance); in I3C_Tgt_Event_ISR()
7270 LL_I3C_ClearFlag_INTUPD(hi3c->Instance); in I3C_Tgt_Event_ISR()
7280 LL_I3C_ClearFlag_DEF(hi3c->Instance); in I3C_Tgt_Event_ISR()
7290 LL_I3C_ClearFlag_GRP(hi3c->Instance); in I3C_Tgt_Event_ISR()
7300 LL_I3C_ClearFlag_WKP(hi3c->Instance); in I3C_Tgt_Event_ISR()
7310 hi3c->NotifyCallback(hi3c, tmpevent); in I3C_Tgt_Event_ISR()
7313 HAL_I3C_NotifyCallback(hi3c, tmpevent); in I3C_Tgt_Event_ISR()
7318 I3C_StateUpdate(hi3c); in I3C_Tgt_Event_ISR()
7330 static HAL_StatusTypeDef I3C_Ctrl_Event_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t itMasks) in I3C_Ctrl_Event_ISR() argument
7336 LL_I3C_ClearFlag_IBI(hi3c->Instance); in I3C_Ctrl_Event_ISR()
7340 hi3c->NotifyCallback(hi3c, EVENT_ID_IBI); in I3C_Ctrl_Event_ISR()
7343 HAL_I3C_NotifyCallback(hi3c, EVENT_ID_IBI); in I3C_Ctrl_Event_ISR()
7351 LL_I3C_ClearFlag_CR(hi3c->Instance); in I3C_Ctrl_Event_ISR()
7355 hi3c->NotifyCallback(hi3c, EVENT_ID_CR); in I3C_Ctrl_Event_ISR()
7358 HAL_I3C_NotifyCallback(hi3c, EVENT_ID_CR); in I3C_Ctrl_Event_ISR()
7366 LL_I3C_ClearFlag_HJ(hi3c->Instance); in I3C_Ctrl_Event_ISR()
7370 hi3c->NotifyCallback(hi3c, EVENT_ID_HJ); in I3C_Ctrl_Event_ISR()
7373 HAL_I3C_NotifyCallback(hi3c, EVENT_ID_HJ); in I3C_Ctrl_Event_ISR()
7378 I3C_StateUpdate(hi3c); in I3C_Ctrl_Event_ISR()
7390 static HAL_StatusTypeDef I3C_Tgt_HotJoin_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t itMasks) in I3C_Tgt_HotJoin_ISR() argument
7396 LL_I3C_ClearFlag_DAUPD(hi3c->Instance); in I3C_Tgt_HotJoin_ISR()
7399 I3C_Disable_IRQ(hi3c, I3C_XFER_TARGET_HOTJOIN); in I3C_Tgt_HotJoin_ISR()
7402 if (LL_I3C_IsEnabledOwnDynAddress(hi3c->Instance) == 1U) in I3C_Tgt_HotJoin_ISR()
7405 I3C_StateUpdate(hi3c); in I3C_Tgt_HotJoin_ISR()
7407 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in I3C_Tgt_HotJoin_ISR()
7411 hi3c->TgtHotJoinCallback(hi3c, (uint8_t)LL_I3C_GetOwnDynamicAddress(hi3c->Instance)); in I3C_Tgt_HotJoin_ISR()
7414 HAL_I3C_TgtHotJoinCallback(hi3c, (uint8_t)LL_I3C_GetOwnDynamicAddress(hi3c->Instance)); in I3C_Tgt_HotJoin_ISR()
7419 hi3c->ErrorCode = HAL_I3C_ERROR_DYNAMIC_ADDR; in I3C_Tgt_HotJoin_ISR()
7422 I3C_ErrorTreatment(hi3c); in I3C_Tgt_HotJoin_ISR()
7435 static HAL_StatusTypeDef I3C_Tgt_CtrlRole_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t itMasks) in I3C_Tgt_CtrlRole_ISR() argument
7441 LL_I3C_ClearFlag_CRUPD(hi3c->Instance); in I3C_Tgt_CtrlRole_ISR()
7444 I3C_Disable_IRQ(hi3c, I3C_XFER_TARGET_CTRLROLE); in I3C_Tgt_CtrlRole_ISR()
7447 I3C_StateUpdate(hi3c); in I3C_Tgt_CtrlRole_ISR()
7449 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in I3C_Tgt_CtrlRole_ISR()
7453 hi3c->NotifyCallback(hi3c, EVENT_ID_GETACCCR); in I3C_Tgt_CtrlRole_ISR()
7456 HAL_I3C_NotifyCallback(hi3c, EVENT_ID_GETACCCR); in I3C_Tgt_CtrlRole_ISR()
7469 static HAL_StatusTypeDef I3C_Tgt_IBI_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t itMasks) in I3C_Tgt_IBI_ISR() argument
7475 LL_I3C_ClearFlag_IBIEND(hi3c->Instance); in I3C_Tgt_IBI_ISR()
7478 I3C_Disable_IRQ(hi3c, I3C_XFER_TARGET_IBI); in I3C_Tgt_IBI_ISR()
7481 I3C_StateUpdate(hi3c); in I3C_Tgt_IBI_ISR()
7483 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in I3C_Tgt_IBI_ISR()
7487 hi3c->NotifyCallback(hi3c, EVENT_ID_IBIEND); in I3C_Tgt_IBI_ISR()
7490 HAL_I3C_NotifyCallback(hi3c, EVENT_ID_IBIEND); in I3C_Tgt_IBI_ISR()
7503 static HAL_StatusTypeDef I3C_Tgt_Tx_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t itMasks) in I3C_Tgt_Tx_ISR() argument
7506 if (hi3c->State == HAL_I3C_STATE_BUSY_TX) in I3C_Tgt_Tx_ISR()
7511 if (hi3c->TxXferCount > 0U) in I3C_Tgt_Tx_ISR()
7514 hi3c->ptrTxFunc(hi3c); in I3C_Tgt_Tx_ISR()
7522 LL_I3C_ClearFlag_FC(hi3c->Instance); in I3C_Tgt_Tx_ISR()
7525 if (LL_I3C_GetXferDataCount(hi3c->Instance) == hi3c->pXferData->TxBuf.Size) in I3C_Tgt_Tx_ISR()
7528 I3C_Disable_IRQ(hi3c, I3C_XFER_TARGET_TX_IT); in I3C_Tgt_Tx_ISR()
7531 I3C_StateUpdate(hi3c); in I3C_Tgt_Tx_ISR()
7533 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in I3C_Tgt_Tx_ISR()
7537 hi3c->TgtTxCpltCallback(hi3c); in I3C_Tgt_Tx_ISR()
7539 HAL_I3C_TgtTxCpltCallback(hi3c); in I3C_Tgt_Tx_ISR()
7544 hi3c->ErrorCode = HAL_I3C_ERROR_SIZE; in I3C_Tgt_Tx_ISR()
7547 I3C_ErrorTreatment(hi3c); in I3C_Tgt_Tx_ISR()
7555 LL_I3C_ClearFlag_WKP(hi3c->Instance); in I3C_Tgt_Tx_ISR()
7559 hi3c->NotifyCallback(hi3c, EVENT_ID_WKP); in I3C_Tgt_Tx_ISR()
7562 HAL_I3C_NotifyCallback(hi3c, EVENT_ID_WKP); in I3C_Tgt_Tx_ISR()
7577 static HAL_StatusTypeDef I3C_Tgt_Rx_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t itMasks) in I3C_Tgt_Rx_ISR() argument
7580 if (hi3c->State == HAL_I3C_STATE_BUSY_RX) in I3C_Tgt_Rx_ISR()
7585 if (hi3c->RxXferCount > 0U) in I3C_Tgt_Rx_ISR()
7588 hi3c->ptrRxFunc(hi3c); in I3C_Tgt_Rx_ISR()
7596 LL_I3C_ClearFlag_FC(hi3c->Instance); in I3C_Tgt_Rx_ISR()
7599 if (LL_I3C_GetXferDataCount(hi3c->Instance) == hi3c->pXferData->RxBuf.Size) in I3C_Tgt_Rx_ISR()
7602 I3C_Disable_IRQ(hi3c, I3C_XFER_TARGET_RX_IT); in I3C_Tgt_Rx_ISR()
7605 I3C_StateUpdate(hi3c); in I3C_Tgt_Rx_ISR()
7607 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in I3C_Tgt_Rx_ISR()
7611 hi3c->TgtRxCpltCallback(hi3c); in I3C_Tgt_Rx_ISR()
7613 HAL_I3C_TgtRxCpltCallback(hi3c); in I3C_Tgt_Rx_ISR()
7618 hi3c->ErrorCode = HAL_I3C_ERROR_SIZE; in I3C_Tgt_Rx_ISR()
7621 I3C_ErrorTreatment(hi3c); in I3C_Tgt_Rx_ISR()
7629 LL_I3C_ClearFlag_WKP(hi3c->Instance); in I3C_Tgt_Rx_ISR()
7633 hi3c->NotifyCallback(hi3c, EVENT_ID_WKP); in I3C_Tgt_Rx_ISR()
7636 HAL_I3C_NotifyCallback(hi3c, EVENT_ID_WKP); in I3C_Tgt_Rx_ISR()
7652 static HAL_StatusTypeDef I3C_Tgt_Tx_DMA_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t itMasks) in I3C_Tgt_Tx_DMA_ISR() argument
7655 if (hi3c->State == HAL_I3C_STATE_BUSY_TX) in I3C_Tgt_Tx_DMA_ISR()
7661 LL_I3C_ClearFlag_FC(hi3c->Instance); in I3C_Tgt_Tx_DMA_ISR()
7664 if (I3C_GET_DMA_REMAIN_DATA(hi3c->hdmatx) == 0U) in I3C_Tgt_Tx_DMA_ISR()
7667 I3C_Disable_IRQ(hi3c, I3C_XFER_DMA); in I3C_Tgt_Tx_DMA_ISR()
7670 I3C_StateUpdate(hi3c); in I3C_Tgt_Tx_DMA_ISR()
7672 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in I3C_Tgt_Tx_DMA_ISR()
7675 hi3c->TxXferCount = 0U; in I3C_Tgt_Tx_DMA_ISR()
7679 hi3c->TgtTxCpltCallback(hi3c); in I3C_Tgt_Tx_DMA_ISR()
7681 HAL_I3C_TgtTxCpltCallback(hi3c); in I3C_Tgt_Tx_DMA_ISR()
7686 hi3c->ErrorCode = HAL_I3C_ERROR_SIZE; in I3C_Tgt_Tx_DMA_ISR()
7689 I3C_ErrorTreatment(hi3c); in I3C_Tgt_Tx_DMA_ISR()
7697 LL_I3C_ClearFlag_WKP(hi3c->Instance); in I3C_Tgt_Tx_DMA_ISR()
7701 hi3c->NotifyCallback(hi3c, EVENT_ID_WKP); in I3C_Tgt_Tx_DMA_ISR()
7704 HAL_I3C_NotifyCallback(hi3c, EVENT_ID_WKP); in I3C_Tgt_Tx_DMA_ISR()
7719 static HAL_StatusTypeDef I3C_Tgt_Rx_DMA_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t itMasks) in I3C_Tgt_Rx_DMA_ISR() argument
7722 if (hi3c->State == HAL_I3C_STATE_BUSY_RX) in I3C_Tgt_Rx_DMA_ISR()
7728 LL_I3C_ClearFlag_FC(hi3c->Instance); in I3C_Tgt_Rx_DMA_ISR()
7731 if (I3C_GET_DMA_REMAIN_DATA(hi3c->hdmarx) == 0U) in I3C_Tgt_Rx_DMA_ISR()
7734 I3C_Disable_IRQ(hi3c, I3C_XFER_DMA); in I3C_Tgt_Rx_DMA_ISR()
7737 I3C_StateUpdate(hi3c); in I3C_Tgt_Rx_DMA_ISR()
7739 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in I3C_Tgt_Rx_DMA_ISR()
7742 hi3c->RxXferCount = 0U; in I3C_Tgt_Rx_DMA_ISR()
7746 hi3c->TgtRxCpltCallback(hi3c); in I3C_Tgt_Rx_DMA_ISR()
7748 HAL_I3C_TgtRxCpltCallback(hi3c); in I3C_Tgt_Rx_DMA_ISR()
7753 hi3c->ErrorCode = HAL_I3C_ERROR_SIZE; in I3C_Tgt_Rx_DMA_ISR()
7756 I3C_ErrorTreatment(hi3c); in I3C_Tgt_Rx_DMA_ISR()
7764 LL_I3C_ClearFlag_WKP(hi3c->Instance); in I3C_Tgt_Rx_DMA_ISR()
7768 hi3c->NotifyCallback(hi3c, EVENT_ID_WKP); in I3C_Tgt_Rx_DMA_ISR()
7771 HAL_I3C_NotifyCallback(hi3c, EVENT_ID_WKP); in I3C_Tgt_Rx_DMA_ISR()
7787 static HAL_StatusTypeDef I3C_Ctrl_Tx_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t itMasks) in I3C_Ctrl_Tx_ISR() argument
7790 if (hi3c->State == HAL_I3C_STATE_BUSY_TX) in I3C_Ctrl_Tx_ISR()
7795 if (hi3c->ControlXferCount > 0U) in I3C_Ctrl_Tx_ISR()
7798 I3C_ControlDataTreatment(hi3c); in I3C_Ctrl_Tx_ISR()
7805 if (hi3c->TxXferCount > 0U) in I3C_Ctrl_Tx_ISR()
7808 hi3c->ptrTxFunc(hi3c); in I3C_Ctrl_Tx_ISR()
7816 LL_I3C_ClearFlag_FC(hi3c->Instance); in I3C_Ctrl_Tx_ISR()
7818 if (hi3c->ControlXferCount == 0U) in I3C_Ctrl_Tx_ISR()
7821 I3C_Disable_IRQ(hi3c, I3C_XFER_CONTROLLER_TX_IT); in I3C_Ctrl_Tx_ISR()
7824 I3C_StateUpdate(hi3c); in I3C_Ctrl_Tx_ISR()
7826 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in I3C_Ctrl_Tx_ISR()
7830 hi3c->CtrlTxCpltCallback(hi3c); in I3C_Ctrl_Tx_ISR()
7832 HAL_I3C_CtrlTxCpltCallback(hi3c); in I3C_Ctrl_Tx_ISR()
7837 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in I3C_Ctrl_Tx_ISR()
7841 hi3c->CtrlTxCpltCallback(hi3c); in I3C_Ctrl_Tx_ISR()
7843 HAL_I3C_CtrlTxCpltCallback(hi3c); in I3C_Ctrl_Tx_ISR()
7847 LL_I3C_RequestTransfer(hi3c->Instance); in I3C_Ctrl_Tx_ISR()
7862 static HAL_StatusTypeDef I3C_Ctrl_Rx_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t itMasks) in I3C_Ctrl_Rx_ISR() argument
7865 if (hi3c->State == HAL_I3C_STATE_BUSY_RX) in I3C_Ctrl_Rx_ISR()
7870 if (hi3c->ControlXferCount > 0U) in I3C_Ctrl_Rx_ISR()
7873 I3C_ControlDataTreatment(hi3c); in I3C_Ctrl_Rx_ISR()
7880 if (hi3c->RxXferCount > 0U) in I3C_Ctrl_Rx_ISR()
7883 hi3c->ptrRxFunc(hi3c); in I3C_Ctrl_Rx_ISR()
7890 if (hi3c->TxXferCount > 0U) in I3C_Ctrl_Rx_ISR()
7893 hi3c->ptrTxFunc(hi3c); in I3C_Ctrl_Rx_ISR()
7901 LL_I3C_ClearFlag_FC(hi3c->Instance); in I3C_Ctrl_Rx_ISR()
7903 if (hi3c->ControlXferCount == 0U) in I3C_Ctrl_Rx_ISR()
7906 I3C_Disable_IRQ(hi3c, I3C_XFER_CONTROLLER_RX_CCC_IT); in I3C_Ctrl_Rx_ISR()
7909 I3C_StateUpdate(hi3c); in I3C_Ctrl_Rx_ISR()
7911 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in I3C_Ctrl_Rx_ISR()
7915 hi3c->CtrlRxCpltCallback(hi3c); in I3C_Ctrl_Rx_ISR()
7917 HAL_I3C_CtrlRxCpltCallback(hi3c); in I3C_Ctrl_Rx_ISR()
7922 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in I3C_Ctrl_Rx_ISR()
7926 hi3c->CtrlRxCpltCallback(hi3c); in I3C_Ctrl_Rx_ISR()
7928 HAL_I3C_CtrlRxCpltCallback(hi3c); in I3C_Ctrl_Rx_ISR()
7932 LL_I3C_RequestTransfer(hi3c->Instance); in I3C_Ctrl_Rx_ISR()
7946 static HAL_StatusTypeDef I3C_Ctrl_Multiple_Xfer_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t itMa… in I3C_Ctrl_Multiple_Xfer_ISR() argument
7949 if (hi3c->State == HAL_I3C_STATE_BUSY_TX_RX) in I3C_Ctrl_Multiple_Xfer_ISR()
7954 if (hi3c->ControlXferCount > 0U) in I3C_Ctrl_Multiple_Xfer_ISR()
7957 I3C_ControlDataTreatment(hi3c); in I3C_Ctrl_Multiple_Xfer_ISR()
7964 if (hi3c->TxXferCount > 0U) in I3C_Ctrl_Multiple_Xfer_ISR()
7967 hi3c->ptrTxFunc(hi3c); in I3C_Ctrl_Multiple_Xfer_ISR()
7974 if (hi3c->RxXferCount > 0U) in I3C_Ctrl_Multiple_Xfer_ISR()
7977 hi3c->ptrRxFunc(hi3c); in I3C_Ctrl_Multiple_Xfer_ISR()
7985 LL_I3C_ClearFlag_FC(hi3c->Instance); in I3C_Ctrl_Multiple_Xfer_ISR()
7987 if (hi3c->ControlXferCount == 0U) in I3C_Ctrl_Multiple_Xfer_ISR()
7990 I3C_Disable_IRQ(hi3c, I3C_XFER_CONTROLLER_TX_IT); in I3C_Ctrl_Multiple_Xfer_ISR()
7993 I3C_Disable_IRQ(hi3c, I3C_XFER_CONTROLLER_RX_CCC_IT); in I3C_Ctrl_Multiple_Xfer_ISR()
7996 I3C_StateUpdate(hi3c); in I3C_Ctrl_Multiple_Xfer_ISR()
7998 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in I3C_Ctrl_Multiple_Xfer_ISR()
8002 hi3c->CtrlMultipleXferCpltCallback(hi3c); in I3C_Ctrl_Multiple_Xfer_ISR()
8004 HAL_I3C_CtrlMultipleXferCpltCallback(hi3c); in I3C_Ctrl_Multiple_Xfer_ISR()
8009 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in I3C_Ctrl_Multiple_Xfer_ISR()
8012 LL_I3C_RequestTransfer(hi3c->Instance); in I3C_Ctrl_Multiple_Xfer_ISR()
8027 static HAL_StatusTypeDef I3C_Ctrl_Tx_Listen_Event_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t it… in I3C_Ctrl_Tx_Listen_Event_ISR() argument
8033 LL_I3C_ClearFlag_IBI(hi3c->Instance); in I3C_Ctrl_Tx_Listen_Event_ISR()
8037 hi3c->NotifyCallback(hi3c, EVENT_ID_IBI); in I3C_Ctrl_Tx_Listen_Event_ISR()
8040 HAL_I3C_NotifyCallback(hi3c, EVENT_ID_IBI); in I3C_Ctrl_Tx_Listen_Event_ISR()
8048 LL_I3C_ClearFlag_CR(hi3c->Instance); in I3C_Ctrl_Tx_Listen_Event_ISR()
8052 hi3c->NotifyCallback(hi3c, EVENT_ID_CR); in I3C_Ctrl_Tx_Listen_Event_ISR()
8055 HAL_I3C_NotifyCallback(hi3c, EVENT_ID_CR); in I3C_Ctrl_Tx_Listen_Event_ISR()
8063 LL_I3C_ClearFlag_HJ(hi3c->Instance); in I3C_Ctrl_Tx_Listen_Event_ISR()
8067 hi3c->NotifyCallback(hi3c, EVENT_ID_HJ); in I3C_Ctrl_Tx_Listen_Event_ISR()
8070 HAL_I3C_NotifyCallback(hi3c, EVENT_ID_HJ); in I3C_Ctrl_Tx_Listen_Event_ISR()
8075 return (I3C_Ctrl_Tx_ISR(hi3c, itMasks)); in I3C_Ctrl_Tx_Listen_Event_ISR()
8085 static HAL_StatusTypeDef I3C_Ctrl_Rx_Listen_Event_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t it… in I3C_Ctrl_Rx_Listen_Event_ISR() argument
8091 LL_I3C_ClearFlag_IBI(hi3c->Instance); in I3C_Ctrl_Rx_Listen_Event_ISR()
8095 hi3c->NotifyCallback(hi3c, EVENT_ID_IBI); in I3C_Ctrl_Rx_Listen_Event_ISR()
8098 HAL_I3C_NotifyCallback(hi3c, EVENT_ID_IBI); in I3C_Ctrl_Rx_Listen_Event_ISR()
8106 LL_I3C_ClearFlag_CR(hi3c->Instance); in I3C_Ctrl_Rx_Listen_Event_ISR()
8110 hi3c->NotifyCallback(hi3c, EVENT_ID_CR); in I3C_Ctrl_Rx_Listen_Event_ISR()
8113 HAL_I3C_NotifyCallback(hi3c, EVENT_ID_CR); in I3C_Ctrl_Rx_Listen_Event_ISR()
8121 LL_I3C_ClearFlag_HJ(hi3c->Instance); in I3C_Ctrl_Rx_Listen_Event_ISR()
8125 hi3c->NotifyCallback(hi3c, EVENT_ID_HJ); in I3C_Ctrl_Rx_Listen_Event_ISR()
8128 HAL_I3C_NotifyCallback(hi3c, EVENT_ID_HJ); in I3C_Ctrl_Rx_Listen_Event_ISR()
8133 return (I3C_Ctrl_Rx_ISR(hi3c, itMasks)); in I3C_Ctrl_Rx_Listen_Event_ISR()
8144 static HAL_StatusTypeDef I3C_Ctrl_Multiple_Xfer_Listen_Event_ISR(struct __I3C_HandleTypeDef *hi3c, … in I3C_Ctrl_Multiple_Xfer_Listen_Event_ISR() argument
8150 LL_I3C_ClearFlag_IBI(hi3c->Instance); in I3C_Ctrl_Multiple_Xfer_Listen_Event_ISR()
8154 hi3c->NotifyCallback(hi3c, EVENT_ID_IBI); in I3C_Ctrl_Multiple_Xfer_Listen_Event_ISR()
8157 HAL_I3C_NotifyCallback(hi3c, EVENT_ID_IBI); in I3C_Ctrl_Multiple_Xfer_Listen_Event_ISR()
8165 LL_I3C_ClearFlag_CR(hi3c->Instance); in I3C_Ctrl_Multiple_Xfer_Listen_Event_ISR()
8169 hi3c->NotifyCallback(hi3c, EVENT_ID_CR); in I3C_Ctrl_Multiple_Xfer_Listen_Event_ISR()
8172 HAL_I3C_NotifyCallback(hi3c, EVENT_ID_CR); in I3C_Ctrl_Multiple_Xfer_Listen_Event_ISR()
8180 LL_I3C_ClearFlag_HJ(hi3c->Instance); in I3C_Ctrl_Multiple_Xfer_Listen_Event_ISR()
8184 hi3c->NotifyCallback(hi3c, EVENT_ID_HJ); in I3C_Ctrl_Multiple_Xfer_Listen_Event_ISR()
8187 HAL_I3C_NotifyCallback(hi3c, EVENT_ID_HJ); in I3C_Ctrl_Multiple_Xfer_Listen_Event_ISR()
8192 return (I3C_Ctrl_Multiple_Xfer_ISR(hi3c, itMasks)); in I3C_Ctrl_Multiple_Xfer_Listen_Event_ISR()
8201 static HAL_StatusTypeDef I3C_Ctrl_DAA_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t itMasks) in I3C_Ctrl_DAA_ISR() argument
8206 if (hi3c->State == HAL_I3C_STATE_BUSY_DAA) in I3C_Ctrl_DAA_ISR()
8212 LL_I3C_ControllerHandleCCC(hi3c->Instance, I3C_BROADCAST_ENTDAA, 0U, LL_I3C_GENERATE_STOP); in I3C_Ctrl_DAA_ISR()
8219 if (LL_I3C_GetRxFIFOThreshold(hi3c->Instance) == LL_I3C_RXFIFO_THRESHOLD_1_4) in I3C_Ctrl_DAA_ISR()
8225 … target_payload |= (uint64_t)((uint64_t)LL_I3C_ReceiveData8(hi3c->Instance) << (index * 8U)); in I3C_Ctrl_DAA_ISR()
8231 target_payload = (uint64_t)LL_I3C_ReceiveData32(hi3c->Instance); in I3C_Ctrl_DAA_ISR()
8234 target_payload |= (uint64_t)((uint64_t)LL_I3C_ReceiveData32(hi3c->Instance) << 32U); in I3C_Ctrl_DAA_ISR()
8239 hi3c->TgtReqDynamicAddrCallback(hi3c, target_payload); in I3C_Ctrl_DAA_ISR()
8241 HAL_I3C_TgtReqDynamicAddrCallback(hi3c, target_payload); in I3C_Ctrl_DAA_ISR()
8249 LL_I3C_ClearFlag_FC(hi3c->Instance); in I3C_Ctrl_DAA_ISR()
8252 I3C_Disable_IRQ(hi3c, I3C_XFER_CONTROLLER_DAA_IT); in I3C_Ctrl_DAA_ISR()
8255 I3C_StateUpdate(hi3c); in I3C_Ctrl_DAA_ISR()
8257 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in I3C_Ctrl_DAA_ISR()
8261 hi3c->CtrlDAACpltCallback(hi3c); in I3C_Ctrl_DAA_ISR()
8263 HAL_I3C_CtrlDAACpltCallback(hi3c); in I3C_Ctrl_DAA_ISR()
8278 static HAL_StatusTypeDef I3C_Ctrl_Tx_DMA_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t itMasks) in I3C_Ctrl_Tx_DMA_ISR() argument
8281 if (hi3c->State == HAL_I3C_STATE_BUSY_TX) in I3C_Ctrl_Tx_DMA_ISR()
8287 LL_I3C_ClearFlag_FC(hi3c->Instance); in I3C_Ctrl_Tx_DMA_ISR()
8289 if (I3C_GET_DMA_REMAIN_DATA(hi3c->hdmacr) == 0U) in I3C_Ctrl_Tx_DMA_ISR()
8292 if (I3C_GET_DMA_REMAIN_DATA(hi3c->hdmatx) == 0U) in I3C_Ctrl_Tx_DMA_ISR()
8295 I3C_Disable_IRQ(hi3c, I3C_XFER_DMA); in I3C_Ctrl_Tx_DMA_ISR()
8298 I3C_StateUpdate(hi3c); in I3C_Ctrl_Tx_DMA_ISR()
8300 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in I3C_Ctrl_Tx_DMA_ISR()
8303 hi3c->TxXferCount = 0U; in I3C_Ctrl_Tx_DMA_ISR()
8307 hi3c->CtrlTxCpltCallback(hi3c); in I3C_Ctrl_Tx_DMA_ISR()
8309 HAL_I3C_CtrlTxCpltCallback(hi3c); in I3C_Ctrl_Tx_DMA_ISR()
8314 hi3c->ErrorCode = HAL_I3C_ERROR_SIZE; in I3C_Ctrl_Tx_DMA_ISR()
8317 I3C_ErrorTreatment(hi3c); in I3C_Ctrl_Tx_DMA_ISR()
8322 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in I3C_Ctrl_Tx_DMA_ISR()
8326 hi3c->CtrlTxCpltCallback(hi3c); in I3C_Ctrl_Tx_DMA_ISR()
8328 HAL_I3C_CtrlTxCpltCallback(hi3c); in I3C_Ctrl_Tx_DMA_ISR()
8332 LL_I3C_RequestTransfer(hi3c->Instance); in I3C_Ctrl_Tx_DMA_ISR()
8346 static HAL_StatusTypeDef I3C_Ctrl_Rx_DMA_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t itMasks) in I3C_Ctrl_Rx_DMA_ISR() argument
8349 if (hi3c->State == HAL_I3C_STATE_BUSY_RX) in I3C_Ctrl_Rx_DMA_ISR()
8355 LL_I3C_ClearFlag_FC(hi3c->Instance); in I3C_Ctrl_Rx_DMA_ISR()
8357 if (I3C_GET_DMA_REMAIN_DATA(hi3c->hdmacr) == 0U) in I3C_Ctrl_Rx_DMA_ISR()
8360 if (I3C_GET_DMA_REMAIN_DATA(hi3c->hdmarx) == 0U) in I3C_Ctrl_Rx_DMA_ISR()
8363 I3C_Disable_IRQ(hi3c, I3C_XFER_DMA); in I3C_Ctrl_Rx_DMA_ISR()
8366 I3C_StateUpdate(hi3c); in I3C_Ctrl_Rx_DMA_ISR()
8368 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in I3C_Ctrl_Rx_DMA_ISR()
8371 hi3c->RxXferCount = 0U; in I3C_Ctrl_Rx_DMA_ISR()
8375 hi3c->CtrlRxCpltCallback(hi3c); in I3C_Ctrl_Rx_DMA_ISR()
8377 HAL_I3C_CtrlRxCpltCallback(hi3c); in I3C_Ctrl_Rx_DMA_ISR()
8382 hi3c->ErrorCode = HAL_I3C_ERROR_SIZE; in I3C_Ctrl_Rx_DMA_ISR()
8385 I3C_ErrorTreatment(hi3c); in I3C_Ctrl_Rx_DMA_ISR()
8390 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in I3C_Ctrl_Rx_DMA_ISR()
8394 hi3c->CtrlRxCpltCallback(hi3c); in I3C_Ctrl_Rx_DMA_ISR()
8396 HAL_I3C_CtrlRxCpltCallback(hi3c); in I3C_Ctrl_Rx_DMA_ISR()
8400 LL_I3C_RequestTransfer(hi3c->Instance); in I3C_Ctrl_Rx_DMA_ISR()
8414 static HAL_StatusTypeDef I3C_Ctrl_Multiple_Xfer_DMA_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t … in I3C_Ctrl_Multiple_Xfer_DMA_ISR() argument
8417 if (hi3c->State == HAL_I3C_STATE_BUSY_TX_RX) in I3C_Ctrl_Multiple_Xfer_DMA_ISR()
8423 LL_I3C_ClearFlag_FC(hi3c->Instance); in I3C_Ctrl_Multiple_Xfer_DMA_ISR()
8425 if (I3C_GET_DMA_REMAIN_DATA(hi3c->hdmacr) == 0U) in I3C_Ctrl_Multiple_Xfer_DMA_ISR()
8428 if (I3C_GET_DMA_REMAIN_DATA(hi3c->hdmarx) == 0U) in I3C_Ctrl_Multiple_Xfer_DMA_ISR()
8430 if (I3C_GET_DMA_REMAIN_DATA(hi3c->hdmatx) == 0U) in I3C_Ctrl_Multiple_Xfer_DMA_ISR()
8433 I3C_Disable_IRQ(hi3c, I3C_XFER_DMA); in I3C_Ctrl_Multiple_Xfer_DMA_ISR()
8436 I3C_StateUpdate(hi3c); in I3C_Ctrl_Multiple_Xfer_DMA_ISR()
8438 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in I3C_Ctrl_Multiple_Xfer_DMA_ISR()
8441 hi3c->RxXferCount = 0U; in I3C_Ctrl_Multiple_Xfer_DMA_ISR()
8444 hi3c->TxXferCount = 0U; in I3C_Ctrl_Multiple_Xfer_DMA_ISR()
8448 hi3c->CtrlMultipleXferCpltCallback(hi3c); in I3C_Ctrl_Multiple_Xfer_DMA_ISR()
8450 HAL_I3C_CtrlMultipleXferCpltCallback(hi3c); in I3C_Ctrl_Multiple_Xfer_DMA_ISR()
8455 hi3c->ErrorCode = HAL_I3C_ERROR_SIZE; in I3C_Ctrl_Multiple_Xfer_DMA_ISR()
8458 I3C_ErrorTreatment(hi3c); in I3C_Ctrl_Multiple_Xfer_DMA_ISR()
8463 hi3c->ErrorCode = HAL_I3C_ERROR_SIZE; in I3C_Ctrl_Multiple_Xfer_DMA_ISR()
8466 I3C_ErrorTreatment(hi3c); in I3C_Ctrl_Multiple_Xfer_DMA_ISR()
8471 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in I3C_Ctrl_Multiple_Xfer_DMA_ISR()
8474 LL_I3C_RequestTransfer(hi3c->Instance); in I3C_Ctrl_Multiple_Xfer_DMA_ISR()
8489 static HAL_StatusTypeDef I3C_Abort_ISR(struct __I3C_HandleTypeDef *hi3c, uint32_t itMasks) in I3C_Abort_ISR() argument
8492 if (hi3c->State == HAL_I3C_STATE_ABORT) in I3C_Abort_ISR()
8497 if (LL_I3C_IsActiveFlag_DOVR(hi3c->Instance) == 1U) in I3C_Abort_ISR()
8500 LL_I3C_RequestRxFIFOFlush(hi3c->Instance); in I3C_Abort_ISR()
8510 LL_I3C_ClearFlag_FC(hi3c->Instance); in I3C_Abort_ISR()
8513 I3C_ErrorTreatment(hi3c); in I3C_Abort_ISR()
8529 I3C_HandleTypeDef *hi3c = (I3C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); in I3C_DMAControlTransmitCplt() local
8532 LL_I3C_DisableDMAReq_Control(hi3c->Instance); in I3C_DMAControlTransmitCplt()
8544 I3C_HandleTypeDef *hi3c = (I3C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); in I3C_DMADataTransmitCplt() local
8547 LL_I3C_DisableDMAReq_TX(hi3c->Instance); in I3C_DMADataTransmitCplt()
8559 I3C_HandleTypeDef *hi3c = (I3C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); in I3C_DMADataReceiveCplt() local
8562 LL_I3C_DisableDMAReq_RX(hi3c->Instance); in I3C_DMADataReceiveCplt()
8575 I3C_HandleTypeDef *hi3c = (I3C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); in I3C_DMAError() local
8577 hi3c->ErrorCode |= HAL_I3C_ERROR_DMA; in I3C_DMAError()
8589 I3C_HandleTypeDef *hi3c = (I3C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); in I3C_DMAAbort() local
8592 if (hi3c->hdmatx != NULL) in I3C_DMAAbort()
8594 hi3c->hdmatx->XferAbortCallback = NULL; in I3C_DMAAbort()
8598 if (hi3c->hdmarx != NULL) in I3C_DMAAbort()
8600 hi3c->hdmarx->XferAbortCallback = NULL; in I3C_DMAAbort()
8604 if (hi3c->hdmacr != NULL) in I3C_DMAAbort()
8606 hi3c->hdmacr->XferAbortCallback = NULL; in I3C_DMAAbort()
8609 I3C_TreatErrorCallback(hi3c); in I3C_DMAAbort()
8623 static HAL_StatusTypeDef I3C_WaitOnFlagUntilTimeout(I3C_HandleTypeDef *hi3c, uint32_t flag, FlagSta… in I3C_WaitOnFlagUntilTimeout() argument
8628 while ((__HAL_I3C_GET_FLAG(hi3c, flag) == flagstatus) && (status == HAL_OK)) in I3C_WaitOnFlagUntilTimeout()
8635 if (__HAL_I3C_GET_FLAG(hi3c, flag) == flagstatus) in I3C_WaitOnFlagUntilTimeout()
8637 hi3c->ErrorCode = HAL_I3C_ERROR_TIMEOUT; in I3C_WaitOnFlagUntilTimeout()
8644 if (__HAL_I3C_GET_FLAG(hi3c, HAL_I3C_FLAG_ERRF) == SET) in I3C_WaitOnFlagUntilTimeout()
8647 LL_I3C_ClearFlag_ERR(hi3c->Instance); in I3C_WaitOnFlagUntilTimeout()
8650 I3C_GetErrorSources(hi3c); in I3C_WaitOnFlagUntilTimeout()
8666 static HAL_StatusTypeDef I3C_WaitOnDAAUntilTimeout(I3C_HandleTypeDef *hi3c, uint32_t timeout, uint3… in I3C_WaitOnDAAUntilTimeout() argument
8669 uint32_t active_flags = READ_REG(hi3c->Instance->EVR); in I3C_WaitOnDAAUntilTimeout()
8680 hi3c->ErrorCode |= HAL_I3C_ERROR_TIMEOUT; in I3C_WaitOnDAAUntilTimeout()
8687 if (__HAL_I3C_GET_FLAG(hi3c, HAL_I3C_FLAG_ERRF) == SET) in I3C_WaitOnDAAUntilTimeout()
8690 LL_I3C_ClearFlag_ERR(hi3c->Instance); in I3C_WaitOnDAAUntilTimeout()
8693 I3C_GetErrorSources(hi3c); in I3C_WaitOnDAAUntilTimeout()
8699 active_flags = READ_REG(hi3c->Instance->EVR); in I3C_WaitOnDAAUntilTimeout()
8710 static void I3C_TransmitByteTreatment(I3C_HandleTypeDef *hi3c) in I3C_TransmitByteTreatment() argument
8713 while ((__HAL_I3C_GET_FLAG(hi3c, HAL_I3C_FLAG_TXFNFF) == SET) && (hi3c->TxXferCount > 0U)) in I3C_TransmitByteTreatment()
8716 LL_I3C_TransmitData8(hi3c->Instance, *hi3c->pXferData->TxBuf.pBuffer); in I3C_TransmitByteTreatment()
8719 hi3c->pXferData->TxBuf.pBuffer++; in I3C_TransmitByteTreatment()
8722 hi3c->TxXferCount--; in I3C_TransmitByteTreatment()
8732 static void I3C_TransmitWordTreatment(I3C_HandleTypeDef *hi3c) in I3C_TransmitWordTreatment() argument
8735 while (__HAL_I3C_GET_FLAG(hi3c, HAL_I3C_FLAG_TXFNFF) == SET) in I3C_TransmitWordTreatment()
8738 LL_I3C_TransmitData32(hi3c->Instance, *((uint32_t *)hi3c->pXferData->TxBuf.pBuffer)); in I3C_TransmitWordTreatment()
8741 hi3c->pXferData->TxBuf.pBuffer += sizeof(uint32_t); in I3C_TransmitWordTreatment()
8743 if (hi3c->TxXferCount < sizeof(uint32_t)) in I3C_TransmitWordTreatment()
8745 hi3c->TxXferCount = 0U; in I3C_TransmitWordTreatment()
8750 hi3c->TxXferCount -= sizeof(uint32_t); in I3C_TransmitWordTreatment()
8761 static void I3C_ReceiveByteTreatment(I3C_HandleTypeDef *hi3c) in I3C_ReceiveByteTreatment() argument
8764 while (__HAL_I3C_GET_FLAG(hi3c, HAL_I3C_FLAG_RXFNEF) == SET) in I3C_ReceiveByteTreatment()
8767 *hi3c->pXferData->RxBuf.pBuffer = LL_I3C_ReceiveData8(hi3c->Instance); in I3C_ReceiveByteTreatment()
8770 hi3c->pXferData->RxBuf.pBuffer++; in I3C_ReceiveByteTreatment()
8773 hi3c->RxXferCount--; in I3C_ReceiveByteTreatment()
8783 static void I3C_ReceiveWordTreatment(I3C_HandleTypeDef *hi3c) in I3C_ReceiveWordTreatment() argument
8786 while (__HAL_I3C_GET_FLAG(hi3c, HAL_I3C_FLAG_RXFNEF) == SET) in I3C_ReceiveWordTreatment()
8789 *((uint32_t *)hi3c->pXferData->RxBuf.pBuffer) = LL_I3C_ReceiveData32(hi3c->Instance); in I3C_ReceiveWordTreatment()
8792 hi3c->pXferData->RxBuf.pBuffer += sizeof(uint32_t); in I3C_ReceiveWordTreatment()
8794 if (hi3c->RxXferCount > sizeof(uint32_t)) in I3C_ReceiveWordTreatment()
8797 hi3c->RxXferCount -= sizeof(uint32_t); in I3C_ReceiveWordTreatment()
8802 hi3c->RxXferCount = 0U; in I3C_ReceiveWordTreatment()
8813 static void I3C_ControlDataTreatment(I3C_HandleTypeDef *hi3c) in I3C_ControlDataTreatment() argument
8816 if (__HAL_I3C_GET_FLAG(hi3c, HAL_I3C_FLAG_CFNFF) == SET) in I3C_ControlDataTreatment()
8819 hi3c->ControlXferCount--; in I3C_ControlDataTreatment()
8822 WRITE_REG(hi3c->Instance->CR, *hi3c->pXferData->CtrlBuf.pBuffer); in I3C_ControlDataTreatment()
8825 hi3c->pXferData->CtrlBuf.pBuffer++; in I3C_ControlDataTreatment()
8835 static void I3C_StateUpdate(I3C_HandleTypeDef *hi3c) in I3C_StateUpdate() argument
8838 if (hi3c->PreviousState == HAL_I3C_STATE_LISTEN) in I3C_StateUpdate()
8841 hi3c->State = HAL_I3C_STATE_LISTEN; in I3C_StateUpdate()
8844 if (hi3c->Mode == HAL_I3C_MODE_TARGET) in I3C_StateUpdate()
8847 hi3c->XferISR = I3C_Tgt_Event_ISR; in I3C_StateUpdate()
8852 hi3c->XferISR = I3C_Ctrl_Event_ISR; in I3C_StateUpdate()
8858 hi3c->State = HAL_I3C_STATE_READY; in I3C_StateUpdate()
8861 hi3c->XferISR = NULL; in I3C_StateUpdate()
8871 static void I3C_GetErrorSources(I3C_HandleTypeDef *hi3c) in I3C_GetErrorSources() argument
8874 switch (hi3c->Mode) in I3C_GetErrorSources()
8879 if (LL_I3C_IsActiveFlag_DERR(hi3c->Instance) == 1U) in I3C_GetErrorSources()
8881 hi3c->ErrorCode |= HAL_I3C_ERROR_DATA_HAND_OFF; in I3C_GetErrorSources()
8885 if (LL_I3C_IsActiveFlag_DNACK(hi3c->Instance) == 1U) in I3C_GetErrorSources()
8887 hi3c->ErrorCode |= HAL_I3C_ERROR_DATA_NACK; in I3C_GetErrorSources()
8891 if (LL_I3C_IsActiveFlag_ANACK(hi3c->Instance) == 1U) in I3C_GetErrorSources()
8893 hi3c->ErrorCode |= HAL_I3C_ERROR_ADDRESS_NACK; in I3C_GetErrorSources()
8897 if (LL_I3C_IsActiveFlag_COVR(hi3c->Instance) == 1U) in I3C_GetErrorSources()
8899 hi3c->ErrorCode |= HAL_I3C_ERROR_COVR; in I3C_GetErrorSources()
8908 if (LL_I3C_IsActiveFlag_STALL(hi3c->Instance) == 1U) in I3C_GetErrorSources()
8910 hi3c->ErrorCode |= HAL_I3C_ERROR_STALL; in I3C_GetErrorSources()
8923 if (LL_I3C_IsActiveFlag_DOVR(hi3c->Instance) == 1U) in I3C_GetErrorSources()
8925 hi3c->ErrorCode |= HAL_I3C_ERROR_DOVR; in I3C_GetErrorSources()
8929 if (LL_I3C_IsActiveFlag_PERR(hi3c->Instance) == 1U) in I3C_GetErrorSources()
8931 hi3c->ErrorCode |= (I3C_SER_PERR | LL_I3C_GetMessageErrorCode(hi3c->Instance)); in I3C_GetErrorSources()
8943 static HAL_StatusTypeDef I3C_Xfer_PriorPreparation(I3C_HandleTypeDef *hi3c, uint8_t counter, uint32… in I3C_Xfer_PriorPreparation() argument
8958 direction = hi3c->pCCCDesc[descr_index].Direction; in I3C_Xfer_PriorPreparation()
8967 global_rx_size += hi3c->pCCCDesc[descr_index].CCCBuf.Size - 1U; in I3C_Xfer_PriorPreparation()
8970 if ((global_tx_size > hi3c->pXferData->TxBuf.Size) || \ in I3C_Xfer_PriorPreparation()
8971 (current_tx_index > hi3c->pXferData->TxBuf.Size) || \ in I3C_Xfer_PriorPreparation()
8972 (hi3c->pXferData->TxBuf.pBuffer == NULL)) in I3C_Xfer_PriorPreparation()
8974 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in I3C_Xfer_PriorPreparation()
8981 current_tx_index = I3C_FillTxBuffer_CCC(hi3c, descr_index, 1U, current_tx_index); in I3C_Xfer_PriorPreparation()
8988 global_tx_size += hi3c->pCCCDesc[descr_index].CCCBuf.Size; in I3C_Xfer_PriorPreparation()
8991 if ((global_tx_size > hi3c->pXferData->TxBuf.Size) || \ in I3C_Xfer_PriorPreparation()
8992 (current_tx_index > hi3c->pXferData->TxBuf.Size) || \ in I3C_Xfer_PriorPreparation()
8993 (hi3c->pXferData->TxBuf.pBuffer == NULL)) in I3C_Xfer_PriorPreparation()
8995 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in I3C_Xfer_PriorPreparation()
9002 current_tx_index = I3C_FillTxBuffer_CCC(hi3c, in I3C_Xfer_PriorPreparation()
9004 hi3c->pCCCDesc[descr_index].CCCBuf.Size, in I3C_Xfer_PriorPreparation()
9011 global_rx_size += hi3c->pCCCDesc[descr_index].CCCBuf.Size; in I3C_Xfer_PriorPreparation()
9018 direction = hi3c->pCCCDesc[descr_index].Direction; in I3C_Xfer_PriorPreparation()
9024 global_tx_size += hi3c->pCCCDesc[descr_index].CCCBuf.Size; in I3C_Xfer_PriorPreparation()
9027 if ((global_tx_size > hi3c->pXferData->TxBuf.Size) || \ in I3C_Xfer_PriorPreparation()
9028 (current_tx_index > hi3c->pXferData->TxBuf.Size) || \ in I3C_Xfer_PriorPreparation()
9029 (hi3c->pXferData->TxBuf.pBuffer == NULL)) in I3C_Xfer_PriorPreparation()
9031 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in I3C_Xfer_PriorPreparation()
9038 current_tx_index = I3C_FillTxBuffer_CCC(hi3c, in I3C_Xfer_PriorPreparation()
9040 hi3c->pCCCDesc[descr_index].CCCBuf.Size, in I3C_Xfer_PriorPreparation()
9053 direction = hi3c->pPrivateDesc[descr_index].Direction; in I3C_Xfer_PriorPreparation()
9059 global_tx_size += hi3c->pPrivateDesc[descr_index].TxBuf.Size; in I3C_Xfer_PriorPreparation()
9062 if ((global_tx_size > hi3c->pXferData->TxBuf.Size) || \ in I3C_Xfer_PriorPreparation()
9063 (current_tx_index > hi3c->pXferData->TxBuf.Size) || \ in I3C_Xfer_PriorPreparation()
9064 (hi3c->pXferData->TxBuf.pBuffer == NULL)) in I3C_Xfer_PriorPreparation()
9066 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in I3C_Xfer_PriorPreparation()
9073 current_tx_index = I3C_FillTxBuffer_Private(hi3c, in I3C_Xfer_PriorPreparation()
9075 hi3c->pPrivateDesc[descr_index].TxBuf.Size, in I3C_Xfer_PriorPreparation()
9081 global_rx_size += hi3c->pPrivateDesc[descr_index].RxBuf.Size; in I3C_Xfer_PriorPreparation()
9095 if (LL_I3C_GetTxFIFOThreshold(hi3c->Instance) == LL_I3C_TXFIFO_THRESHOLD_4_4) in I3C_Xfer_PriorPreparation()
9101 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in I3C_Xfer_PriorPreparation()
9110 if (global_rx_size > hi3c->pXferData->RxBuf.Size) in I3C_Xfer_PriorPreparation()
9112 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in I3C_Xfer_PriorPreparation()
9117 hi3c->RxXferCount = global_rx_size; in I3C_Xfer_PriorPreparation()
9121 hi3c->TxXferCount = global_tx_size; in I3C_Xfer_PriorPreparation()
9136 static uint32_t I3C_FillTxBuffer_CCC(I3C_HandleTypeDef *hi3c, in I3C_FillTxBuffer_CCC() argument
9145 hi3c->pXferData->TxBuf.pBuffer[index_tx] = hi3c->pCCCDesc[indexDesc].CCCBuf.pBuffer[index]; in I3C_FillTxBuffer_CCC()
9162 static uint32_t I3C_FillTxBuffer_Private(I3C_HandleTypeDef *hi3c, in I3C_FillTxBuffer_Private() argument
9171 hi3c->pXferData->TxBuf.pBuffer[index_tx] = hi3c->pPrivateDesc[indexDesc].TxBuf.pBuffer[index]; in I3C_FillTxBuffer_Private()
9187 static HAL_StatusTypeDef I3C_ControlBuffer_PriorPreparation(I3C_HandleTypeDef *hi3c, in I3C_ControlBuffer_PriorPreparation() argument
9198 if (hi3c->pXferData->CtrlBuf.pBuffer == NULL) in I3C_ControlBuffer_PriorPreparation()
9200 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in I3C_ControlBuffer_PriorPreparation()
9213 LL_I3C_DisableArbitrationHeader(hi3c->Instance); in I3C_ControlBuffer_PriorPreparation()
9218 LL_I3C_EnableArbitrationHeader(hi3c->Instance); in I3C_ControlBuffer_PriorPreparation()
9226 if (hi3c->pXferData->CtrlBuf.Size < (uint32_t)counter) in I3C_ControlBuffer_PriorPreparation()
9228 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in I3C_ControlBuffer_PriorPreparation()
9234 hi3c->ControlXferCount = (uint32_t)counter; in I3C_ControlBuffer_PriorPreparation()
9240 …hi3c->pXferData->CtrlBuf.pBuffer[index] = ((uint32_t)hi3c->pCCCDesc[index].CCCBuf.Size … in I3C_ControlBuffer_PriorPreparation()
9241 … ((uint32_t)hi3c->pCCCDesc[index].CCC << I3C_CR_CCC_Pos) | in I3C_ControlBuffer_PriorPreparation()
9246 …hi3c->pXferData->CtrlBuf.pBuffer[index] = ((uint32_t)hi3c->pCCCDesc[index].CCCBuf.Size … in I3C_ControlBuffer_PriorPreparation()
9247 … ((uint32_t)hi3c->pCCCDesc[index].CCC << I3C_CR_CCC_Pos) | in I3C_ControlBuffer_PriorPreparation()
9255 if (hi3c->pXferData->CtrlBuf.Size < ((uint32_t)counter * 2U)) in I3C_ControlBuffer_PriorPreparation()
9257 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in I3C_ControlBuffer_PriorPreparation()
9263 hi3c->ControlXferCount = ((uint32_t)counter * 2U); in I3C_ControlBuffer_PriorPreparation()
9269 …hi3c->pXferData->CtrlBuf.pBuffer[index] = (nb_define_bytes … in I3C_ControlBuffer_PriorPreparation()
9270 … ((uint32_t)hi3c->pCCCDesc[index / 2U].CCC << I3C_CR_CCC_Pos) | in I3C_ControlBuffer_PriorPreparation()
9274 hi3c->pXferData->CtrlBuf.pBuffer[index + 1U] = in I3C_ControlBuffer_PriorPreparation()
9275 (((uint32_t)hi3c->pCCCDesc[index / 2U].CCCBuf.Size - nb_define_bytes) | in I3C_ControlBuffer_PriorPreparation()
9276 hi3c->pCCCDesc[index / 2U].Direction | in I3C_ControlBuffer_PriorPreparation()
9277 ((uint32_t)hi3c->pCCCDesc[index / 2U].TargetAddr << I3C_CR_ADD_Pos) | in I3C_ControlBuffer_PriorPreparation()
9282 …hi3c->pXferData->CtrlBuf.pBuffer[index] = (nb_define_bytes … in I3C_ControlBuffer_PriorPreparation()
9283 … ((uint32_t)hi3c->pCCCDesc[index / 2U].CCC << I3C_CR_CCC_Pos) | in I3C_ControlBuffer_PriorPreparation()
9287 hi3c->pXferData->CtrlBuf.pBuffer[index + 1U] = in I3C_ControlBuffer_PriorPreparation()
9288 (((uint32_t)hi3c->pCCCDesc[index / 2U].CCCBuf.Size - nb_define_bytes) | in I3C_ControlBuffer_PriorPreparation()
9289 hi3c->pCCCDesc[index / 2U].Direction | in I3C_ControlBuffer_PriorPreparation()
9290 ((uint32_t)hi3c->pCCCDesc[index / 2U].TargetAddr << I3C_CR_ADD_Pos) | in I3C_ControlBuffer_PriorPreparation()
9298 if (hi3c->pXferData->CtrlBuf.Size < (uint32_t)counter) in I3C_ControlBuffer_PriorPreparation()
9300 hi3c->ErrorCode = HAL_I3C_ERROR_INVALID_PARAM; in I3C_ControlBuffer_PriorPreparation()
9306 hi3c->ControlXferCount = (uint32_t)counter; in I3C_ControlBuffer_PriorPreparation()
9312 if (hi3c->pPrivateDesc[index].Direction == HAL_I3C_DIRECTION_READ) in I3C_ControlBuffer_PriorPreparation()
9314 nb_data_bytes = hi3c->pPrivateDesc[index].RxBuf.Size; in I3C_ControlBuffer_PriorPreparation()
9318 nb_data_bytes = hi3c->pPrivateDesc[index].TxBuf.Size; in I3C_ControlBuffer_PriorPreparation()
9322 hi3c->pXferData->CtrlBuf.pBuffer[index] = in I3C_ControlBuffer_PriorPreparation()
9323 (nb_data_bytes | hi3c->pPrivateDesc[index].Direction | in I3C_ControlBuffer_PriorPreparation()
9324 ((uint32_t)hi3c->pPrivateDesc[index].TargetAddr << I3C_CR_ADD_Pos) | in I3C_ControlBuffer_PriorPreparation()
9329 if (hi3c->pPrivateDesc[index].Direction == HAL_I3C_DIRECTION_READ) in I3C_ControlBuffer_PriorPreparation()
9331 nb_data_bytes = hi3c->pPrivateDesc[index].RxBuf.Size; in I3C_ControlBuffer_PriorPreparation()
9335 nb_data_bytes = hi3c->pPrivateDesc[index].TxBuf.Size; in I3C_ControlBuffer_PriorPreparation()
9339 hi3c->pXferData->CtrlBuf.pBuffer[index] = in I3C_ControlBuffer_PriorPreparation()
9340 (nb_data_bytes | hi3c->pPrivateDesc[index].Direction | in I3C_ControlBuffer_PriorPreparation()
9341 ((uint32_t)hi3c->pPrivateDesc[index].TargetAddr << I3C_CR_ADD_Pos) | in I3C_ControlBuffer_PriorPreparation()
9359 static HAL_StatusTypeDef I3C_Ctrl_IsDevice_Ready(I3C_HandleTypeDef *hi3c, in I3C_Ctrl_IsDevice_Ready() argument
9373 handle_state = hi3c->State; in I3C_Ctrl_IsDevice_Ready()
9376 if (hi3c->Mode != HAL_I3C_MODE_CONTROLLER) in I3C_Ctrl_IsDevice_Ready()
9378 hi3c->ErrorCode = HAL_I3C_ERROR_NOT_ALLOWED; in I3C_Ctrl_IsDevice_Ready()
9389 hi3c->ErrorCode = HAL_I3C_ERROR_NONE; in I3C_Ctrl_IsDevice_Ready()
9390 hi3c->State = HAL_I3C_STATE_BUSY; in I3C_Ctrl_IsDevice_Ready()
9393 arbitration_previous_state = LL_I3C_IsEnabledArbitrationHeader(hi3c->Instance); in I3C_Ctrl_IsDevice_Ready()
9396 LL_I3C_DisableArbitrationHeader(hi3c->Instance); in I3C_Ctrl_IsDevice_Ready()
9405 WRITE_REG(hi3c->Instance->CR, CR_tmp); in I3C_Ctrl_IsDevice_Ready()
9408 exit_condition = (READ_REG(hi3c->Instance->EVR) & (I3C_EVR_FCF | I3C_EVR_ERRF)); in I3C_Ctrl_IsDevice_Ready()
9419 hi3c->ErrorCode |= HAL_I3C_ERROR_TIMEOUT; in I3C_Ctrl_IsDevice_Ready()
9426 exit_condition = (READ_REG(hi3c->Instance->EVR) & (I3C_EVR_FCF | I3C_EVR_ERRF)); in I3C_Ctrl_IsDevice_Ready()
9432 if (__HAL_I3C_GET_FLAG(hi3c, I3C_EVR_FCF) == SET) in I3C_Ctrl_IsDevice_Ready()
9435 LL_I3C_ClearFlag_FC(hi3c->Instance); in I3C_Ctrl_IsDevice_Ready()
9443 LL_I3C_ClearFlag_ERR(hi3c->Instance); in I3C_Ctrl_IsDevice_Ready()
9455 hi3c->ErrorCode = HAL_I3C_ERROR_ADDRESS_NACK; in I3C_Ctrl_IsDevice_Ready()
9460 I3C_StateUpdate(hi3c); in I3C_Ctrl_IsDevice_Ready()
9465 LL_I3C_EnableArbitrationHeader(hi3c->Instance); in I3C_Ctrl_IsDevice_Ready()
9479 static void I3C_Enable_IRQ(I3C_HandleTypeDef *hi3c, uint32_t InterruptRequest) in I3C_Enable_IRQ() argument
9561 __HAL_I3C_ENABLE_IT(hi3c, tmpisr); in I3C_Enable_IRQ()
9571 static void I3C_Disable_IRQ(I3C_HandleTypeDef *hi3c, uint32_t InterruptRequest) in I3C_Disable_IRQ() argument
9646 __HAL_I3C_DISABLE_IT(hi3c, tmpisr); in I3C_Disable_IRQ()
9655 static void I3C_ErrorTreatment(I3C_HandleTypeDef *hi3c) in I3C_ErrorTreatment() argument
9657 HAL_I3C_StateTypeDef tmpstate = hi3c->State; in I3C_ErrorTreatment()
9664 I3C_StateUpdate(hi3c); in I3C_ErrorTreatment()
9667 … I3C_Disable_IRQ(hi3c, (I3C_XFER_TARGET_IBI | I3C_XFER_TARGET_HOTJOIN | I3C_XFER_TARGET_CTRLROLE)); in I3C_ErrorTreatment()
9672 I3C_Disable_IRQ(hi3c, I3C_XFER_CONTROLLER_RX_CCC_IT); in I3C_ErrorTreatment()
9675 hi3c->TxXferCount = 0U; in I3C_ErrorTreatment()
9678 hi3c->RxXferCount = 0U; in I3C_ErrorTreatment()
9681 hi3c->ControlXferCount = 0U; in I3C_ErrorTreatment()
9684 hi3c->ptrTxFunc = NULL; in I3C_ErrorTreatment()
9687 hi3c->ptrRxFunc = NULL; in I3C_ErrorTreatment()
9690 hi3c->pXferData = NULL; in I3C_ErrorTreatment()
9691 hi3c->pCCCDesc = NULL; in I3C_ErrorTreatment()
9692 hi3c->pPrivateDesc = NULL; in I3C_ErrorTreatment()
9696 LL_I3C_RequestTxFIFOFlush(hi3c->Instance); in I3C_ErrorTreatment()
9699 LL_I3C_RequestRxFIFOFlush(hi3c->Instance); in I3C_ErrorTreatment()
9702 if (hi3c->Mode == HAL_I3C_MODE_CONTROLLER) in I3C_ErrorTreatment()
9705 LL_I3C_RequestControlFIFOFlush(hi3c->Instance); in I3C_ErrorTreatment()
9708 LL_I3C_RequestStatusFIFOFlush(hi3c->Instance); in I3C_ErrorTreatment()
9713 if (hi3c->hdmacr != NULL) in I3C_ErrorTreatment()
9716 LL_I3C_DisableDMAReq_Control(hi3c->Instance); in I3C_ErrorTreatment()
9719 if (HAL_DMA_GetState(hi3c->hdmacr) != HAL_DMA_STATE_READY) in I3C_ErrorTreatment()
9728 if (HAL_DMA_Abort_IT(hi3c->hdmacr) != HAL_OK) in I3C_ErrorTreatment()
9731 hi3c->hdmacr->XferAbortCallback(hi3c->hdmacr); in I3C_ErrorTreatment()
9737 if (hi3c->hdmarx != NULL) in I3C_ErrorTreatment()
9740 LL_I3C_DisableDMAReq_RX(hi3c->Instance); in I3C_ErrorTreatment()
9743 if (HAL_DMA_GetState(hi3c->hdmarx) != HAL_DMA_STATE_READY) in I3C_ErrorTreatment()
9747 hi3c->hdmarx->XferAbortCallback = I3C_DMAAbort; in I3C_ErrorTreatment()
9753 if (HAL_DMA_Abort_IT(hi3c->hdmarx) != HAL_OK) in I3C_ErrorTreatment()
9756 hi3c->hdmarx->XferAbortCallback(hi3c->hdmarx); in I3C_ErrorTreatment()
9762 if (hi3c->hdmatx != NULL) in I3C_ErrorTreatment()
9765 LL_I3C_DisableDMAReq_TX(hi3c->Instance); in I3C_ErrorTreatment()
9768 if (HAL_DMA_GetState(hi3c->hdmatx) != HAL_DMA_STATE_READY) in I3C_ErrorTreatment()
9772 hi3c->hdmatx->XferAbortCallback = I3C_DMAAbort; in I3C_ErrorTreatment()
9778 if (HAL_DMA_Abort_IT(hi3c->hdmatx) != HAL_OK) in I3C_ErrorTreatment()
9781 hi3c->hdmatx->XferAbortCallback(hi3c->hdmatx); in I3C_ErrorTreatment()
9791 I3C_TreatErrorCallback(hi3c); in I3C_ErrorTreatment()
9801 static void I3C_TreatErrorCallback(I3C_HandleTypeDef *hi3c) in I3C_TreatErrorCallback() argument
9803 if (hi3c->State == HAL_I3C_STATE_ABORT) in I3C_TreatErrorCallback()
9806 I3C_StateUpdate(hi3c); in I3C_TreatErrorCallback()
9810 hi3c->AbortCpltCallback(hi3c); in I3C_TreatErrorCallback()
9812 HAL_I3C_AbortCpltCallback(hi3c); in I3C_TreatErrorCallback()
9818 I3C_StateUpdate(hi3c); in I3C_TreatErrorCallback()
9822 hi3c->ErrorCallback(hi3c); in I3C_TreatErrorCallback()
9824 HAL_I3C_ErrorCallback(hi3c); in I3C_TreatErrorCallback()