Lines Matching refs:CFG1
1507 if (HAL_IS_BIT_CLR(hi2s->Instance->CFG1, SPI_CFG1_TXDMAEN)) in HAL_I2S_Transmit_DMA()
1510 SET_BIT(hi2s->Instance->CFG1, SPI_CFG1_TXDMAEN); in HAL_I2S_Transmit_DMA()
1636 if (HAL_IS_BIT_CLR(hi2s->Instance->CFG1, SPI_CFG1_RXDMAEN)) in HAL_I2S_Receive_DMA()
1639 SET_BIT(hi2s->Instance->CFG1, SPI_CFG1_RXDMAEN); in HAL_I2S_Receive_DMA()
1702 CLEAR_BIT(hi2s->Instance->CFG1, SPI_CFG1_TXDMAEN | SPI_CFG1_RXDMAEN); in HAL_I2SEx_TransmitReceive_DMA()
1769 if (HAL_IS_BIT_CLR(hi2s->Instance->CFG1, SPI_CFG1_TXDMAEN)) in HAL_I2SEx_TransmitReceive_DMA()
1772 SET_BIT(hi2s->Instance->CFG1, SPI_CFG1_TXDMAEN); in HAL_I2SEx_TransmitReceive_DMA()
1831 if (HAL_IS_BIT_CLR(hi2s->Instance->CFG1, SPI_CFG1_RXDMAEN)) in HAL_I2SEx_TransmitReceive_DMA()
1834 SET_BIT(hi2s->Instance->CFG1, SPI_CFG1_RXDMAEN); in HAL_I2SEx_TransmitReceive_DMA()
1974 CLEAR_BIT(hi2s->Instance->CFG1, SPI_CFG1_TXDMAEN); in HAL_I2S_DMAStop()
1975 CLEAR_BIT(hi2s->Instance->CFG1, SPI_CFG1_RXDMAEN); in HAL_I2S_DMAStop()
2427 CLEAR_BIT(hi2s->Instance->CFG1, SPI_CFG1_TXDMAEN); in I2S_DMATxCplt()
2474 CLEAR_BIT(hi2s->Instance->CFG1, SPI_CFG1_RXDMAEN); in I2S_DMARxCplt()
2519 CLEAR_BIT(hi2s->Instance->CFG1, SPI_CFG1_TXDMAEN); in I2SEx_DMATxRxCplt()
2523 CLEAR_BIT(hi2s->Instance->CFG1, SPI_CFG1_RXDMAEN); in I2SEx_DMATxRxCplt()
2568 CLEAR_BIT(hi2s->Instance->CFG1, (SPI_CFG1_RXDMAEN | SPI_CFG1_TXDMAEN)); in I2S_DMAError()