Lines Matching refs:pConfig

327 …c HAL_StatusTypeDef FMAC_FilterConfig(FMAC_HandleTypeDef *hfmac, FMAC_FilterConfigTypeDef *pConfig,
796 …L_StatusTypeDef HAL_FMAC_FilterConfig(FMAC_HandleTypeDef *hfmac, FMAC_FilterConfigTypeDef *pConfig) in HAL_FMAC_FilterConfig() argument
798 return (FMAC_FilterConfig(hfmac, pConfig, PRELOAD_ACCESS_POLLING)); in HAL_FMAC_FilterConfig()
812 …atusTypeDef HAL_FMAC_FilterConfig_DMA(FMAC_HandleTypeDef *hfmac, FMAC_FilterConfigTypeDef *pConfig) in HAL_FMAC_FilterConfig_DMA() argument
814 return (FMAC_FilterConfig(hfmac, pConfig, PRELOAD_ACCESS_DMA)); in HAL_FMAC_FilterConfig_DMA()
1650 …c HAL_StatusTypeDef FMAC_FilterConfig(FMAC_HandleTypeDef *hfmac, FMAC_FilterConfigTypeDef *pConfig, in FMAC_FilterConfig() argument
1661 assert_param(IS_FMAC_THRESHOLD(pConfig->InputThreshold)); in FMAC_FilterConfig()
1662 assert_param(IS_FMAC_THRESHOLD(pConfig->OutputThreshold)); in FMAC_FilterConfig()
1663 assert_param(IS_FMAC_BUFFER_ACCESS(pConfig->InputAccess)); in FMAC_FilterConfig()
1664 assert_param(IS_FMAC_BUFFER_ACCESS(pConfig->OutputAccess)); in FMAC_FilterConfig()
1665 assert_param(IS_FMAC_CLIP_STATE(pConfig->Clip)); in FMAC_FilterConfig()
1666 assert_param(IS_FMAC_FILTER_FUNCTION(pConfig->Filter)); in FMAC_FilterConfig()
1667 assert_param(IS_FMAC_PARAM_P(pConfig->Filter, pConfig->P)); in FMAC_FilterConfig()
1668 assert_param(IS_FMAC_PARAM_Q(pConfig->Filter, pConfig->Q)); in FMAC_FilterConfig()
1669 assert_param(IS_FMAC_PARAM_R(pConfig->Filter, pConfig->R)); in FMAC_FilterConfig()
1693 if (pConfig->InputBufferSize != 0U) in FMAC_FilterConfig()
1697 …(((((uint32_t)(pConfig->InputBaseAddress)) << FMAC_X1BUFCFG_X1_BASE_Pos) & FMAC_X1BUFCFG_X1_BA… in FMAC_FilterConfig()
1698 ((((uint32_t)(pConfig->InputBufferSize)) << FMAC_X1BUFCFG_X1_BUF_SIZE_Pos) & \ in FMAC_FilterConfig()
1703 if (pConfig->InputThreshold != FMAC_THRESHOLD_NO_VALUE) in FMAC_FilterConfig()
1706 …param(IS_FMAC_THRESHOLD_APPLICABLE(FMAC_GET_X1_SIZE(hfmac), pConfig->InputThreshold, pConfig->Inpu… in FMAC_FilterConfig()
1710 ((pConfig->InputThreshold) & FMAC_X1BUFCFG_FULL_WM)); in FMAC_FilterConfig()
1714 if (pConfig->CoeffBufferSize != 0U) in FMAC_FilterConfig()
1718 …(((((uint32_t)(pConfig->CoeffBaseAddress)) << FMAC_X2BUFCFG_X2_BASE_Pos) & FMAC_X2BUFCFG_X2_BA… in FMAC_FilterConfig()
1719 ((((uint32_t)(pConfig->CoeffBufferSize)) << FMAC_X2BUFCFG_X2_BUF_SIZE_Pos) &\ in FMAC_FilterConfig()
1724 if (pConfig->OutputBufferSize != 0U) in FMAC_FilterConfig()
1728 …(((((uint32_t)(pConfig->OutputBaseAddress)) << FMAC_YBUFCFG_Y_BASE_Pos) & FMAC_YBUFCFG_Y_BASE)… in FMAC_FilterConfig()
1729 …((((uint32_t)(pConfig->OutputBufferSize)) << FMAC_YBUFCFG_Y_BUF_SIZE_Pos) & FMAC_YBUFCFG_Y_BUF_SI… in FMAC_FilterConfig()
1733 if (pConfig->OutputThreshold != FMAC_THRESHOLD_NO_VALUE) in FMAC_FilterConfig()
1736 …_param(IS_FMAC_THRESHOLD_APPLICABLE(FMAC_GET_Y_SIZE(hfmac), pConfig->OutputThreshold, pConfig->Out… in FMAC_FilterConfig()
1740 ((pConfig->OutputThreshold) & FMAC_YBUFCFG_EMPTY_WM)); in FMAC_FilterConfig()
1744 tmpcr = pConfig->Clip & FMAC_CR_CLIPEN; in FMAC_FilterConfig()
1748 …if ((pConfig->InputAccess == FMAC_BUFFER_ACCESS_DMA) || (pConfig->InputAccess == FMAC_BUFFER_ACC… in FMAC_FilterConfig()
1749 …(pConfig->OutputAccess == FMAC_BUFFER_ACCESS_DMA) || (pConfig->OutputAccess == FMAC_BUFFER_ACCESS_… in FMAC_FilterConfig()
1758 hfmac->InputAccess = pConfig->InputAccess; in FMAC_FilterConfig()
1759 hfmac->OutputAccess = pConfig->OutputAccess; in FMAC_FilterConfig()
1765 assert_param(((pConfig->Filter == FMAC_FUNC_CONVO_FIR) && (x2size >= pConfig->P)) || \ in FMAC_FilterConfig()
1766 ((pConfig->Filter == FMAC_FUNC_IIR_DIRECT_FORM_1) && \ in FMAC_FilterConfig()
1767 (x2size >= ((uint32_t)pConfig->P + (uint32_t)pConfig->Q)))); in FMAC_FilterConfig()
1770 hfmac->FilterParam = (FMAC_PARAM_START | pConfig->Filter | \ in FMAC_FilterConfig()
1771 ((((uint32_t)(pConfig->P)) << FMAC_PARAM_P_Pos) & FMAC_PARAM_P) | \ in FMAC_FilterConfig()
1772 ((((uint32_t)(pConfig->Q)) << FMAC_PARAM_Q_Pos) & FMAC_PARAM_Q) | \ in FMAC_FilterConfig()
1773 ((((uint32_t)(pConfig->R)) << FMAC_PARAM_R_Pos) & FMAC_PARAM_R)); in FMAC_FilterConfig()
1776 if ((pConfig->pCoeffB != NULL) && (pConfig->CoeffBSize != 0U)) in FMAC_FilterConfig()
1779 assert_param(((uint32_t)pConfig->CoeffASize + (uint32_t)pConfig->CoeffBSize) <= x2size); in FMAC_FilterConfig()
1781 assert_param(pConfig->CoeffBSize >= pConfig->P); in FMAC_FilterConfig()
1785 assert_param(((pConfig->Filter == FMAC_FUNC_CONVO_FIR) && in FMAC_FilterConfig()
1786 (pConfig->pCoeffA == NULL) && (pConfig->CoeffASize == 0U)) || in FMAC_FilterConfig()
1787 ((pConfig->Filter == FMAC_FUNC_IIR_DIRECT_FORM_1) && in FMAC_FilterConfig()
1788 (pConfig->pCoeffA != NULL) && (pConfig->CoeffASize != 0U) && in FMAC_FilterConfig()
1789 (pConfig->CoeffASize >= pConfig->Q))); in FMAC_FilterConfig()
1793 (((uint32_t)(pConfig->CoeffBSize) << FMAC_PARAM_P_Pos) | \ in FMAC_FilterConfig()
1794 ((uint32_t)(pConfig->CoeffASize) << FMAC_PARAM_Q_Pos) | \ in FMAC_FilterConfig()
1800 FMAC_WritePreloadDataIncrementPtr(hfmac, &(pConfig->pCoeffB), pConfig->CoeffBSize); in FMAC_FilterConfig()
1803 if ((pConfig->pCoeffA != NULL) && (pConfig->CoeffASize != 0U)) in FMAC_FilterConfig()
1806 FMAC_WritePreloadDataIncrementPtr(hfmac, &(pConfig->pCoeffA), pConfig->CoeffASize); in FMAC_FilterConfig()
1822 hfmac->pInput = pConfig->pCoeffA; in FMAC_FilterConfig()
1823 hfmac->InputCurrentSize = pConfig->CoeffASize; in FMAC_FilterConfig()
1838 (uint32_t)(2UL * pConfig->CoeffBSize); /* Set DMA data size */ in FMAC_FilterConfig()
1840 (uint32_t)pConfig->pCoeffB; /* Set DMA source address */ in FMAC_FilterConfig()
1854 status = HAL_DMA_Start_IT(hfmac->hdmaPreload, (uint32_t)pConfig->pCoeffB, \ in FMAC_FilterConfig()
1855 … (uint32_t)&hfmac->Instance->WDATA, (uint32_t)(2UL * pConfig->CoeffBSize)); in FMAC_FilterConfig()