Lines Matching refs:MODE

949 #define IS_XSPI_MEMORY_MODE(MODE)                 (((MODE) == HAL_XSPI_SINGLE_MEM) || \  argument
950 ((MODE) == HAL_XSPI_DUAL_MEM))
997 #define IS_XSPI_CLOCK_MODE(MODE) (((MODE) == HAL_XSPI_CLOCK_MODE_0) || \ argument
998 ((MODE) == HAL_XSPI_CLOCK_MODE_3))
1062 #define IS_XSPI_INSTRUCTION_MODE(MODE) (((MODE) == HAL_XSPI_INSTRUCTION_NONE) || \ argument
1063 ((MODE) == HAL_XSPI_INSTRUCTION_1_LINE) || \
1064 ((MODE) == HAL_XSPI_INSTRUCTION_2_LINES) || \
1065 ((MODE) == HAL_XSPI_INSTRUCTION_4_LINES) || \
1066 ((MODE) == HAL_XSPI_INSTRUCTION_8_LINES))
1073 #define IS_XSPI_INSTRUCTION_DTR_MODE(MODE) (((MODE) == HAL_XSPI_INSTRUCTION_DTR_DISABLE) || \ argument
1074 ((MODE) == HAL_XSPI_INSTRUCTION_DTR_ENABLE))
1076 #define IS_XSPI_ADDRESS_MODE(MODE) (((MODE) == HAL_XSPI_ADDRESS_NONE) || \ argument
1077 ((MODE) == HAL_XSPI_ADDRESS_1_LINE) || \
1078 ((MODE) == HAL_XSPI_ADDRESS_2_LINES) || \
1079 ((MODE) == HAL_XSPI_ADDRESS_4_LINES) || \
1080 ((MODE) == HAL_XSPI_ADDRESS_8_LINES))
1087 #define IS_XSPI_ADDRESS_DTR_MODE(MODE) (((MODE) == HAL_XSPI_ADDRESS_DTR_DISABLE) || \ argument
1088 ((MODE) == HAL_XSPI_ADDRESS_DTR_ENABLE))
1090 #define IS_XSPI_ALT_BYTES_MODE(MODE) (((MODE) == HAL_XSPI_ALT_BYTES_NONE) || \ argument
1091 ((MODE) == HAL_XSPI_ALT_BYTES_1_LINE) || \
1092 ((MODE) == HAL_XSPI_ALT_BYTES_2_LINES) || \
1093 ((MODE) == HAL_XSPI_ALT_BYTES_4_LINES) || \
1094 ((MODE) == HAL_XSPI_ALT_BYTES_8_LINES))
1101 #define IS_XSPI_ALT_BYTES_DTR_MODE(MODE) (((MODE) == HAL_XSPI_ALT_BYTES_DTR_DISABLE) || \ argument
1102 ((MODE) == HAL_XSPI_ALT_BYTES_DTR_ENABLE))
1104 #define IS_XSPI_DATA_MODE(MODE) (((MODE) == HAL_XSPI_DATA_NONE) || \ argument
1105 ((MODE) == HAL_XSPI_DATA_1_LINE) || \
1106 ((MODE) == HAL_XSPI_DATA_2_LINES) || \
1107 ((MODE) == HAL_XSPI_DATA_4_LINES) || \
1108 ((MODE) == HAL_XSPI_DATA_8_LINES))
1112 #define IS_XSPI_DATA_DTR_MODE(MODE) (((MODE) == HAL_XSPI_DATA_DTR_DISABLE) || \ argument
1113 ((MODE) == HAL_XSPI_DATA_DTR_ENABLE))
1117 #define IS_XSPI_DQS_MODE(MODE) (((MODE) == HAL_XSPI_DQS_DISABLE) || \ argument
1118 ((MODE) == HAL_XSPI_DQS_ENABLE))
1120 #define IS_XSPI_SIOO_MODE(MODE) (((MODE) == HAL_XSPI_SIOO_INST_EVERY_CMD) || \ argument
1121 ((MODE) == HAL_XSPI_SIOO_INST_ONLY_FIRST_CMD))
1127 #define IS_XSPI_WRITE_ZERO_LATENCY(MODE) (((MODE) == HAL_XSPI_LATENCY_ON_WRITE) || \ argument
1128 ((MODE) == HAL_XSPI_NO_LATENCY_ON_WRITE))
1130 #define IS_XSPI_LATENCY_MODE(MODE) (((MODE) == HAL_XSPI_VARIABLE_LATENCY) || \ argument
1131 ((MODE) == HAL_XSPI_FIXED_LATENCY))
1136 #define IS_XSPI_MATCH_MODE(MODE) (((MODE) == HAL_XSPI_MATCH_MODE_AND) || \ argument
1137 ((MODE) == HAL_XSPI_MATCH_MODE_OR))
1139 #define IS_XSPI_AUTOMATIC_STOP(MODE) (((MODE) == HAL_XSPI_AUTOMATIC_STOP_ENABLE) || \ argument
1140 ((MODE) == HAL_XSPI_AUTOMATIC_STOP_DISABLE))
1146 #define IS_XSPI_TIMEOUT_ACTIVATION(MODE) (((MODE) == HAL_XSPI_TIMEOUT_COUNTER_DISABLE) || \ argument
1147 ((MODE) == HAL_XSPI_TIMEOUT_COUNTER_ENABLE))