Lines Matching refs:APB1LLPENR
3696 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_TIM2LPEN)
3698 #define __HAL_RCC_TIM3_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_TIM3LPEN)
3701 #define __HAL_RCC_TIM4_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_TIM4LPEN)
3705 #define __HAL_RCC_TIM5_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_TIM5LPEN)
3708 #define __HAL_RCC_TIM6_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_TIM6LPEN)
3710 #define __HAL_RCC_TIM7_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_TIM7LPEN)
3713 #define __HAL_RCC_TIM12_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_TIM12LPEN)
3717 #define __HAL_RCC_TIM13_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_TIM13LPEN)
3721 #define __HAL_RCC_TIM14_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_TIM14LPEN)
3724 #define __HAL_RCC_WWDG_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_WWDGLPEN)
3727 #define __HAL_RCC_OPAMP_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_OPAMPLPEN)
3730 #define __HAL_RCC_SPI2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_SPI2LPEN)
3732 #define __HAL_RCC_SPI3_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_SPI3LPEN)
3735 #define __HAL_RCC_COMP_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_COMPLPEN)
3738 #define __HAL_RCC_USART2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_USART2LPEN)
3740 #define __HAL_RCC_USART3_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_USART3LPEN)
3743 #define __HAL_RCC_UART4_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_UART4LPEN)
3747 #define __HAL_RCC_UART5_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_UART5LPEN)
3750 #define __HAL_RCC_I2C1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_I2C1LPEN)
3752 #define __HAL_RCC_I2C2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_I2C2LPEN)
3754 #define __HAL_RCC_I3C1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_I3C1LPEN)
3756 #define __HAL_RCC_CRS_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_CRSLPEN)
3759 #define __HAL_RCC_USART6_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_USART6LPEN)
3763 #define __HAL_RCC_USART10_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_USART10LPE…
3767 #define __HAL_RCC_USART11_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_USART11LPE…
3771 #define __HAL_RCC_CEC_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_CECLPEN)
3775 #define __HAL_RCC_UART7_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_UART7LPEN)
3779 #define __HAL_RCC_UART8_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_UART8LPEN)
3801 #define __HAL_RCC_TIM2_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_TIM2LPEN)
3803 #define __HAL_RCC_TIM3_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_TIM3LPEN)
3806 #define __HAL_RCC_TIM4_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_TIM4LPEN)
3810 #define __HAL_RCC_TIM5_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_TIM5LPEN)
3813 #define __HAL_RCC_TIM6_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_TIM6LPEN)
3815 #define __HAL_RCC_TIM7_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_TIM7LPEN)
3818 #define __HAL_RCC_TIM12_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_TIM12LPE…
3822 #define __HAL_RCC_TIM13_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_TIM13LPE…
3826 #define __HAL_RCC_TIM14_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_TIM14LPE…
3829 #define __HAL_RCC_WWDG_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_WWDGLPEN)
3832 #define __HAL_RCC_OPAMP_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_OPAMPLPE…
3835 #define __HAL_RCC_SPI2_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_SPI2LPEN)
3837 #define __HAL_RCC_SPI3_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_SPI3LPEN)
3840 #define __HAL_RCC_COMP_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_COMPLPEN)
3843 #define __HAL_RCC_USART2_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_USART2LP…
3845 #define __HAL_RCC_USART3_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_USART3LP…
3848 #define __HAL_RCC_UART4_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_UART4LPE…
3852 #define __HAL_RCC_UART5_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_UART5LPE…
3855 #define __HAL_RCC_I2C1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_I2C1LPEN)
3857 #define __HAL_RCC_I2C2_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_I2C2LPEN)
3859 #define __HAL_RCC_I3C1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_I3C1LPEN)
3861 #define __HAL_RCC_CRS_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_CRSLPEN)
3864 #define __HAL_RCC_USART6_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_USART6LP…
3868 #define __HAL_RCC_USART10_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_USART10L…
3872 #define __HAL_RCC_USART11_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_USART11L…
3876 #define __HAL_RCC_CEC_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_CECLPEN)
3880 #define __HAL_RCC_UART7_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_UART7LPE…
3884 #define __HAL_RCC_UART8_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_UART8LPE…