111 static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32…
113 static void DMA_CalcDMAMUXChannelBaseAndMask(DMA_HandleTypeDef *hdma);
114 static void DMA_CalcDMAMUXRequestGenBaseAndMask(DMA_HandleTypeDef *hdma);
152 HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)  in HAL_DMA_Init()  argument
157   if (hdma == NULL)  in HAL_DMA_Init()
163   assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));  in HAL_DMA_Init()
164   assert_param(IS_DMA_DIRECTION(hdma->Init.Direction));  in HAL_DMA_Init()
165   assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc));  in HAL_DMA_Init()
166   assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc));  in HAL_DMA_Init()
167   assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment));  in HAL_DMA_Init()
168   assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment));  in HAL_DMA_Init()
169   assert_param(IS_DMA_MODE(hdma->Init.Mode));  in HAL_DMA_Init()
170   assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));  in HAL_DMA_Init()
172   assert_param(IS_DMA_ALL_REQUEST(hdma->Init.Request));  in HAL_DMA_Init()
175   if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1))  in HAL_DMA_Init()
178 …hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Chann…  in HAL_DMA_Init()
179     hdma->DmaBaseAddress = DMA1;  in HAL_DMA_Init()
184 …hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Chann…  in HAL_DMA_Init()
185     hdma->DmaBaseAddress = DMA2;  in HAL_DMA_Init()
189   hdma->State = HAL_DMA_STATE_BUSY;  in HAL_DMA_Init()
192   tmp = hdma->Instance->CCR;  in HAL_DMA_Init()
200   tmp |=  hdma->Init.Direction        |  in HAL_DMA_Init()
201           hdma->Init.PeriphInc           | hdma->Init.MemInc           |  in HAL_DMA_Init()
202           hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |  in HAL_DMA_Init()
203           hdma->Init.Mode                | hdma->Init.Priority;  in HAL_DMA_Init()
206   hdma->Instance->CCR = tmp;  in HAL_DMA_Init()
211   DMA_CalcDMAMUXChannelBaseAndMask(hdma);  in HAL_DMA_Init()
213   if (hdma->Init.Direction == DMA_MEMORY_TO_MEMORY)  in HAL_DMA_Init()
216     hdma->Init.Request = DMA_REQUEST_MEM2MEM;  in HAL_DMA_Init()
220   hdma->DMAmuxChannel->CCR = (hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID);  in HAL_DMA_Init()
223   hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;  in HAL_DMA_Init()
225   if (((hdma->Init.Request >  0U) && (hdma->Init.Request <= DMA_REQUEST_GENERATOR3)))  in HAL_DMA_Init()
230     DMA_CalcDMAMUXRequestGenBaseAndMask(hdma);  in HAL_DMA_Init()
233     hdma->DMAmuxRequestGen->RGCR = 0U;  in HAL_DMA_Init()
236     hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;  in HAL_DMA_Init()
240     hdma->DMAmuxRequestGen = 0U;  in HAL_DMA_Init()
241     hdma->DMAmuxRequestGenStatus = 0U;  in HAL_DMA_Init()
242     hdma->DMAmuxRequestGenStatusMask = 0U;  in HAL_DMA_Init()
246   hdma->ErrorCode = HAL_DMA_ERROR_NONE;  in HAL_DMA_Init()
249   hdma->State  = HAL_DMA_STATE_READY;  in HAL_DMA_Init()
252   hdma->Lock = HAL_UNLOCKED;  in HAL_DMA_Init()
263 HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)  in HAL_DMA_DeInit()  argument
267   if (NULL == hdma)  in HAL_DMA_DeInit()
273   assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));  in HAL_DMA_DeInit()
276   __HAL_DMA_DISABLE(hdma);  in HAL_DMA_DeInit()
279   if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1))  in HAL_DMA_DeInit()
282 …hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Chann…  in HAL_DMA_DeInit()
283     hdma->DmaBaseAddress = DMA1;  in HAL_DMA_DeInit()
288 …hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Chann…  in HAL_DMA_DeInit()
289     hdma->DmaBaseAddress = DMA2;  in HAL_DMA_DeInit()
293   hdma->Instance->CCR  = 0;  in HAL_DMA_DeInit()
296   hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1FU));  in HAL_DMA_DeInit()
301   DMA_CalcDMAMUXChannelBaseAndMask(hdma);  in HAL_DMA_DeInit()
304   hdma->DMAmuxChannel->CCR = 0;  in HAL_DMA_DeInit()
307   hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;  in HAL_DMA_DeInit()
310   if (((hdma->Init.Request >  0U) && (hdma->Init.Request <= DMA_REQUEST_GENERATOR3)))  in HAL_DMA_DeInit()
315     DMA_CalcDMAMUXRequestGenBaseAndMask(hdma);  in HAL_DMA_DeInit()
318     hdma->DMAmuxRequestGen->RGCR = 0U;  in HAL_DMA_DeInit()
321     hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;  in HAL_DMA_DeInit()
324   hdma->DMAmuxRequestGen = 0U;  in HAL_DMA_DeInit()
325   hdma->DMAmuxRequestGenStatus = 0U;  in HAL_DMA_DeInit()
326   hdma->DMAmuxRequestGenStatusMask = 0U;  in HAL_DMA_DeInit()
329   hdma->XferCpltCallback = NULL;  in HAL_DMA_DeInit()
330   hdma->XferHalfCpltCallback = NULL;  in HAL_DMA_DeInit()
331   hdma->XferErrorCallback = NULL;  in HAL_DMA_DeInit()
332   hdma->XferAbortCallback = NULL;  in HAL_DMA_DeInit()
335   hdma->ErrorCode = HAL_DMA_ERROR_NONE;  in HAL_DMA_DeInit()
338   hdma->State = HAL_DMA_STATE_RESET;  in HAL_DMA_DeInit()
341   __HAL_UNLOCK(hdma);  in HAL_DMA_DeInit()
378 HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, …  in HAL_DMA_Start()  argument
386   __HAL_LOCK(hdma);  in HAL_DMA_Start()
388   if (HAL_DMA_STATE_READY == hdma->State)  in HAL_DMA_Start()
391     hdma->State = HAL_DMA_STATE_BUSY;  in HAL_DMA_Start()
392     hdma->ErrorCode = HAL_DMA_ERROR_NONE;  in HAL_DMA_Start()
395     __HAL_DMA_DISABLE(hdma);  in HAL_DMA_Start()
398     DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);  in HAL_DMA_Start()
401     __HAL_DMA_ENABLE(hdma);  in HAL_DMA_Start()
406     __HAL_UNLOCK(hdma);  in HAL_DMA_Start()
421 HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddres…  in HAL_DMA_Start_IT()  argument
430   __HAL_LOCK(hdma);  in HAL_DMA_Start_IT()
432   if (HAL_DMA_STATE_READY == hdma->State)  in HAL_DMA_Start_IT()
435     hdma->State = HAL_DMA_STATE_BUSY;  in HAL_DMA_Start_IT()
436     hdma->ErrorCode = HAL_DMA_ERROR_NONE;  in HAL_DMA_Start_IT()
439     __HAL_DMA_DISABLE(hdma);  in HAL_DMA_Start_IT()
442     DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);  in HAL_DMA_Start_IT()
446     if (NULL != hdma->XferHalfCpltCallback)  in HAL_DMA_Start_IT()
449       __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));  in HAL_DMA_Start_IT()
453       __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);  in HAL_DMA_Start_IT()
454       __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE));  in HAL_DMA_Start_IT()
458     if ((hdma->DMAmuxChannel->CCR & DMAMUX_CxCR_SE) != 0U)  in HAL_DMA_Start_IT()
461       hdma->DMAmuxChannel->CCR |= DMAMUX_CxCR_SOIE;  in HAL_DMA_Start_IT()
464     if (hdma->DMAmuxRequestGen != 0U)  in HAL_DMA_Start_IT()
468       hdma->DMAmuxRequestGen->RGCR |= DMAMUX_RGxCR_OIE;  in HAL_DMA_Start_IT()
472     __HAL_DMA_ENABLE(hdma);  in HAL_DMA_Start_IT()
477     __HAL_UNLOCK(hdma);  in HAL_DMA_Start_IT()
491 HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)  in HAL_DMA_Abort()  argument
495   if(hdma->State != HAL_DMA_STATE_BUSY)  in HAL_DMA_Abort()
498     hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;  in HAL_DMA_Abort()
505      __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));  in HAL_DMA_Abort()
508      hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE;  in HAL_DMA_Abort()
511      __HAL_DMA_DISABLE(hdma);  in HAL_DMA_Abort()
514      hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1FU));  in HAL_DMA_Abort()
517      hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;  in HAL_DMA_Abort()
519      if (hdma->DMAmuxRequestGen != 0U)  in HAL_DMA_Abort()
523        hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE;  in HAL_DMA_Abort()
526        hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;  in HAL_DMA_Abort()
530   hdma->State = HAL_DMA_STATE_READY;  in HAL_DMA_Abort()
533   __HAL_UNLOCK(hdma);  in HAL_DMA_Abort()
544 HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)  in HAL_DMA_Abort_IT()  argument
548   if (HAL_DMA_STATE_BUSY != hdma->State)  in HAL_DMA_Abort_IT()
551     hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;  in HAL_DMA_Abort_IT()
554     hdma->State = HAL_DMA_STATE_READY;  in HAL_DMA_Abort_IT()
557     __HAL_UNLOCK(hdma);  in HAL_DMA_Abort_IT()
564     __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));  in HAL_DMA_Abort_IT()
567     __HAL_DMA_DISABLE(hdma);  in HAL_DMA_Abort_IT()
570     hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE;  in HAL_DMA_Abort_IT()
573     hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1FU));  in HAL_DMA_Abort_IT()
576     hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;  in HAL_DMA_Abort_IT()
578     if (hdma->DMAmuxRequestGen != 0U)  in HAL_DMA_Abort_IT()
582       hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE;  in HAL_DMA_Abort_IT()
585       hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;  in HAL_DMA_Abort_IT()
589     hdma->State = HAL_DMA_STATE_READY;  in HAL_DMA_Abort_IT()
592     __HAL_UNLOCK(hdma);  in HAL_DMA_Abort_IT()
595     if (hdma->XferAbortCallback != NULL)  in HAL_DMA_Abort_IT()
597       hdma->XferAbortCallback(hdma);  in HAL_DMA_Abort_IT()
611 HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_LevelCompleteTypeDef Com…  in HAL_DMA_PollForTransfer()  argument
617   if (HAL_DMA_STATE_BUSY != hdma->State)  in HAL_DMA_PollForTransfer()
620     hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;  in HAL_DMA_PollForTransfer()
621     __HAL_UNLOCK(hdma);  in HAL_DMA_PollForTransfer()
626   if (0U != (hdma->Instance->CCR & DMA_CCR_CIRC))  in HAL_DMA_PollForTransfer()
628     hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED;  in HAL_DMA_PollForTransfer()
637     temp = (uint32_t)DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1FU);  in HAL_DMA_PollForTransfer()
642     temp = (uint32_t)DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1FU);  in HAL_DMA_PollForTransfer()
648   while (0U == (hdma->DmaBaseAddress->ISR & temp))  in HAL_DMA_PollForTransfer()
650 …if ((0U != (hdma->DmaBaseAddress->ISR & ((uint32_t)DMA_FLAG_TE1 << (hdma->ChannelIndex & 0x1FU)))))  in HAL_DMA_PollForTransfer()
655       hdma->DmaBaseAddress->IFCR = ((uint32_t)DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1FU));  in HAL_DMA_PollForTransfer()
658       hdma->ErrorCode = HAL_DMA_ERROR_TE;  in HAL_DMA_PollForTransfer()
661       hdma->State = HAL_DMA_STATE_READY;  in HAL_DMA_PollForTransfer()
664       __HAL_UNLOCK(hdma);  in HAL_DMA_PollForTransfer()
674         hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;  in HAL_DMA_PollForTransfer()
677         hdma->State = HAL_DMA_STATE_READY;  in HAL_DMA_PollForTransfer()
680         __HAL_UNLOCK(hdma);  in HAL_DMA_PollForTransfer()
688   if (hdma->DMAmuxRequestGen != 0U)  in HAL_DMA_PollForTransfer()
691     if ((hdma->DMAmuxRequestGenStatus->RGSR & hdma->DMAmuxRequestGenStatusMask) != 0U)  in HAL_DMA_PollForTransfer()
694       hdma->DMAmuxRequestGen->RGCR |= DMAMUX_RGxCR_OIE;  in HAL_DMA_PollForTransfer()
697       hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;  in HAL_DMA_PollForTransfer()
700       hdma->ErrorCode |= HAL_DMA_ERROR_REQGEN;  in HAL_DMA_PollForTransfer()
705   if ((hdma->DMAmuxChannelStatus->CSR & hdma->DMAmuxChannelStatusMask) != 0U)  in HAL_DMA_PollForTransfer()
708     hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;  in HAL_DMA_PollForTransfer()
711     hdma->ErrorCode |= HAL_DMA_ERROR_SYNC;  in HAL_DMA_PollForTransfer()
717     hdma->DmaBaseAddress->IFCR = ((uint32_t)DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1FU));  in HAL_DMA_PollForTransfer()
721     hdma->State = HAL_DMA_STATE_READY;  in HAL_DMA_PollForTransfer()
726     hdma->DmaBaseAddress->IFCR = ((uint32_t)DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1FU));  in HAL_DMA_PollForTransfer()
730   __HAL_UNLOCK(hdma);  in HAL_DMA_PollForTransfer()
741 void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)  in HAL_DMA_IRQHandler()  argument
743   uint32_t flag_it = hdma->DmaBaseAddress->ISR;  in HAL_DMA_IRQHandler()
744   uint32_t source_it = hdma->Instance->CCR;  in HAL_DMA_IRQHandler()
747 …if ((0U != (flag_it & ((uint32_t)DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1FU)))) && (0U != (source…  in HAL_DMA_IRQHandler()
750     if ((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)  in HAL_DMA_IRQHandler()
753       __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);  in HAL_DMA_IRQHandler()
756     hdma->DmaBaseAddress->IFCR = ((uint32_t)DMA_ISR_HTIF1 << (hdma->ChannelIndex & 0x1FU));  in HAL_DMA_IRQHandler()
761     if (hdma->XferHalfCpltCallback != NULL)  in HAL_DMA_IRQHandler()
764       hdma->XferHalfCpltCallback(hdma);  in HAL_DMA_IRQHandler()
768   else if ((0U != (flag_it & ((uint32_t)DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1FU))))  in HAL_DMA_IRQHandler()
771     if ((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)  in HAL_DMA_IRQHandler()
774       __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC);  in HAL_DMA_IRQHandler()
777       hdma->State = HAL_DMA_STATE_READY;  in HAL_DMA_IRQHandler()
780     hdma->DmaBaseAddress->IFCR = ((uint32_t)DMA_ISR_TCIF1 << (hdma->ChannelIndex & 0x1FU));  in HAL_DMA_IRQHandler()
783     __HAL_UNLOCK(hdma);  in HAL_DMA_IRQHandler()
785     if (hdma->XferCpltCallback != NULL)  in HAL_DMA_IRQHandler()
788       hdma->XferCpltCallback(hdma);  in HAL_DMA_IRQHandler()
792   else if ((0U != (flag_it & ((uint32_t)DMA_FLAG_TE1 << (hdma->ChannelIndex & 0x1FU))))  in HAL_DMA_IRQHandler()
798     __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));  in HAL_DMA_IRQHandler()
801     hdma->DmaBaseAddress->IFCR = ((uint32_t)DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1FU));  in HAL_DMA_IRQHandler()
804     hdma->ErrorCode = HAL_DMA_ERROR_TE;  in HAL_DMA_IRQHandler()
807     hdma->State = HAL_DMA_STATE_READY;  in HAL_DMA_IRQHandler()
810     __HAL_UNLOCK(hdma);  in HAL_DMA_IRQHandler()
812     if (hdma->XferErrorCallback != NULL)  in HAL_DMA_IRQHandler()
815       hdma->XferErrorCallback(hdma);  in HAL_DMA_IRQHandler()
835 HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef Callb…  in HAL_DMA_RegisterCallback()  argument
840   __HAL_LOCK(hdma);  in HAL_DMA_RegisterCallback()
842   if (HAL_DMA_STATE_READY == hdma->State)  in HAL_DMA_RegisterCallback()
847         hdma->XferCpltCallback = pCallback;  in HAL_DMA_RegisterCallback()
851         hdma->XferHalfCpltCallback = pCallback;  in HAL_DMA_RegisterCallback()
855         hdma->XferErrorCallback = pCallback;  in HAL_DMA_RegisterCallback()
859         hdma->XferAbortCallback = pCallback;  in HAL_DMA_RegisterCallback()
873   __HAL_UNLOCK(hdma);  in HAL_DMA_RegisterCallback()
886 HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef Cal…  in HAL_DMA_UnRegisterCallback()  argument
891   __HAL_LOCK(hdma);  in HAL_DMA_UnRegisterCallback()
893   if (HAL_DMA_STATE_READY == hdma->State)  in HAL_DMA_UnRegisterCallback()
898         hdma->XferCpltCallback = NULL;  in HAL_DMA_UnRegisterCallback()
902         hdma->XferHalfCpltCallback = NULL;  in HAL_DMA_UnRegisterCallback()
906         hdma->XferErrorCallback = NULL;  in HAL_DMA_UnRegisterCallback()
910         hdma->XferAbortCallback = NULL;  in HAL_DMA_UnRegisterCallback()
914         hdma->XferCpltCallback = NULL;  in HAL_DMA_UnRegisterCallback()
915         hdma->XferHalfCpltCallback = NULL;  in HAL_DMA_UnRegisterCallback()
916         hdma->XferErrorCallback = NULL;  in HAL_DMA_UnRegisterCallback()
917         hdma->XferAbortCallback = NULL;  in HAL_DMA_UnRegisterCallback()
931   __HAL_UNLOCK(hdma);  in HAL_DMA_UnRegisterCallback()
964 HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma)  in HAL_DMA_GetState()  argument
967   return hdma->State;  in HAL_DMA_GetState()
976 uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma)  in HAL_DMA_GetError()  argument
978   return hdma->ErrorCode;  in HAL_DMA_GetError()
1002 static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32…  in DMA_SetConfig()  argument
1005   hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;  in DMA_SetConfig()
1007   if (hdma->DMAmuxRequestGen != 0U)  in DMA_SetConfig()
1010     hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;  in DMA_SetConfig()
1014   hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1FU));  in DMA_SetConfig()
1017   hdma->Instance->CNDTR = DataLength;  in DMA_SetConfig()
1020   if ((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)  in DMA_SetConfig()
1023     hdma->Instance->CPAR = DstAddress;  in DMA_SetConfig()
1026     hdma->Instance->CMAR = SrcAddress;  in DMA_SetConfig()
1032     hdma->Instance->CPAR = SrcAddress;  in DMA_SetConfig()
1035     hdma->Instance->CMAR = DstAddress;  in DMA_SetConfig()
1045 static void DMA_CalcDMAMUXChannelBaseAndMask(DMA_HandleTypeDef *hdma)  in DMA_CalcDMAMUXChannelBaseAndMask()  argument
1052   if ((uint32_t)hdma->Instance < (uint32_t)DMA2_Channel1)  in DMA_CalcDMAMUXChannelBaseAndMask()
1069   channel_number = (((uint32_t)hdma->Instance & 0xFFU) - 8U) / 20U;  in DMA_CalcDMAMUXChannelBaseAndMask()
1070 …hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)(uint32_t)(dmamux_base_addr + ((hdma->ChannelIndex…  in DMA_CalcDMAMUXChannelBaseAndMask()
1071   hdma->DMAmuxChannelStatus = DMAMUX1_ChannelStatus;  in DMA_CalcDMAMUXChannelBaseAndMask()
1072   hdma->DMAmuxChannelStatusMask = 1UL << (channel_number & 0x1FU);  in DMA_CalcDMAMUXChannelBaseAndMask()
1082 static void DMA_CalcDMAMUXRequestGenBaseAndMask(DMA_HandleTypeDef *hdma)  in DMA_CalcDMAMUXRequestGenBaseAndMask()  argument
1084   uint32_t request =  hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID;  in DMA_CalcDMAMUXRequestGenBaseAndMask()
1087 …hdma->DMAmuxRequestGen = (DMAMUX_RequestGen_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_RequestGenera…  in DMA_CalcDMAMUXRequestGenBaseAndMask()
1089   hdma->DMAmuxRequestGenStatus = DMAMUX1_RequestGenStatus;  in DMA_CalcDMAMUXRequestGenBaseAndMask()
1091   hdma->DMAmuxRequestGenStatusMask = 1UL << ((request - 1U) & 0x1FU);  in DMA_CalcDMAMUXRequestGenBaseAndMask()