524   uint32_t tmpccmr1;  in LL_TIM_ENCODER_Init()  local
543   tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);  in LL_TIM_ENCODER_Init()
549   tmpccmr1 &= (uint32_t)~(TIM_CCMR1_CC1S | TIM_CCMR1_IC1F  | TIM_CCMR1_IC1PSC);  in LL_TIM_ENCODER_Init()
550   tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1ActiveInput >> 16U);  in LL_TIM_ENCODER_Init()
551   tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1Filter >> 16U);  in LL_TIM_ENCODER_Init()
552   tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1Prescaler >> 16U);  in LL_TIM_ENCODER_Init()
555   tmpccmr1 &= (uint32_t)~(TIM_CCMR1_CC2S | TIM_CCMR1_IC2F  | TIM_CCMR1_IC2PSC);  in LL_TIM_ENCODER_Init()
556   tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2ActiveInput >> 8U);  in LL_TIM_ENCODER_Init()
557   tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2Filter >> 8U);  in LL_TIM_ENCODER_Init()
558   tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2Prescaler >> 8U);  in LL_TIM_ENCODER_Init()
570   LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);  in LL_TIM_ENCODER_Init()
618   uint32_t tmpccmr1;  in LL_TIM_HALLSENSOR_Init()  local
635   tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);  in LL_TIM_HALLSENSOR_Init()
655   tmpccmr1 &= (uint32_t)~(TIM_CCMR1_CC1S | TIM_CCMR1_IC1F  | TIM_CCMR1_IC1PSC);  in LL_TIM_HALLSENSOR_Init()
656   tmpccmr1 |= (uint32_t)(LL_TIM_ACTIVEINPUT_TRC >> 16U);  in LL_TIM_HALLSENSOR_Init()
657   tmpccmr1 |= (uint32_t)(TIM_HallSensorInitStruct->IC1Filter >> 16U);  in LL_TIM_HALLSENSOR_Init()
658   tmpccmr1 |= (uint32_t)(TIM_HallSensorInitStruct->IC1Prescaler >> 16U);  in LL_TIM_HALLSENSOR_Init()
661   tmpccmr1 &= (uint32_t)~(TIM_CCMR1_OC2M | TIM_CCMR1_OC2FE  | TIM_CCMR1_OC2PE  | TIM_CCMR1_OC2CE);  in LL_TIM_HALLSENSOR_Init()
662   tmpccmr1 |= (uint32_t)(LL_TIM_OCMODE_PWM2 << 8U);  in LL_TIM_HALLSENSOR_Init()
676   LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);  in LL_TIM_HALLSENSOR_Init()
799   uint32_t tmpccmr1;  in OC1Config()  local
819   tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);  in OC1Config()
822   CLEAR_BIT(tmpccmr1, TIM_CCMR1_CC1S);  in OC1Config()
825   MODIFY_REG(tmpccmr1, TIM_CCMR1_OC1M, TIM_OCInitStruct->OCMode);  in OC1Config()
857   LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);  in OC1Config()
878   uint32_t tmpccmr1;  in OC2Config()  local
898   tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);  in OC2Config()
901   CLEAR_BIT(tmpccmr1, TIM_CCMR1_CC2S);  in OC2Config()
904   MODIFY_REG(tmpccmr1, TIM_CCMR1_OC2M, TIM_OCInitStruct->OCMode << 8U);  in OC2Config()
936   LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);  in OC2Config()