Lines Matching full:with
14 * If no LICENSE file comes with this software, it is provided AS-IS.
72 … compatibility with some ADC on other STM32 series
76 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
84 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
106 ADC_CHANNEL_ID_NUMBER_MASK with reduced range: on this STM32 series, ADC group regular sequencer,
107 if set to mode "fully configurable", can contain channels with a restricted channel number.
254 … | ADC_CR_ADSTART | ADC_CR_ADSTP) /* ADC register CR bits with
265 with which VrefInt has been calibrated in production
281 … with which temperature sensor has been calibrated in production
346 * (setting possible with ADC enabled without conversion on going,
347 * ADC enabled with conversion on going, ...)
348 * Each feature can be updated afterwards with a unitary function
349 * and potentially with ADC in a different state than disabled,
358 … ADC clock synchronous (from PCLK) with prescaler 1 must be enabled
388 * (functions with prefix "REG").
395 * (setting possible with ADC enabled without conversion on going,
396 * ADC enabled with conversion on going, ...)
397 * Each feature can be updated afterwards with a unitary function
398 * and potentially with ADC in a different state than disabled,
409 … with some ADC on other STM32 series having this setting set by HW
469 * @brief Flags defines which can be used with LL_ADC_ReadReg function
489 * @brief IT defines which can be used with LL_ADC_ReadReg and LL_ADC_WriteReg functions
509 /** @defgroup ADC_LL_EC_REGISTERS ADC registers compliant with specific purpose
512 /* List of ADC registers intended to be used (most commonly) with */
516 … (corresponding to register DR) to be used with ADC configured in independent
529 …DC_CLOCK_ASYNC_DIV2 (ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with
533 …DC_CLOCK_ASYNC_DIV4 (ADC_CCR_PRESC_1) /*!< ADC asynchronous clock with
537 …DC_CLOCK_ASYNC_DIV6 (ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with
541 …DC_CLOCK_ASYNC_DIV8 (ADC_CCR_PRESC_2) /*!< ADC asynchronous clock with
545 …DC_CLOCK_ASYNC_DIV10 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with
549 …DC_CLOCK_ASYNC_DIV12 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_1) /*!< ADC asynchronous clock with
554 … | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with
558 …DC_CLOCK_ASYNC_DIV32 (ADC_CCR_PRESC_3) /*!< ADC asynchronous clock with
562 …DC_CLOCK_ASYNC_DIV64 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with
566 …DC_CLOCK_ASYNC_DIV128 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_1) /*!< ADC asynchronous clock with
571 … | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with
652 … See description with function @ref LL_ADC_SetLowPowerMode(). */
655 … when a new ADC conversion is triggered (with startup time between trigger
656 and start of sampling). See description with function
659 and auto power-off combined. See description with function @ref LL_ADC_SetLowPowerMode(). */
834 … This ADC mode is intended to be used with DMA mode non-circular. */
838 … This ADC mode is intended to be used with DMA mode circular. */
874 with 2 ranks in the sequence */
876 with 3 ranks in the sequence */
878 with 4 ranks in the sequence */
880 with 5 ranks in the sequence */
882 with 6 ranks in the sequence */
884 with 7 ranks in the sequence */
886 with 8 ranks in the sequence */
898 … (scan of all ranks, ADC conversion of ranks with channels enabled in
905 … (scan of all ranks, ADC conversion of ranks with channels enabled in
917 … discontinuous mode enable with sequence interruption every rank */
1070 … with other STM32 devices featuring ADC group injected, in this case other
1276 * number is returned, either defined with number
1277 * or with bitfield (only one bit must be set).
1369 * comparison with internal channel parameter to be done
1391 * number in ADC registers. The differentiation is made only with
1502 * number in ADC registers. The differentiation is made only with
1519 * define a single channel to monitor with analog watchdog
1521 * @note To be used with function @ref LL_ADC_SetAnalogWDMonitChannels().
1554 * comparison with internal channel parameter to be done
1591 * @note To be used with function @ref LL_ADC_ConfigAnalogWDThresholds()
1593 * Example, with a ADC resolution of 8 bits, to set the value of
1614 * @note To be used with function @ref LL_ADC_GetAnalogWDThresholds().
1615 * Example, with a ADC resolution of 8 bits, to get the value of
1635 * @note To be used with function @ref LL_ADC_GetAnalogWDThresholds().
1653 * - Multimode (for devices with several ADC instances)
1664 * @note This check is required by functions with setting conditioned to
1668 * @note On devices with only 1 ADC common instance, parameter of this macro
1670 * with devices featuring several ADC common instances).
1754 * On devices with small package, the pin Vref+ is not present
1788 * with TS_ADC_DATA = temperature sensor raw data measured by ADC
1851 * with TS_ADC_DATA = temperature sensor raw data measured by ADC
1858 * of the current device has characteristics in line with
1931 * intended to be used (most commonly) with DMA transfer.
1935 * @note This macro is intended to be used with LL DMA driver, refer to
1943 * @note For devices with several ADC: in multimode, some devices
1976 * This check can be done with function @ref LL_ADC_IsEnabled() for each
2096 * This check can be done with function @ref LL_ADC_IsEnabled() for each
2138 * This check can be done with function @ref LL_ADC_IsEnabled() for each
2168 * This check can be done with function @ref LL_ADC_IsEnabled() for each
2272 * or differential (for devices with differential mode available).
2294 * or differential (for devices with differential mode available).
2394 * - It is not recommended to use with interruption or DMA
2400 * - Do use with polling: 1. Start conversion,
2409 * (with startup time between trigger and start of sampling).
2410 * This feature can be combined with low power mode "auto wait".
2411 * @note With ADC low power mode "auto wait", the ADC conversion data read
2451 * - It is not recommended to use with interruption or DMA
2457 * - Do use with polling: 1. Start conversion,
2466 * (with startup time between trigger and start of sampling).
2467 * This feature can be combined with low power mode "auto wait".
2468 * @note With ADC low power mode "auto wait", the ADC conversion data read
2498 * @note Usage of ADC trigger frequency mode with ADC low power mode:
2628 * (default setting for compatibility with some ADC on other
2698 /* to match with triggers literals definition. */ in LL_ADC_REG_GetTriggerSource()
2821 * - For devices with sequencer fully configurable
2831 * - For devices with sequencer not fully configurable
2893 * - For devices with sequencer fully configurable
2903 * - For devices with sequencer not fully configurable
3129 /* Set bits with content of parameter "Channel" with bits position */ in LL_ADC_REG_SetSequencerRanks()
3131 /* Parameters "Rank" and "Channel" are used with masks because containing */ in LL_ADC_REG_SetSequencerRanks()
3152 * with parts of literals LL_ADC_CHANNEL_x or using
3157 * process the returned value with the helper macro
3205 * comparison with internal channel parameter to be done
3230 * This function can be used with setting "not fully configurable".
3304 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_REG_SetSequencerChannels()
3322 * This function can be used with setting "not fully configurable".
3396 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_REG_SetSequencerChAdd()
3414 * This function can be used with setting "not fully configurable".
3488 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_REG_SetSequencerChRem()
3504 * This function can be used with setting "not fully configurable".
3643 * This ADC mode is intended to be used with DMA mode non-circular.
3647 * This ADC mode is intended to be used with DMA mode circular.
3680 * This ADC mode is intended to be used with DMA mode non-circular.
3684 * This ADC mode is intended to be used with DMA mode circular.
3708 * @note Compatibility with devices without feature overrun:
3712 * Therefore, for compatibility with all devices, parameter
3828 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_SetChannelSamplingTime()
3926 * with analog watchdog from sequencer channel definition,
3990 /* Set bits with content of parameter "AWDChannelGroup" with bits position */ in LL_ADC_SetAnalogWDMonitChannels()
3992 /* Parameters "AWDChannelGroup" and "AWDy" are used with masks because */ in LL_ADC_SetAnalogWDMonitChannels()
4017 * with parts of literals LL_ADC_CHANNEL_x or using
4022 * process the returned value with the helper macro
4211 /* Set bits with content of parameter "AWDThresholdxxxValue" with bits */ in LL_ADC_ConfigAnalogWDThresholds()
4214 /* Parameters "AWDy" and "AWDThresholdxxxValue" are used with masks because */ in LL_ADC_ConfigAnalogWDThresholds()
4272 * ADC can be disabled, enabled with or without conversion on going
4294 /* Set bits with content of parameter "AWDThresholdValue" with bits */ in LL_ADC_SetAnalogWDThresholds()
4297 /* Parameters "AWDy" and "AWDThresholdValue" are used with masks because */ in LL_ADC_SetAnalogWDThresholds()
4312 * threshold low or raw data with ADC thresholds high and low
4314 * @note If raw data with ADC thresholds high and low is retrieved,
4341 /* Set bits with content of parameter "AWDThresholdValue" with bits */ in LL_ADC_GetAnalogWDThresholds()
4344 /* Parameters "AWDy" and "AWDThresholdValue" are used with masks because */ in LL_ADC_GetAnalogWDThresholds()
4546 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_EnableInternalRegulator()
4548 /* to not interfere with bits with HW property "rs". */ in LL_ADC_EnableInternalRegulator()
4597 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_Enable()
4599 /* to not interfere with bits with HW property "rs". */ in LL_ADC_Enable()
4617 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_Disable()
4619 /* to not interfere with bits with HW property "rs". */ in LL_ADC_Disable()
4652 * or differential (for devices with differential mode available).
4656 * @note In case of usage of ADC with DMA transfer:
4680 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_StartCalibration()
4682 /* to not interfere with bits with HW property "rs". */ in LL_ADC_StartCalibration()
4727 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_REG_StartConversion()
4729 /* to not interfere with bits with HW property "rs". */ in LL_ADC_REG_StartConversion()
4739 * ADC must be enabled (potentially with conversion on going on group regular),
4747 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_REG_StopConversion()
4749 /* to not interfere with bits with HW property "rs". */ in LL_ADC_REG_StopConversion()
4781 * with feature oversampling).
4794 * @note For devices with feature oversampling: Oversampling
4809 * @note For devices with feature oversampling: Oversampling
4824 * @note For devices with feature oversampling: Oversampling
4839 * @note For devices with feature oversampling: Oversampling