641   uint32_t tmpcr2;  in LL_TIM_HALLSENSOR_Init()  local
656   tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);  in LL_TIM_HALLSENSOR_Init()
668   tmpcr2 |= TIM_CR2_TI1S;  in LL_TIM_HALLSENSOR_Init()
671   tmpcr2 |= LL_TIM_TRGO_OC2REF;  in LL_TIM_HALLSENSOR_Init()
694   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in LL_TIM_HALLSENSOR_Init()
819   uint32_t tmpcr2;  in OC1Config()  local
834   tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);  in OC1Config()
865     MODIFY_REG(tmpcr2, TIM_CR2_OIS1, TIM_OCInitStruct->OCIdleState);  in OC1Config()
868     MODIFY_REG(tmpcr2, TIM_CR2_OIS1N, TIM_OCInitStruct->OCNIdleState << 1U);  in OC1Config()
872   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in OC1Config()
898   uint32_t tmpcr2;  in OC2Config()  local
913   tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);  in OC2Config()
944     MODIFY_REG(tmpcr2, TIM_CR2_OIS2, TIM_OCInitStruct->OCIdleState << 2U);  in OC2Config()
947     MODIFY_REG(tmpcr2, TIM_CR2_OIS2N, TIM_OCInitStruct->OCNIdleState << 3U);  in OC2Config()
951   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in OC2Config()
977   uint32_t tmpcr2;  in OC3Config()  local
992   tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);  in OC3Config()
1023     MODIFY_REG(tmpcr2, TIM_CR2_OIS3, TIM_OCInitStruct->OCIdleState << 4U);  in OC3Config()
1026     MODIFY_REG(tmpcr2, TIM_CR2_OIS3N, TIM_OCInitStruct->OCNIdleState << 5U);  in OC3Config()
1030   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in OC3Config()
1056   uint32_t tmpcr2;  in OC4Config()  local
1071   tmpcr2 =  LL_TIM_ReadReg(TIMx, CR2);  in OC4Config()
1093     MODIFY_REG(tmpcr2, TIM_CR2_OIS4, TIM_OCInitStruct->OCIdleState << 6U);  in OC4Config()
1097   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in OC4Config()