Lines Matching refs:heth
279 static void ETH_SetMACConfig(ETH_HandleTypeDef *heth, const ETH_MACConfigTypeDef *macconf);
280 static void ETH_SetDMAConfig(ETH_HandleTypeDef *heth, const ETH_DMAConfigTypeDef *dmaconf);
281 static void ETH_MACDMAConfig(ETH_HandleTypeDef *heth);
282 static void ETH_DMATxDescListInit(ETH_HandleTypeDef *heth);
283 static void ETH_DMARxDescListInit(ETH_HandleTypeDef *heth);
284 static uint32_t ETH_Prepare_Tx_Descriptors(ETH_HandleTypeDef *heth, const ETH_TxPacketConfigTypeDef…
286 static void ETH_UpdateDescriptor(ETH_HandleTypeDef *heth);
287 static void ETH_FlushTransmitFIFO(ETH_HandleTypeDef *heth);
288 static void ETH_MACAddressConfig(ETH_HandleTypeDef *heth, uint32_t MacAddr, uint8_t *Addr);
291 static void ETH_InitCallbacksToDefault(ETH_HandleTypeDef *heth);
336 HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth) in HAL_ETH_Init() argument
340 if (heth == NULL) in HAL_ETH_Init()
344 if (heth->gState == HAL_ETH_STATE_RESET) in HAL_ETH_Init()
346 heth->gState = HAL_ETH_STATE_BUSY; in HAL_ETH_Init()
350 ETH_InitCallbacksToDefault(heth); in HAL_ETH_Init()
352 if (heth->MspInitCallback == NULL) in HAL_ETH_Init()
354 heth->MspInitCallback = HAL_ETH_MspInit; in HAL_ETH_Init()
358 heth->MspInitCallback(heth); in HAL_ETH_Init()
361 HAL_ETH_MspInit(heth); in HAL_ETH_Init()
370 SYSCFG->PMC |= (uint32_t)heth->Init.MediaInterface; in HAL_ETH_Init()
377 SET_BIT(heth->Instance->DMABMR, ETH_DMABMR_SR); in HAL_ETH_Init()
383 while (READ_BIT(heth->Instance->DMABMR, ETH_DMABMR_SR) > 0U) in HAL_ETH_Init()
388 heth->ErrorCode = HAL_ETH_ERROR_TIMEOUT; in HAL_ETH_Init()
390 heth->gState = HAL_ETH_STATE_ERROR; in HAL_ETH_Init()
398 ETH_MACDMAConfig(heth); in HAL_ETH_Init()
402 ETH_DMATxDescListInit(heth); in HAL_ETH_Init()
405 ETH_DMARxDescListInit(heth); in HAL_ETH_Init()
408 ETH_MACAddressConfig(heth, ETH_MAC_ADDRESS0, heth->Init.MACAddr); in HAL_ETH_Init()
411 SET_BIT(heth->Instance->MACIMR, ETH_MACIMR_TSTIM | ETH_MACIMR_PMTIM); in HAL_ETH_Init()
414 SET_BIT(heth->Instance->MMCRIMR, ETH_MMCRIMR_RGUFM | ETH_MMCRIMR_RFAEM | \ in HAL_ETH_Init()
418 SET_BIT(heth->Instance->MMCTIMR, ETH_MMCTIMR_TGFM | ETH_MMCTIMR_TGFMSCM | \ in HAL_ETH_Init()
421 heth->ErrorCode = HAL_ETH_ERROR_NONE; in HAL_ETH_Init()
422 heth->gState = HAL_ETH_STATE_READY; in HAL_ETH_Init()
433 HAL_StatusTypeDef HAL_ETH_DeInit(ETH_HandleTypeDef *heth) in HAL_ETH_DeInit() argument
436 heth->gState = HAL_ETH_STATE_BUSY; in HAL_ETH_DeInit()
440 if (heth->MspDeInitCallback == NULL) in HAL_ETH_DeInit()
442 heth->MspDeInitCallback = HAL_ETH_MspDeInit; in HAL_ETH_DeInit()
445 heth->MspDeInitCallback(heth); in HAL_ETH_DeInit()
449 HAL_ETH_MspDeInit(heth); in HAL_ETH_DeInit()
454 heth->gState = HAL_ETH_STATE_RESET; in HAL_ETH_DeInit()
466 __weak void HAL_ETH_MspInit(ETH_HandleTypeDef *heth) in HAL_ETH_MspInit() argument
469 UNUSED(heth); in HAL_ETH_MspInit()
481 __weak void HAL_ETH_MspDeInit(ETH_HandleTypeDef *heth) in HAL_ETH_MspDeInit() argument
484 UNUSED(heth); in HAL_ETH_MspDeInit()
507 HAL_StatusTypeDef HAL_ETH_RegisterCallback(ETH_HandleTypeDef *heth, HAL_ETH_CallbackIDTypeDef Callb… in HAL_ETH_RegisterCallback() argument
515 heth->ErrorCode |= HAL_ETH_ERROR_INVALID_CALLBACK; in HAL_ETH_RegisterCallback()
519 if (heth->gState == HAL_ETH_STATE_READY) in HAL_ETH_RegisterCallback()
524 heth->TxCpltCallback = pCallback; in HAL_ETH_RegisterCallback()
528 heth->RxCpltCallback = pCallback; in HAL_ETH_RegisterCallback()
532 heth->ErrorCallback = pCallback; in HAL_ETH_RegisterCallback()
536 heth->PMTCallback = pCallback; in HAL_ETH_RegisterCallback()
541 heth->WakeUpCallback = pCallback; in HAL_ETH_RegisterCallback()
545 heth->MspInitCallback = pCallback; in HAL_ETH_RegisterCallback()
549 heth->MspDeInitCallback = pCallback; in HAL_ETH_RegisterCallback()
554 heth->ErrorCode |= HAL_ETH_ERROR_INVALID_CALLBACK; in HAL_ETH_RegisterCallback()
560 else if (heth->gState == HAL_ETH_STATE_RESET) in HAL_ETH_RegisterCallback()
565 heth->MspInitCallback = pCallback; in HAL_ETH_RegisterCallback()
569 heth->MspDeInitCallback = pCallback; in HAL_ETH_RegisterCallback()
574 heth->ErrorCode |= HAL_ETH_ERROR_INVALID_CALLBACK; in HAL_ETH_RegisterCallback()
583 heth->ErrorCode |= HAL_ETH_ERROR_INVALID_CALLBACK; in HAL_ETH_RegisterCallback()
606 HAL_StatusTypeDef HAL_ETH_UnRegisterCallback(ETH_HandleTypeDef *heth, HAL_ETH_CallbackIDTypeDef Cal… in HAL_ETH_UnRegisterCallback() argument
610 if (heth->gState == HAL_ETH_STATE_READY) in HAL_ETH_UnRegisterCallback()
615 heth->TxCpltCallback = HAL_ETH_TxCpltCallback; in HAL_ETH_UnRegisterCallback()
619 heth->RxCpltCallback = HAL_ETH_RxCpltCallback; in HAL_ETH_UnRegisterCallback()
623 heth->ErrorCallback = HAL_ETH_ErrorCallback; in HAL_ETH_UnRegisterCallback()
627 heth->PMTCallback = HAL_ETH_PMTCallback; in HAL_ETH_UnRegisterCallback()
632 heth->WakeUpCallback = HAL_ETH_WakeUpCallback; in HAL_ETH_UnRegisterCallback()
636 heth->MspInitCallback = HAL_ETH_MspInit; in HAL_ETH_UnRegisterCallback()
640 heth->MspDeInitCallback = HAL_ETH_MspDeInit; in HAL_ETH_UnRegisterCallback()
645 heth->ErrorCode |= HAL_ETH_ERROR_INVALID_CALLBACK; in HAL_ETH_UnRegisterCallback()
651 else if (heth->gState == HAL_ETH_STATE_RESET) in HAL_ETH_UnRegisterCallback()
656 heth->MspInitCallback = HAL_ETH_MspInit; in HAL_ETH_UnRegisterCallback()
660 heth->MspDeInitCallback = HAL_ETH_MspDeInit; in HAL_ETH_UnRegisterCallback()
665 heth->ErrorCode |= HAL_ETH_ERROR_INVALID_CALLBACK; in HAL_ETH_UnRegisterCallback()
674 heth->ErrorCode |= HAL_ETH_ERROR_INVALID_CALLBACK; in HAL_ETH_UnRegisterCallback()
708 HAL_StatusTypeDef HAL_ETH_Start(ETH_HandleTypeDef *heth) in HAL_ETH_Start() argument
712 if (heth->gState == HAL_ETH_STATE_READY) in HAL_ETH_Start()
714 heth->gState = HAL_ETH_STATE_BUSY; in HAL_ETH_Start()
717 heth->RxDescList.RxBuildDescCnt = ETH_RX_DESC_CNT; in HAL_ETH_Start()
720 ETH_UpdateDescriptor(heth); in HAL_ETH_Start()
723 SET_BIT(heth->Instance->MACCR, ETH_MACCR_TE); in HAL_ETH_Start()
727 tmpreg1 = (heth->Instance)->MACCR; in HAL_ETH_Start()
729 (heth->Instance)->MACCR = tmpreg1; in HAL_ETH_Start()
732 SET_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Start()
736 tmpreg1 = (heth->Instance)->MACCR; in HAL_ETH_Start()
738 (heth->Instance)->MACCR = tmpreg1; in HAL_ETH_Start()
741 ETH_FlushTransmitFIFO(heth); in HAL_ETH_Start()
744 SET_BIT(heth->Instance->DMAOMR, ETH_DMAOMR_ST); in HAL_ETH_Start()
747 SET_BIT(heth->Instance->DMAOMR, ETH_DMAOMR_SR); in HAL_ETH_Start()
749 heth->gState = HAL_ETH_STATE_STARTED; in HAL_ETH_Start()
765 HAL_StatusTypeDef HAL_ETH_Start_IT(ETH_HandleTypeDef *heth) in HAL_ETH_Start_IT() argument
769 if (heth->gState == HAL_ETH_STATE_READY) in HAL_ETH_Start_IT()
771 heth->gState = HAL_ETH_STATE_BUSY; in HAL_ETH_Start_IT()
774 heth->RxDescList.ItMode = 1U; in HAL_ETH_Start_IT()
777 heth->RxDescList.RxBuildDescCnt = ETH_RX_DESC_CNT; in HAL_ETH_Start_IT()
780 ETH_UpdateDescriptor(heth); in HAL_ETH_Start_IT()
784 tmpreg1 = (heth->Instance)->MACCR; in HAL_ETH_Start_IT()
786 (heth->Instance)->MACCR = tmpreg1; in HAL_ETH_Start_IT()
789 SET_BIT(heth->Instance->DMAOMR, ETH_DMAOMR_ST); in HAL_ETH_Start_IT()
792 SET_BIT(heth->Instance->DMAOMR, ETH_DMAOMR_SR); in HAL_ETH_Start_IT()
795 ETH_FlushTransmitFIFO(heth); in HAL_ETH_Start_IT()
799 SET_BIT(heth->Instance->MACCR, ETH_MACCR_TE); in HAL_ETH_Start_IT()
803 tmpreg1 = (heth->Instance)->MACCR; in HAL_ETH_Start_IT()
805 (heth->Instance)->MACCR = tmpreg1; in HAL_ETH_Start_IT()
808 SET_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Start_IT()
815 __HAL_ETH_DMA_ENABLE_IT(heth, (ETH_DMAIER_NISE | ETH_DMAIER_RIE | ETH_DMAIER_TIE | in HAL_ETH_Start_IT()
818 heth->gState = HAL_ETH_STATE_STARTED; in HAL_ETH_Start_IT()
833 HAL_StatusTypeDef HAL_ETH_Stop(ETH_HandleTypeDef *heth) in HAL_ETH_Stop() argument
837 if (heth->gState == HAL_ETH_STATE_STARTED) in HAL_ETH_Stop()
840 heth->gState = HAL_ETH_STATE_BUSY; in HAL_ETH_Stop()
843 CLEAR_BIT(heth->Instance->DMAOMR, ETH_DMAOMR_ST); in HAL_ETH_Stop()
846 CLEAR_BIT(heth->Instance->DMAOMR, ETH_DMAOMR_SR); in HAL_ETH_Stop()
849 CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Stop()
853 tmpreg1 = (heth->Instance)->MACCR; in HAL_ETH_Stop()
855 (heth->Instance)->MACCR = tmpreg1; in HAL_ETH_Stop()
858 ETH_FlushTransmitFIFO(heth); in HAL_ETH_Stop()
861 CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_TE); in HAL_ETH_Stop()
865 tmpreg1 = (heth->Instance)->MACCR; in HAL_ETH_Stop()
867 (heth->Instance)->MACCR = tmpreg1; in HAL_ETH_Stop()
869 heth->gState = HAL_ETH_STATE_READY; in HAL_ETH_Stop()
886 HAL_StatusTypeDef HAL_ETH_Stop_IT(ETH_HandleTypeDef *heth) in HAL_ETH_Stop_IT() argument
892 if (heth->gState == HAL_ETH_STATE_STARTED) in HAL_ETH_Stop_IT()
895 heth->gState = HAL_ETH_STATE_BUSY; in HAL_ETH_Stop_IT()
897 __HAL_ETH_DMA_DISABLE_IT(heth, (ETH_DMAIER_NISE | ETH_DMAIER_RIE | ETH_DMAIER_TIE | in HAL_ETH_Stop_IT()
901 CLEAR_BIT(heth->Instance->DMAOMR, ETH_DMAOMR_ST); in HAL_ETH_Stop_IT()
904 CLEAR_BIT(heth->Instance->DMAOMR, ETH_DMAOMR_SR); in HAL_ETH_Stop_IT()
907 CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Stop_IT()
912 tmpreg1 = (heth->Instance)->MACCR; in HAL_ETH_Stop_IT()
914 (heth->Instance)->MACCR = tmpreg1; in HAL_ETH_Stop_IT()
917 ETH_FlushTransmitFIFO(heth); in HAL_ETH_Stop_IT()
920 CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_TE); in HAL_ETH_Stop_IT()
924 tmpreg1 = (heth->Instance)->MACCR; in HAL_ETH_Stop_IT()
926 (heth->Instance)->MACCR = tmpreg1; in HAL_ETH_Stop_IT()
931 dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descindex]; in HAL_ETH_Stop_IT()
935 heth->RxDescList.ItMode = 0U; in HAL_ETH_Stop_IT()
937 heth->gState = HAL_ETH_STATE_READY; in HAL_ETH_Stop_IT()
956 HAL_StatusTypeDef HAL_ETH_Transmit(ETH_HandleTypeDef *heth, ETH_TxPacketConfigTypeDef *pTxConfig, u… in HAL_ETH_Transmit() argument
963 heth->ErrorCode |= HAL_ETH_ERROR_PARAM; in HAL_ETH_Transmit()
967 if (heth->gState == HAL_ETH_STATE_STARTED) in HAL_ETH_Transmit()
970 if (ETH_Prepare_Tx_Descriptors(heth, pTxConfig, 0) != HAL_ETH_ERROR_NONE) in HAL_ETH_Transmit()
973 heth->ErrorCode |= HAL_ETH_ERROR_BUSY; in HAL_ETH_Transmit()
980 dmatxdesc = (ETH_DMADescTypeDef *)(&heth->TxDescList)->TxDesc[heth->TxDescList.CurTxDesc]; in HAL_ETH_Transmit()
983 INCR_TX_DESC_INDEX(heth->TxDescList.CurTxDesc, 1U); in HAL_ETH_Transmit()
987 …WRITE_REG(heth->Instance->DMATPDR, (uint32_t)(heth->TxDescList.TxDesc[heth->TxDescList.CurTxDesc])… in HAL_ETH_Transmit()
994 if ((heth->Instance->DMASR & ETH_DMASR_FBES) != (uint32_t)RESET) in HAL_ETH_Transmit()
996 heth->ErrorCode |= HAL_ETH_ERROR_DMA; in HAL_ETH_Transmit()
997 heth->DMAErrorCode = heth->Instance->DMASR; in HAL_ETH_Transmit()
1007 heth->ErrorCode |= HAL_ETH_ERROR_TIMEOUT; in HAL_ETH_Transmit()
1031 HAL_StatusTypeDef HAL_ETH_Transmit_IT(ETH_HandleTypeDef *heth, ETH_TxPacketConfigTypeDef *pTxConfig) in HAL_ETH_Transmit_IT() argument
1035 heth->ErrorCode |= HAL_ETH_ERROR_PARAM; in HAL_ETH_Transmit_IT()
1039 if (heth->gState == HAL_ETH_STATE_STARTED) in HAL_ETH_Transmit_IT()
1042 heth->TxDescList.CurrentPacketAddress = (uint32_t *)pTxConfig->pData; in HAL_ETH_Transmit_IT()
1045 if (ETH_Prepare_Tx_Descriptors(heth, pTxConfig, 1) != HAL_ETH_ERROR_NONE) in HAL_ETH_Transmit_IT()
1047 heth->ErrorCode |= HAL_ETH_ERROR_BUSY; in HAL_ETH_Transmit_IT()
1055 INCR_TX_DESC_INDEX(heth->TxDescList.CurTxDesc, 1U); in HAL_ETH_Transmit_IT()
1059 if (((heth->Instance)->DMASR & ETH_DMASR_TBUS) != (uint32_t)RESET) in HAL_ETH_Transmit_IT()
1062 (heth->Instance)->DMASR = ETH_DMASR_TBUS; in HAL_ETH_Transmit_IT()
1064 (heth->Instance)->DMATPDR = 0U; in HAL_ETH_Transmit_IT()
1083 HAL_StatusTypeDef HAL_ETH_ReadData(ETH_HandleTypeDef *heth, void **pAppBuff) in HAL_ETH_ReadData() argument
1094 heth->ErrorCode |= HAL_ETH_ERROR_PARAM; in HAL_ETH_ReadData()
1098 if (heth->gState != HAL_ETH_STATE_STARTED) in HAL_ETH_ReadData()
1103 descidx = heth->RxDescList.RxDescIdx; in HAL_ETH_ReadData()
1104 dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx]; in HAL_ETH_ReadData()
1105 desccntmax = ETH_RX_DESC_CNT - heth->RxDescList.RxBuildDescCnt; in HAL_ETH_ReadData()
1114 heth->RxDescList.TimeStamp.TimeStampHigh = dmarxdesc->DESC7; in HAL_ETH_ReadData()
1116 heth->RxDescList.TimeStamp.TimeStampLow = dmarxdesc->DESC6; in HAL_ETH_ReadData()
1118 …if ((READ_BIT(dmarxdesc->DESC0, ETH_DMARXDESC_FS) != (uint32_t)RESET) || (heth->RxDescList.pRxStar… in HAL_ETH_ReadData()
1123 heth->RxDescList.RxDescCnt = 0; in HAL_ETH_ReadData()
1124 heth->RxDescList.RxDataLength = 0; in HAL_ETH_ReadData()
1134 heth->RxDescList.pRxLastRxDesc = dmarxdesc->DESC0; in HAL_ETH_ReadData()
1144 heth->rxLinkCallback(&heth->RxDescList.pRxStart, &heth->RxDescList.pRxEnd, in HAL_ETH_ReadData()
1148 HAL_ETH_RxLinkCallback(&heth->RxDescList.pRxStart, &heth->RxDescList.pRxEnd, in HAL_ETH_ReadData()
1151 heth->RxDescList.RxDescCnt++; in HAL_ETH_ReadData()
1152 heth->RxDescList.RxDataLength += bufflength; in HAL_ETH_ReadData()
1161 dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx]; in HAL_ETH_ReadData()
1165 heth->RxDescList.RxBuildDescCnt += desccnt; in HAL_ETH_ReadData()
1166 if ((heth->RxDescList.RxBuildDescCnt) != 0U) in HAL_ETH_ReadData()
1169 ETH_UpdateDescriptor(heth); in HAL_ETH_ReadData()
1172 heth->RxDescList.RxDescIdx = descidx; in HAL_ETH_ReadData()
1177 *pAppBuff = heth->RxDescList.pRxStart; in HAL_ETH_ReadData()
1179 heth->RxDescList.pRxStart = NULL; in HAL_ETH_ReadData()
1196 static void ETH_UpdateDescriptor(ETH_HandleTypeDef *heth) in ETH_UpdateDescriptor() argument
1205 descidx = heth->RxDescList.RxBuildDescIdx; in ETH_UpdateDescriptor()
1206 dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx]; in ETH_UpdateDescriptor()
1207 desccount = heth->RxDescList.RxBuildDescCnt; in ETH_UpdateDescriptor()
1217 heth->rxAllocateCallback(&buff); in ETH_UpdateDescriptor()
1235 if (heth->RxDescList.ItMode == 0U) in ETH_UpdateDescriptor()
1237 WRITE_REG(dmarxdesc->DESC1, heth->Init.RxBuffLen | ETH_DMARXDESC_DIC | ETH_DMARXDESC_RCH); in ETH_UpdateDescriptor()
1241 WRITE_REG(dmarxdesc->DESC1, heth->Init.RxBuffLen | ETH_DMARXDESC_RCH); in ETH_UpdateDescriptor()
1249 dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx]; in ETH_UpdateDescriptor()
1254 if (heth->RxDescList.RxBuildDescCnt != desccount) in ETH_UpdateDescriptor()
1263 WRITE_REG(heth->Instance->DMARPDR, ((uint32_t)(heth->Init.RxDesc + (tailidx)))); in ETH_UpdateDescriptor()
1265 heth->RxDescList.RxBuildDescIdx = descidx; in ETH_UpdateDescriptor()
1266 heth->RxDescList.RxBuildDescCnt = desccount; in ETH_UpdateDescriptor()
1277 HAL_StatusTypeDef HAL_ETH_RegisterRxAllocateCallback(ETH_HandleTypeDef *heth, in HAL_ETH_RegisterRxAllocateCallback() argument
1287 heth->rxAllocateCallback = rxAllocateCallback; in HAL_ETH_RegisterRxAllocateCallback()
1298 HAL_StatusTypeDef HAL_ETH_UnRegisterRxAllocateCallback(ETH_HandleTypeDef *heth) in HAL_ETH_UnRegisterRxAllocateCallback() argument
1301 heth->rxAllocateCallback = HAL_ETH_RxAllocateCallback; in HAL_ETH_UnRegisterRxAllocateCallback()
1347 HAL_StatusTypeDef HAL_ETH_RegisterRxLinkCallback(ETH_HandleTypeDef *heth, pETH_rxLinkCallbackTypeDe… in HAL_ETH_RegisterRxLinkCallback() argument
1356 heth->rxLinkCallback = rxLinkCallback; in HAL_ETH_RegisterRxLinkCallback()
1367 HAL_StatusTypeDef HAL_ETH_UnRegisterRxLinkCallback(ETH_HandleTypeDef *heth) in HAL_ETH_UnRegisterRxLinkCallback() argument
1370 heth->rxLinkCallback = HAL_ETH_RxLinkCallback; in HAL_ETH_UnRegisterRxLinkCallback()
1382 HAL_StatusTypeDef HAL_ETH_GetRxDataErrorCode(const ETH_HandleTypeDef *heth, uint32_t *pErrorCode) in HAL_ETH_GetRxDataErrorCode() argument
1385 *pErrorCode = READ_BIT(heth->RxDescList.pRxLastRxDesc, ETH_DMARXDESC_ERRORS_MASK); in HAL_ETH_GetRxDataErrorCode()
1397 HAL_StatusTypeDef HAL_ETH_RegisterTxFreeCallback(ETH_HandleTypeDef *heth, pETH_txFreeCallbackTypeDe… in HAL_ETH_RegisterTxFreeCallback() argument
1406 heth->txFreeCallback = txFreeCallback; in HAL_ETH_RegisterTxFreeCallback()
1417 HAL_StatusTypeDef HAL_ETH_UnRegisterTxFreeCallback(ETH_HandleTypeDef *heth) in HAL_ETH_UnRegisterTxFreeCallback() argument
1420 heth->txFreeCallback = HAL_ETH_TxFreeCallback; in HAL_ETH_UnRegisterTxFreeCallback()
1445 HAL_StatusTypeDef HAL_ETH_ReleaseTxPacket(ETH_HandleTypeDef *heth) in HAL_ETH_ReleaseTxPacket() argument
1447 ETH_TxDescListTypeDef *dmatxdesclist = &heth->TxDescList; in HAL_ETH_ReleaseTxPacket()
1453 ETH_TimeStampTypeDef *timestamp = &heth->TxTimestamp; in HAL_ETH_ReleaseTxPacket()
1472 if ((heth->Init.TxDesc[idx].DESC0 & ETH_DMATXDESC_OWN) == 0U) in HAL_ETH_ReleaseTxPacket()
1475 if ((heth->Init.TxDesc[idx].DESC0 & ETH_DMATXDESC_LS) in HAL_ETH_ReleaseTxPacket()
1476 && (heth->Init.TxDesc[idx].DESC0 & ETH_DMATXDESC_TTSS)) in HAL_ETH_ReleaseTxPacket()
1479 timestamp->TimeStampLow = heth->Init.TxDesc[idx].DESC6; in HAL_ETH_ReleaseTxPacket()
1481 timestamp->TimeStampHigh = heth->Init.TxDesc[idx].DESC7; in HAL_ETH_ReleaseTxPacket()
1495 heth->txPtpCallback(dmatxdesclist->PacketAddress[idx], timestamp); in HAL_ETH_ReleaseTxPacket()
1499 heth->txFreeCallback(dmatxdesclist->PacketAddress[idx]); in HAL_ETH_ReleaseTxPacket()
1540 HAL_StatusTypeDef HAL_ETH_PTP_SetConfig(ETH_HandleTypeDef *heth, ETH_PTP_ConfigTypeDef *ptpconfig) in HAL_ETH_PTP_SetConfig() argument
1564 MODIFY_REG(heth->Instance->PTPTSCR, ETH_MACTSCR_MASK, tmpTSCR); in HAL_ETH_PTP_SetConfig()
1567 SET_BIT(heth->Instance->PTPTSCR, ETH_PTPTSCR_TSE); in HAL_ETH_PTP_SetConfig()
1568 WRITE_REG(heth->Instance->PTPSSIR, ptpconfig->TimestampSubsecondInc); in HAL_ETH_PTP_SetConfig()
1569 WRITE_REG(heth->Instance->PTPTSAR, ptpconfig->TimestampAddend); in HAL_ETH_PTP_SetConfig()
1574 SET_BIT(heth->Instance->PTPTSCR, ETH_PTPTSCR_TSARU); in HAL_ETH_PTP_SetConfig()
1575 while ((heth->Instance->PTPTSCR & ETH_PTPTSCR_TSARU) != 0) in HAL_ETH_PTP_SetConfig()
1582 SET_BIT(heth->Instance->PTPTSCR, ETH_PTPTSCR_TSSTI); in HAL_ETH_PTP_SetConfig()
1585 heth->IsPtpConfigured = HAL_ETH_PTP_CONFIGURED; in HAL_ETH_PTP_SetConfig()
1588 time.Seconds = heth->Instance->PTPTSHR; in HAL_ETH_PTP_SetConfig()
1590 time.NanoSeconds = heth->Instance->PTPTSLR; in HAL_ETH_PTP_SetConfig()
1592 HAL_ETH_PTP_SetTime(heth, &time); in HAL_ETH_PTP_SetConfig()
1606 HAL_StatusTypeDef HAL_ETH_PTP_GetConfig(ETH_HandleTypeDef *heth, ETH_PTP_ConfigTypeDef *ptpconfig) in HAL_ETH_PTP_GetConfig() argument
1612 ptpconfig->Timestamp = READ_BIT(heth->Instance->PTPTSCR, ETH_PTPTSCR_TSE); in HAL_ETH_PTP_GetConfig()
1613 ptpconfig->TimestampUpdate = ((READ_BIT(heth->Instance->PTPTSCR, in HAL_ETH_PTP_GetConfig()
1615 ptpconfig->TimestampAll = ((READ_BIT(heth->Instance->PTPTSCR, in HAL_ETH_PTP_GetConfig()
1617 ptpconfig->TimestampRolloverMode = ((READ_BIT(heth->Instance->PTPTSCR, in HAL_ETH_PTP_GetConfig()
1620 ptpconfig->TimestampV2 = ((READ_BIT(heth->Instance->PTPTSCR, in HAL_ETH_PTP_GetConfig()
1622 ptpconfig->TimestampEthernet = ((READ_BIT(heth->Instance->PTPTSCR, in HAL_ETH_PTP_GetConfig()
1625 ptpconfig->TimestampIPv6 = ((READ_BIT(heth->Instance->PTPTSCR, in HAL_ETH_PTP_GetConfig()
1627 ptpconfig->TimestampIPv4 = ((READ_BIT(heth->Instance->PTPTSCR, in HAL_ETH_PTP_GetConfig()
1629 ptpconfig->TimestampEvent = ((READ_BIT(heth->Instance->PTPTSCR, in HAL_ETH_PTP_GetConfig()
1631 ptpconfig->TimestampMaster = ((READ_BIT(heth->Instance->PTPTSCR, in HAL_ETH_PTP_GetConfig()
1633 ptpconfig->TimestampFilter = ((READ_BIT(heth->Instance->PTPTSCR, in HAL_ETH_PTP_GetConfig()
1635 ptpconfig->TimestampClockType = ((READ_BIT(heth->Instance->PTPTSCR, in HAL_ETH_PTP_GetConfig()
1650 HAL_StatusTypeDef HAL_ETH_PTP_SetTime(ETH_HandleTypeDef *heth, ETH_TimeTypeDef *time) in HAL_ETH_PTP_SetTime() argument
1652 if (heth->IsPtpConfigured == HAL_ETH_PTP_CONFIGURED) in HAL_ETH_PTP_SetTime()
1655 heth->Instance->PTPTSHUR = time->Seconds; in HAL_ETH_PTP_SetTime()
1658 heth->Instance->PTPTSLUR = time->NanoSeconds; in HAL_ETH_PTP_SetTime()
1661 SET_BIT(heth->Instance->PTPTSCR, ETH_PTPTSCR_TSSTU); in HAL_ETH_PTP_SetTime()
1681 HAL_StatusTypeDef HAL_ETH_PTP_GetTime(ETH_HandleTypeDef *heth, ETH_TimeTypeDef *time) in HAL_ETH_PTP_GetTime() argument
1683 if (heth->IsPtpConfigured == HAL_ETH_PTP_CONFIGURED) in HAL_ETH_PTP_GetTime()
1686 time->Seconds = heth->Instance->PTPTSHR; in HAL_ETH_PTP_GetTime()
1688 time->NanoSeconds = heth->Instance->PTPTSLR; in HAL_ETH_PTP_GetTime()
1708 HAL_StatusTypeDef HAL_ETH_PTP_AddTimeOffset(ETH_HandleTypeDef *heth, ETH_PtpUpdateTypeDef ptpoffset… in HAL_ETH_PTP_AddTimeOffset() argument
1711 if (heth->IsPtpConfigured == HAL_ETH_PTP_CONFIGURED) in HAL_ETH_PTP_AddTimeOffset()
1716 heth->Instance->PTPTSHUR = ETH_PTPTSHR_VALUE - timeoffset->Seconds + 1U; in HAL_ETH_PTP_AddTimeOffset()
1718 if (READ_BIT(heth->Instance->PTPTSCR, ETH_PTPTSCR_TSSSR) == ETH_PTPTSCR_TSSSR) in HAL_ETH_PTP_AddTimeOffset()
1721 heth->Instance->PTPTSLUR = ETH_PTPTSLR_VALUE - timeoffset->NanoSeconds; in HAL_ETH_PTP_AddTimeOffset()
1725 heth->Instance->PTPTSLUR = ETH_PTPTSHR_VALUE - timeoffset->NanoSeconds + 1U; in HAL_ETH_PTP_AddTimeOffset()
1731 heth->Instance->PTPTSHUR = timeoffset->Seconds; in HAL_ETH_PTP_AddTimeOffset()
1733 heth->Instance->PTPTSLUR = timeoffset->NanoSeconds; in HAL_ETH_PTP_AddTimeOffset()
1736 SET_BIT(heth->Instance->PTPTSCR, ETH_PTPTSCR_TSSTU); in HAL_ETH_PTP_AddTimeOffset()
1754 HAL_StatusTypeDef HAL_ETH_PTP_InsertTxTimestamp(ETH_HandleTypeDef *heth) in HAL_ETH_PTP_InsertTxTimestamp() argument
1756 ETH_TxDescListTypeDef *dmatxdesclist = &heth->TxDescList; in HAL_ETH_PTP_InsertTxTimestamp()
1760 if (heth->IsPtpConfigured == HAL_ETH_PTP_CONFIGURED) in HAL_ETH_PTP_InsertTxTimestamp()
1783 HAL_StatusTypeDef HAL_ETH_PTP_GetTxTimestamp(ETH_HandleTypeDef *heth, ETH_TimeStampTypeDef *timesta… in HAL_ETH_PTP_GetTxTimestamp() argument
1785 ETH_TxDescListTypeDef *dmatxdesclist = &heth->TxDescList; in HAL_ETH_PTP_GetTxTimestamp()
1789 if (heth->IsPtpConfigured == HAL_ETH_PTP_CONFIGURED) in HAL_ETH_PTP_GetTxTimestamp()
1814 HAL_StatusTypeDef HAL_ETH_PTP_GetRxTimestamp(ETH_HandleTypeDef *heth, ETH_TimeStampTypeDef *timesta… in HAL_ETH_PTP_GetRxTimestamp() argument
1816 if (heth->IsPtpConfigured == HAL_ETH_PTP_CONFIGURED) in HAL_ETH_PTP_GetRxTimestamp()
1819 timestamp->TimeStampLow = heth->RxDescList.TimeStamp.TimeStampLow; in HAL_ETH_PTP_GetRxTimestamp()
1821 timestamp->TimeStampHigh = heth->RxDescList.TimeStamp.TimeStampHigh; in HAL_ETH_PTP_GetRxTimestamp()
1840 HAL_StatusTypeDef HAL_ETH_RegisterTxPtpCallback(ETH_HandleTypeDef *heth, pETH_txPtpCallbackTypeDef … in HAL_ETH_RegisterTxPtpCallback() argument
1848 heth->txPtpCallback = txPtpCallback; in HAL_ETH_RegisterTxPtpCallback()
1859 HAL_StatusTypeDef HAL_ETH_UnRegisterTxPtpCallback(ETH_HandleTypeDef *heth) in HAL_ETH_UnRegisterTxPtpCallback() argument
1862 heth->txPtpCallback = HAL_ETH_TxPtpCallback; in HAL_ETH_UnRegisterTxPtpCallback()
1890 void HAL_ETH_IRQHandler(ETH_HandleTypeDef *heth) in HAL_ETH_IRQHandler() argument
1892 uint32_t mac_flag = READ_REG(heth->Instance->MACSR); in HAL_ETH_IRQHandler()
1893 uint32_t dma_flag = READ_REG(heth->Instance->DMASR); in HAL_ETH_IRQHandler()
1894 uint32_t dma_itsource = READ_REG(heth->Instance->DMAIER); in HAL_ETH_IRQHandler()
1901 __HAL_ETH_DMA_CLEAR_IT(heth, ETH_DMASR_RS | ETH_DMASR_NIS); in HAL_ETH_IRQHandler()
1905 heth->RxCpltCallback(heth); in HAL_ETH_IRQHandler()
1908 HAL_ETH_RxCpltCallback(heth); in HAL_ETH_IRQHandler()
1916 __HAL_ETH_DMA_CLEAR_IT(heth, ETH_DMASR_TS | ETH_DMASR_NIS); in HAL_ETH_IRQHandler()
1920 heth->TxCpltCallback(heth); in HAL_ETH_IRQHandler()
1923 HAL_ETH_TxCpltCallback(heth); in HAL_ETH_IRQHandler()
1930 heth->ErrorCode |= HAL_ETH_ERROR_DMA; in HAL_ETH_IRQHandler()
1935 …heth->DMAErrorCode = READ_BIT(heth->Instance->DMASR, (ETH_DMASR_FBES | ETH_DMASR_TPS | ETH_DMASR_R… in HAL_ETH_IRQHandler()
1938 __HAL_ETH_DMA_DISABLE_IT(heth, ETH_DMAIER_NISE | ETH_DMAIER_AISE); in HAL_ETH_IRQHandler()
1941 heth->gState = HAL_ETH_STATE_ERROR; in HAL_ETH_IRQHandler()
1946 heth->DMAErrorCode = READ_BIT(heth->Instance->DMASR, (ETH_DMASR_ETS | ETH_DMASR_RWTS | in HAL_ETH_IRQHandler()
1950 __HAL_ETH_DMA_CLEAR_IT(heth, (ETH_DMASR_ETS | ETH_DMASR_RWTS | in HAL_ETH_IRQHandler()
1955 heth->ErrorCallback(heth); in HAL_ETH_IRQHandler()
1958 HAL_ETH_ErrorCallback(heth); in HAL_ETH_IRQHandler()
1967 …heth->MACWakeUpEvent = READ_BIT(heth->Instance->MACPMTCSR, (ETH_MACPMTCSR_WFR | ETH_MACPMTCSR_MPR)… in HAL_ETH_IRQHandler()
1971 heth->PMTCallback(heth); in HAL_ETH_IRQHandler()
1974 HAL_ETH_PMTCallback(heth); in HAL_ETH_IRQHandler()
1977 heth->MACWakeUpEvent = (uint32_t)(0x0U); in HAL_ETH_IRQHandler()
1988 heth->WakeUpCallback(heth); in HAL_ETH_IRQHandler()
1991 HAL_ETH_WakeUpCallback(heth); in HAL_ETH_IRQHandler()
2002 __weak void HAL_ETH_TxCpltCallback(ETH_HandleTypeDef *heth) in HAL_ETH_TxCpltCallback() argument
2005 UNUSED(heth); in HAL_ETH_TxCpltCallback()
2017 __weak void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *heth) in HAL_ETH_RxCpltCallback() argument
2020 UNUSED(heth); in HAL_ETH_RxCpltCallback()
2032 __weak void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *heth) in HAL_ETH_ErrorCallback() argument
2035 UNUSED(heth); in HAL_ETH_ErrorCallback()
2047 __weak void HAL_ETH_PMTCallback(ETH_HandleTypeDef *heth) in HAL_ETH_PMTCallback() argument
2050 UNUSED(heth); in HAL_ETH_PMTCallback()
2063 __weak void HAL_ETH_WakeUpCallback(ETH_HandleTypeDef *heth) in HAL_ETH_WakeUpCallback() argument
2066 UNUSED(heth); in HAL_ETH_WakeUpCallback()
2081 HAL_StatusTypeDef HAL_ETH_ReadPHYRegister(ETH_HandleTypeDef *heth, uint32_t PHYAddr, uint32_t PHYRe… in HAL_ETH_ReadPHYRegister() argument
2088 tmpreg1 = heth->Instance->MACMIIAR; in HAL_ETH_ReadPHYRegister()
2100 heth->Instance->MACMIIAR = tmpreg1; in HAL_ETH_ReadPHYRegister()
2114 tmpreg1 = heth->Instance->MACMIIAR; in HAL_ETH_ReadPHYRegister()
2118 *pRegValue = (uint16_t)(heth->Instance->MACMIIDR); in HAL_ETH_ReadPHYRegister()
2132 HAL_StatusTypeDef HAL_ETH_WritePHYRegister(const ETH_HandleTypeDef *heth, uint32_t PHYAddr, uint32_… in HAL_ETH_WritePHYRegister() argument
2139 tmpreg1 = heth->Instance->MACMIIAR; in HAL_ETH_WritePHYRegister()
2151 heth->Instance->MACMIIDR = (uint16_t)RegValue; in HAL_ETH_WritePHYRegister()
2154 heth->Instance->MACMIIAR = tmpreg1; in HAL_ETH_WritePHYRegister()
2168 tmpreg1 = heth->Instance->MACMIIAR; in HAL_ETH_WritePHYRegister()
2200 HAL_StatusTypeDef HAL_ETH_GetMACConfig(const ETH_HandleTypeDef *heth, ETH_MACConfigTypeDef *macconf) in HAL_ETH_GetMACConfig() argument
2208 …macconf->DeferralCheck = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DC) >> 4) > 0U) ? ENABLE : DI… in HAL_ETH_GetMACConfig()
2209 macconf->BackOffLimit = READ_BIT(heth->Instance->MACCR, ETH_MACCR_BL); in HAL_ETH_GetMACConfig()
2210 …macconf->RetryTransmission = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_RD) >> 9) == 0U) ? ENABLE… in HAL_ETH_GetMACConfig()
2211 …macconf->CarrierSenseDuringTransmit = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_CSD) >> 16) > 0U) in HAL_ETH_GetMACConfig()
2213 …macconf->ReceiveOwn = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_ROD) >> 13) == 0U) ? ENABLE : DI… in HAL_ETH_GetMACConfig()
2214 …macconf->LoopbackMode = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_LM) >> 12) > 0U) ? ENABLE : DI… in HAL_ETH_GetMACConfig()
2215 macconf->DuplexMode = READ_BIT(heth->Instance->MACCR, ETH_MACCR_DM); in HAL_ETH_GetMACConfig()
2216 macconf->Speed = READ_BIT(heth->Instance->MACCR, ETH_MACCR_FES); in HAL_ETH_GetMACConfig()
2217 …macconf->Jabber = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_JD) >> 22) == 0U) ? ENABLE : DISABLE; in HAL_ETH_GetMACConfig()
2218 …macconf->Watchdog = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_WD) >> 23) == 0U) ? ENABLE : DISAB… in HAL_ETH_GetMACConfig()
2219 …macconf->AutomaticPadCRCStrip = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_APCS) >> 7) > 0U) ? EN… in HAL_ETH_GetMACConfig()
2220 macconf->InterPacketGapVal = READ_BIT(heth->Instance->MACCR, ETH_MACCR_IFG); in HAL_ETH_GetMACConfig()
2221 …macconf->ChecksumOffload = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_IPCO) >> 10U) > 0U) ? ENABL… in HAL_ETH_GetMACConfig()
2222 …macconf->CRCStripTypePacket = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_CSTF) >> 25U) > 0U) ? EN… in HAL_ETH_GetMACConfig()
2224 …macconf->TransmitFlowControl = ((READ_BIT(heth->Instance->MACFCR, ETH_MACFCR_TFCE) >> 1) > 0U) ? E… in HAL_ETH_GetMACConfig()
2225 …macconf->ZeroQuantaPause = ((READ_BIT(heth->Instance->MACFCR, ETH_MACFCR_ZQPD) >> 7) == 0U) ? ENAB… in HAL_ETH_GetMACConfig()
2226 macconf->PauseLowThreshold = READ_BIT(heth->Instance->MACFCR, ETH_MACFCR_PLT); in HAL_ETH_GetMACConfig()
2227 macconf->PauseTime = (READ_BIT(heth->Instance->MACFCR, ETH_MACFCR_PT) >> 16); in HAL_ETH_GetMACConfig()
2228 …macconf->ReceiveFlowControl = ((READ_BIT(heth->Instance->MACFCR, ETH_MACFCR_RFCE) >> 2U) > 0U) ? E… in HAL_ETH_GetMACConfig()
2229 …macconf->UnicastPausePacketDetect = ((READ_BIT(heth->Instance->MACFCR, ETH_MACFCR_UPFD) >> 3U) > 0… in HAL_ETH_GetMACConfig()
2243 HAL_StatusTypeDef HAL_ETH_GetDMAConfig(const ETH_HandleTypeDef *heth, ETH_DMAConfigTypeDef *dmaconf) in HAL_ETH_GetDMAConfig() argument
2250 dmaconf->DMAArbitration = READ_BIT(heth->Instance->DMABMR, in HAL_ETH_GetDMAConfig()
2252 …dmaconf->AddressAlignedBeats = ((READ_BIT(heth->Instance->DMABMR, ETH_DMABMR_AAB) >> 25U) > 0U) ? … in HAL_ETH_GetDMAConfig()
2253 dmaconf->BurstMode = READ_BIT(heth->Instance->DMABMR, ETH_DMABMR_FB | ETH_DMABMR_MB); in HAL_ETH_GetDMAConfig()
2254 dmaconf->RxDMABurstLength = READ_BIT(heth->Instance->DMABMR, ETH_DMABMR_RDP); in HAL_ETH_GetDMAConfig()
2255 dmaconf->TxDMABurstLength = READ_BIT(heth->Instance->DMABMR, ETH_DMABMR_PBL); in HAL_ETH_GetDMAConfig()
2256 …dmaconf->EnhancedDescriptorFormat = ((READ_BIT(heth->Instance->DMABMR, ETH_DMABMR_EDE) >> 7) > 0U)… in HAL_ETH_GetDMAConfig()
2257 dmaconf->DescriptorSkipLength = READ_BIT(heth->Instance->DMABMR, ETH_DMABMR_DSL) >> 2; in HAL_ETH_GetDMAConfig()
2259 dmaconf->DropTCPIPChecksumErrorFrame = ((READ_BIT(heth->Instance->DMAOMR, in HAL_ETH_GetDMAConfig()
2261 …dmaconf->ReceiveStoreForward = ((READ_BIT(heth->Instance->DMAOMR, ETH_DMAOMR_RSF) >> 25) > 0U) ? E… in HAL_ETH_GetDMAConfig()
2262 …dmaconf->FlushRxPacket = ((READ_BIT(heth->Instance->DMAOMR, ETH_DMAOMR_FTF) >> 20) > 0U) ? DISABLE… in HAL_ETH_GetDMAConfig()
2263 …dmaconf->TransmitStoreForward = ((READ_BIT(heth->Instance->DMAOMR, ETH_DMAOMR_TSF) >> 21) > 0U) ? … in HAL_ETH_GetDMAConfig()
2264 dmaconf->TransmitThresholdControl = READ_BIT(heth->Instance->DMAOMR, ETH_DMAOMR_TTC); in HAL_ETH_GetDMAConfig()
2265 …dmaconf->ForwardErrorFrames = ((READ_BIT(heth->Instance->DMAOMR, ETH_DMAOMR_FEF) >> 7) > 0U) ? ENA… in HAL_ETH_GetDMAConfig()
2266 dmaconf->ForwardUndersizedGoodFrames = ((READ_BIT(heth->Instance->DMAOMR, in HAL_ETH_GetDMAConfig()
2268 dmaconf->ReceiveThresholdControl = READ_BIT(heth->Instance->DMAOMR, ETH_DMAOMR_RTC); in HAL_ETH_GetDMAConfig()
2269 …dmaconf->SecondFrameOperate = ((READ_BIT(heth->Instance->DMAOMR, ETH_DMAOMR_OSF) >> 2) > 0U) ? ENA… in HAL_ETH_GetDMAConfig()
2282 HAL_StatusTypeDef HAL_ETH_SetMACConfig(ETH_HandleTypeDef *heth, ETH_MACConfigTypeDef *macconf) in HAL_ETH_SetMACConfig() argument
2289 if (heth->gState == HAL_ETH_STATE_READY) in HAL_ETH_SetMACConfig()
2291 ETH_SetMACConfig(heth, macconf); in HAL_ETH_SetMACConfig()
2309 HAL_StatusTypeDef HAL_ETH_SetDMAConfig(ETH_HandleTypeDef *heth, ETH_DMAConfigTypeDef *dmaconf) in HAL_ETH_SetDMAConfig() argument
2316 if (heth->gState == HAL_ETH_STATE_READY) in HAL_ETH_SetDMAConfig()
2318 ETH_SetDMAConfig(heth, dmaconf); in HAL_ETH_SetDMAConfig()
2334 void HAL_ETH_SetMDIOClockRange(ETH_HandleTypeDef *heth) in HAL_ETH_SetMDIOClockRange() argument
2340 tmpreg = (heth->Instance)->MACMIIAR; in HAL_ETH_SetMDIOClockRange()
2375 (heth->Instance)->MACMIIAR = (uint32_t)tmpreg; in HAL_ETH_SetMDIOClockRange()
2386 HAL_StatusTypeDef HAL_ETH_SetMACFilterConfig(ETH_HandleTypeDef *heth, const ETH_MACFilterConfigType… in HAL_ETH_SetMACFilterConfig() argument
2408 MODIFY_REG(heth->Instance->MACFFR, ETH_MACFFR_MASK, filterconfig); in HAL_ETH_SetMACFilterConfig()
2412 tmpreg1 = (heth->Instance)->MACFFR; in HAL_ETH_SetMACFilterConfig()
2414 (heth->Instance)->MACFFR = tmpreg1; in HAL_ETH_SetMACFilterConfig()
2427 HAL_StatusTypeDef HAL_ETH_GetMACFilterConfig(const ETH_HandleTypeDef *heth, ETH_MACFilterConfigType… in HAL_ETH_GetMACFilterConfig() argument
2434 …pFilterConfig->PromiscuousMode = ((READ_BIT(heth->Instance->MACFFR, ETH_MACFFR_PM)) > 0U) ? ENABLE… in HAL_ETH_GetMACFilterConfig()
2435 …pFilterConfig->HashUnicast = ((READ_BIT(heth->Instance->MACFFR, ETH_MACFFR_HU) >> 1) > 0U) ? ENABL… in HAL_ETH_GetMACFilterConfig()
2436 …pFilterConfig->HashMulticast = ((READ_BIT(heth->Instance->MACFFR, ETH_MACFFR_HM) >> 2) > 0U) ? ENA… in HAL_ETH_GetMACFilterConfig()
2437 pFilterConfig->DestAddrInverseFiltering = ((READ_BIT(heth->Instance->MACFFR, in HAL_ETH_GetMACFilterConfig()
2439 …pFilterConfig->PassAllMulticast = ((READ_BIT(heth->Instance->MACFFR, ETH_MACFFR_PAM) >> 4) > 0U) ?… in HAL_ETH_GetMACFilterConfig()
2440 …pFilterConfig->BroadcastFilter = ((READ_BIT(heth->Instance->MACFFR, ETH_MACFFR_BFD) >> 5) == 0U) ?… in HAL_ETH_GetMACFilterConfig()
2441 pFilterConfig->ControlPacketsFilter = READ_BIT(heth->Instance->MACFFR, ETH_MACFFR_PCF); in HAL_ETH_GetMACFilterConfig()
2442 pFilterConfig->SrcAddrInverseFiltering = ((READ_BIT(heth->Instance->MACFFR, in HAL_ETH_GetMACFilterConfig()
2444 …pFilterConfig->SrcAddrFiltering = ((READ_BIT(heth->Instance->MACFFR, ETH_MACFFR_SAF) >> 9) > 0U) ?… in HAL_ETH_GetMACFilterConfig()
2445 …pFilterConfig->HachOrPerfectFilter = ((READ_BIT(heth->Instance->MACFFR, ETH_MACFFR_HPF) >> 10) > 0… in HAL_ETH_GetMACFilterConfig()
2447 …pFilterConfig->ReceiveAllMode = ((READ_BIT(heth->Instance->MACFFR, ETH_MACFFR_RA) >> 31) > 0U) ? E… in HAL_ETH_GetMACFilterConfig()
2464 HAL_StatusTypeDef HAL_ETH_SetSourceMACAddrMatch(const ETH_HandleTypeDef *heth, uint32_t AddrNbr, in HAL_ETH_SetSourceMACAddrMatch() argument
2476 macaddrhr = ((uint32_t) &(heth->Instance->MACA0HR) + AddrNbr); in HAL_ETH_SetSourceMACAddrMatch()
2478 macaddrlr = ((uint32_t) &(heth->Instance->MACA0LR) + AddrNbr); in HAL_ETH_SetSourceMACAddrMatch()
2500 HAL_StatusTypeDef HAL_ETH_SetHashTable(ETH_HandleTypeDef *heth, uint32_t *pHashTable) in HAL_ETH_SetHashTable() argument
2508 heth->Instance->MACHTHR = pHashTable[0]; in HAL_ETH_SetHashTable()
2512 tmpreg1 = (heth->Instance)->MACHTHR; in HAL_ETH_SetHashTable()
2514 (heth->Instance)->MACHTHR = tmpreg1; in HAL_ETH_SetHashTable()
2516 heth->Instance->MACHTLR = pHashTable[1]; in HAL_ETH_SetHashTable()
2520 tmpreg1 = (heth->Instance)->MACHTLR; in HAL_ETH_SetHashTable()
2522 (heth->Instance)->MACHTLR = tmpreg1; in HAL_ETH_SetHashTable()
2536 void HAL_ETH_SetRxVLANIdentifier(ETH_HandleTypeDef *heth, uint32_t ComparisonBits, uint32_t VLANIde… in HAL_ETH_SetRxVLANIdentifier() argument
2539 MODIFY_REG(heth->Instance->MACVLANTR, ETH_MACVLANTR_VLANTI, VLANIdentifier); in HAL_ETH_SetRxVLANIdentifier()
2542 CLEAR_BIT(heth->Instance->MACVLANTR, ETH_MACVLANTR_VLANTC); in HAL_ETH_SetRxVLANIdentifier()
2546 SET_BIT(heth->Instance->MACVLANTR, ETH_MACVLANTR_VLANTC); in HAL_ETH_SetRxVLANIdentifier()
2551 tmpreg1 = (heth->Instance)->MACVLANTR; in HAL_ETH_SetRxVLANIdentifier()
2553 (heth->Instance)->MACVLANTR = tmpreg1; in HAL_ETH_SetRxVLANIdentifier()
2564 void HAL_ETH_EnterPowerDownMode(ETH_HandleTypeDef *heth, const ETH_PowerDownConfigTypeDef *pPowerDo… in HAL_ETH_EnterPowerDownMode() argument
2573 MODIFY_REG(heth->Instance->MACPMTCSR, ETH_MACPMTCSR_MASK, powerdownconfig); in HAL_ETH_EnterPowerDownMode()
2582 void HAL_ETH_ExitPowerDownMode(ETH_HandleTypeDef *heth) in HAL_ETH_ExitPowerDownMode() argument
2587 CLEAR_BIT(heth->Instance->MACPMTCSR, ETH_MACPMTCSR_WFE | ETH_MACPMTCSR_MPE | ETH_MACPMTCSR_GU); in HAL_ETH_ExitPowerDownMode()
2591 tmpreg1 = (heth->Instance)->MACPMTCSR; in HAL_ETH_ExitPowerDownMode()
2593 (heth->Instance)->MACPMTCSR = tmpreg1; in HAL_ETH_ExitPowerDownMode()
2595 if (READ_BIT(heth->Instance->MACPMTCSR, ETH_MACPMTCSR_PD) != 0U) in HAL_ETH_ExitPowerDownMode()
2598 CLEAR_BIT(heth->Instance->MACPMTCSR, ETH_MACPMTCSR_PD); in HAL_ETH_ExitPowerDownMode()
2602 tmpreg1 = (heth->Instance)->MACPMTCSR; in HAL_ETH_ExitPowerDownMode()
2604 (heth->Instance)->MACPMTCSR = tmpreg1; in HAL_ETH_ExitPowerDownMode()
2608 SET_BIT(heth->Instance->MACIMR, ETH_MACIMR_PMTIM); in HAL_ETH_ExitPowerDownMode()
2619 HAL_StatusTypeDef HAL_ETH_SetWakeUpFilter(ETH_HandleTypeDef *heth, uint32_t *pFilter, uint32_t Coun… in HAL_ETH_SetWakeUpFilter() argument
2629 SET_BIT(heth->Instance->MACPMTCSR, ETH_MACPMTCSR_WFFRPR); in HAL_ETH_SetWakeUpFilter()
2635 WRITE_REG(heth->Instance->MACRWUFFR, pFilter[regindex]); in HAL_ETH_SetWakeUpFilter()
2668 HAL_ETH_StateTypeDef HAL_ETH_GetState(const ETH_HandleTypeDef *heth) in HAL_ETH_GetState() argument
2670 return heth->gState; in HAL_ETH_GetState()
2679 uint32_t HAL_ETH_GetError(const ETH_HandleTypeDef *heth) in HAL_ETH_GetError() argument
2681 return heth->ErrorCode; in HAL_ETH_GetError()
2690 uint32_t HAL_ETH_GetDMAError(const ETH_HandleTypeDef *heth) in HAL_ETH_GetDMAError() argument
2692 return heth->DMAErrorCode; in HAL_ETH_GetDMAError()
2701 uint32_t HAL_ETH_GetMACError(const ETH_HandleTypeDef *heth) in HAL_ETH_GetMACError() argument
2703 return heth->MACErrorCode; in HAL_ETH_GetMACError()
2712 uint32_t HAL_ETH_GetMACWakeUpSource(const ETH_HandleTypeDef *heth) in HAL_ETH_GetMACWakeUpSource() argument
2714 return heth->MACWakeUpEvent; in HAL_ETH_GetMACWakeUpSource()
2735 static void ETH_FlushTransmitFIFO(ETH_HandleTypeDef *heth) in ETH_FlushTransmitFIFO() argument
2740 (heth->Instance)->DMAOMR |= ETH_DMAOMR_FTF; in ETH_FlushTransmitFIFO()
2744 tmpreg = (heth->Instance)->DMAOMR; in ETH_FlushTransmitFIFO()
2746 (heth->Instance)->DMAOMR = tmpreg; in ETH_FlushTransmitFIFO()
2749 static void ETH_SetMACConfig(ETH_HandleTypeDef *heth, const ETH_MACConfigTypeDef *macconf) in ETH_SetMACConfig() argument
2755 tmpreg1 = (heth->Instance)->MACCR; in ETH_SetMACConfig()
2775 (heth->Instance)->MACCR = (uint32_t)tmpreg1; in ETH_SetMACConfig()
2779 tmpreg1 = (heth->Instance)->MACCR; in ETH_SetMACConfig()
2781 (heth->Instance)->MACCR = tmpreg1; in ETH_SetMACConfig()
2786 tmpreg1 = (heth->Instance)->MACFCR; in ETH_SetMACConfig()
2798 (heth->Instance)->MACFCR = (uint32_t)tmpreg1; in ETH_SetMACConfig()
2802 tmpreg1 = (heth->Instance)->MACFCR; in ETH_SetMACConfig()
2804 (heth->Instance)->MACFCR = tmpreg1; in ETH_SetMACConfig()
2807 static void ETH_SetDMAConfig(ETH_HandleTypeDef *heth, const ETH_DMAConfigTypeDef *dmaconf) in ETH_SetDMAConfig() argument
2813 tmpreg1 = (heth->Instance)->DMAOMR; in ETH_SetDMAConfig()
2828 (heth->Instance)->DMAOMR = (uint32_t)tmpreg1; in ETH_SetDMAConfig()
2832 tmpreg1 = (heth->Instance)->DMAOMR; in ETH_SetDMAConfig()
2834 (heth->Instance)->DMAOMR = tmpreg1; in ETH_SetDMAConfig()
2837 (heth->Instance)->DMABMR = (uint32_t)(((uint32_t)dmaconf->AddressAlignedBeats << 25U) | in ETH_SetDMAConfig()
2849 tmpreg1 = (heth->Instance)->DMABMR; in ETH_SetDMAConfig()
2851 (heth->Instance)->DMABMR = tmpreg1; in ETH_SetDMAConfig()
2861 static void ETH_MACDMAConfig(ETH_HandleTypeDef *heth) in ETH_MACDMAConfig() argument
2889 ETH_SetMACConfig(heth, &macDefaultConf); in ETH_MACDMAConfig()
2910 ETH_SetDMAConfig(heth, &dmaDefaultConf); in ETH_MACDMAConfig()
2925 static void ETH_MACAddressConfig(ETH_HandleTypeDef *heth, uint32_t MacAddr, uint8_t *Addr) in ETH_MACAddressConfig() argument
2930 UNUSED(heth); in ETH_MACAddressConfig()
2950 static void ETH_DMATxDescListInit(ETH_HandleTypeDef *heth) in ETH_DMATxDescListInit() argument
2958 dmatxdesc = heth->Init.TxDesc + i; in ETH_DMATxDescListInit()
2965 WRITE_REG(heth->TxDescList.TxDesc[i], (uint32_t)dmatxdesc); in ETH_DMATxDescListInit()
2972 WRITE_REG(dmatxdesc->DESC3, (uint32_t)(heth->Init.TxDesc + i + 1U)); in ETH_DMATxDescListInit()
2976 WRITE_REG(dmatxdesc->DESC3, (uint32_t)(heth->Init.TxDesc)); in ETH_DMATxDescListInit()
2983 heth->TxDescList.CurTxDesc = 0; in ETH_DMATxDescListInit()
2986 WRITE_REG(heth->Instance->DMATDLAR, (uint32_t) heth->Init.TxDesc); in ETH_DMATxDescListInit()
2996 static void ETH_DMARxDescListInit(ETH_HandleTypeDef *heth) in ETH_DMARxDescListInit() argument
3003 dmarxdesc = heth->Init.RxDesc + i; in ETH_DMARxDescListInit()
3016 dmarxdesc->DESC1 = heth->Init.RxBuffLen | ETH_DMARXDESC_RCH; in ETH_DMARxDescListInit()
3021 WRITE_REG(heth->RxDescList.RxDesc[i], (uint32_t)dmarxdesc); in ETH_DMARxDescListInit()
3025 WRITE_REG(dmarxdesc->DESC3, (uint32_t)(heth->Init.RxDesc + i + 1U)); in ETH_DMARxDescListInit()
3029 WRITE_REG(dmarxdesc->DESC3, (uint32_t)(heth->Init.RxDesc)); in ETH_DMARxDescListInit()
3033 WRITE_REG(heth->RxDescList.RxDescIdx, 0U); in ETH_DMARxDescListInit()
3034 WRITE_REG(heth->RxDescList.RxDescCnt, 0U); in ETH_DMARxDescListInit()
3035 WRITE_REG(heth->RxDescList.RxBuildDescIdx, 0U); in ETH_DMARxDescListInit()
3036 WRITE_REG(heth->RxDescList.RxBuildDescCnt, 0U); in ETH_DMARxDescListInit()
3037 WRITE_REG(heth->RxDescList.ItMode, 0U); in ETH_DMARxDescListInit()
3040 WRITE_REG(heth->Instance->DMARDLAR, (uint32_t) heth->Init.RxDesc); in ETH_DMARxDescListInit()
3052 static uint32_t ETH_Prepare_Tx_Descriptors(ETH_HandleTypeDef *heth, const ETH_TxPacketConfigTypeDef… in ETH_Prepare_Tx_Descriptors() argument
3055 ETH_TxDescListTypeDef *dmatxdesclist = &heth->TxDescList; in ETH_Prepare_Tx_Descriptors()
3207 static void ETH_InitCallbacksToDefault(ETH_HandleTypeDef *heth) in ETH_InitCallbacksToDefault() argument
3210 heth->TxCpltCallback = HAL_ETH_TxCpltCallback; /* Legacy weak TxCpltCallback */ in ETH_InitCallbacksToDefault()
3211 heth->RxCpltCallback = HAL_ETH_RxCpltCallback; /* Legacy weak RxCpltCallback */ in ETH_InitCallbacksToDefault()
3212 heth->ErrorCallback = HAL_ETH_ErrorCallback; /* Legacy weak ErrorCallback */ in ETH_InitCallbacksToDefault()
3213 heth->PMTCallback = HAL_ETH_PMTCallback; /* Legacy weak PMTCallback */ in ETH_InitCallbacksToDefault()
3214 heth->WakeUpCallback = HAL_ETH_WakeUpCallback; /* Legacy weak WakeUpCallback */ in ETH_InitCallbacksToDefault()
3215 heth->rxLinkCallback = HAL_ETH_RxLinkCallback; /* Legacy weak RxLinkCallback */ in ETH_InitCallbacksToDefault()
3216 heth->txFreeCallback = HAL_ETH_TxFreeCallback; /* Legacy weak TxFreeCallback */ in ETH_InitCallbacksToDefault()
3218 heth->txPtpCallback = HAL_ETH_TxPtpCallback; /* Legacy weak TxPtpCallback */ in ETH_InitCallbacksToDefault()
3220 heth->rxAllocateCallback = HAL_ETH_RxAllocateCallback; /* Legacy weak RxAllocateCallback */ in ETH_InitCallbacksToDefault()