294   regs->IFCR = 0x3FU << hdma->StreamIndex;  in HAL_DMA_Init()
356   regs->IFCR = 0x3FU << hdma->StreamIndex;  in HAL_DMA_DeInit()
478     regs->IFCR = 0x3FU << hdma->StreamIndex;  in HAL_DMA_Start_IT()
566     regs->IFCR = 0x3FU << hdma->StreamIndex;  in HAL_DMA_Abort()
643     mask_cpltlevel = DMA_FLAG_TCIF0_4 << hdma->StreamIndex;  in HAL_DMA_PollForTransfer()
648     mask_cpltlevel = DMA_FLAG_HTIF0_4 << hdma->StreamIndex;  in HAL_DMA_PollForTransfer()
677     if((tmpisr & (DMA_FLAG_TEIF0_4 << hdma->StreamIndex)) != RESET)  in HAL_DMA_PollForTransfer()
683       regs->IFCR = DMA_FLAG_TEIF0_4 << hdma->StreamIndex;  in HAL_DMA_PollForTransfer()
686     if((tmpisr & (DMA_FLAG_FEIF0_4 << hdma->StreamIndex)) != RESET)  in HAL_DMA_PollForTransfer()
692       regs->IFCR = DMA_FLAG_FEIF0_4 << hdma->StreamIndex;  in HAL_DMA_PollForTransfer()
695     if((tmpisr & (DMA_FLAG_DMEIF0_4 << hdma->StreamIndex)) != RESET)  in HAL_DMA_PollForTransfer()
701       regs->IFCR = DMA_FLAG_DMEIF0_4 << hdma->StreamIndex;  in HAL_DMA_PollForTransfer()
712       regs->IFCR = (DMA_FLAG_HTIF0_4 | DMA_FLAG_TCIF0_4) << hdma->StreamIndex;  in HAL_DMA_PollForTransfer()
728     regs->IFCR = (DMA_FLAG_HTIF0_4 | DMA_FLAG_TCIF0_4) << hdma->StreamIndex;  in HAL_DMA_PollForTransfer()
739     regs->IFCR = (DMA_FLAG_HTIF0_4) << hdma->StreamIndex;  in HAL_DMA_PollForTransfer()
763   if ((tmpisr & (DMA_FLAG_TEIF0_4 << hdma->StreamIndex)) != RESET)  in HAL_DMA_IRQHandler()
771       regs->IFCR = DMA_FLAG_TEIF0_4 << hdma->StreamIndex;  in HAL_DMA_IRQHandler()
778   if ((tmpisr & (DMA_FLAG_FEIF0_4 << hdma->StreamIndex)) != RESET)  in HAL_DMA_IRQHandler()
783       regs->IFCR = DMA_FLAG_FEIF0_4 << hdma->StreamIndex;  in HAL_DMA_IRQHandler()
790   if ((tmpisr & (DMA_FLAG_DMEIF0_4 << hdma->StreamIndex)) != RESET)  in HAL_DMA_IRQHandler()
795       regs->IFCR = DMA_FLAG_DMEIF0_4 << hdma->StreamIndex;  in HAL_DMA_IRQHandler()
802   if ((tmpisr & (DMA_FLAG_HTIF0_4 << hdma->StreamIndex)) != RESET)  in HAL_DMA_IRQHandler()
807       regs->IFCR = DMA_FLAG_HTIF0_4 << hdma->StreamIndex;  in HAL_DMA_IRQHandler()
849   if ((tmpisr & (DMA_FLAG_TCIF0_4 << hdma->StreamIndex)) != RESET)  in HAL_DMA_IRQHandler()
854       regs->IFCR = DMA_FLAG_TCIF0_4 << hdma->StreamIndex;  in HAL_DMA_IRQHandler()
868         regs->IFCR = 0x3FU << hdma->StreamIndex;  in HAL_DMA_IRQHandler()
1198   hdma->StreamIndex = flagBitshiftOffset[stream_number];  in DMA_CalcBaseAndBitshift()