Lines Matching refs:DCKCFGR1
2504 MODIFY_REG(RCC->DCKCFGR1, (SAIxSource & 0xFFFF0000U), (SAIxSource << 16U)); in LL_RCC_SetSAIClockSource()
2618 MODIFY_REG(RCC->DCKCFGR1, RCC_DCKCFGR1_ADFSDM1SEL, Source); in LL_RCC_SetDFSDMAudioClockSource()
2631 MODIFY_REG(RCC->DCKCFGR1, RCC_DCKCFGR1_DFSDM1SEL, Source); in LL_RCC_SetDFSDMClockSource()
2772 return (uint32_t)(READ_BIT(RCC->DCKCFGR1, SAIx) >> 16U | SAIx); in LL_RCC_GetSAIClockSource()
2879 return (uint32_t)(READ_BIT(RCC->DCKCFGR1, DFSDMx)); in LL_RCC_GetDFSDMAudioClockSource()
2893 return (uint32_t)(READ_BIT(RCC->DCKCFGR1, DFSDMx)); in LL_RCC_GetDFSDMClockSource()
3104 MODIFY_REG(RCC->DCKCFGR1, RCC_DCKCFGR1_TIMPRE, Prescaler); in LL_RCC_SetTIMPrescaler()
3116 return (uint32_t)(READ_BIT(RCC->DCKCFGR1, RCC_DCKCFGR1_TIMPRE)); in LL_RCC_GetTIMPrescaler()
3848 MODIFY_REG(RCC->DCKCFGR1, RCC_DCKCFGR1_PLLI2SDIVQ, PLLDIVQ); in LL_RCC_PLLI2S_ConfigDomain_SAI()
4143 return (uint32_t)(READ_BIT(RCC->DCKCFGR1, RCC_DCKCFGR1_PLLI2SDIVQ)); in LL_RCC_PLLI2S_GetDIVQ()
4316 MODIFY_REG(RCC->DCKCFGR1, RCC_DCKCFGR1_PLLSAIDIVQ, PLLDIVQ); in LL_RCC_PLLSAI_ConfigDomain_SAI()
4506 MODIFY_REG(RCC->DCKCFGR1, RCC_DCKCFGR1_PLLSAIDIVR, PLLDIVR); in LL_RCC_PLLSAI_ConfigDomain_LTDC()
4618 return (uint32_t)(READ_BIT(RCC->DCKCFGR1, RCC_DCKCFGR1_PLLSAIDIVQ)); in LL_RCC_PLLSAI_GetDIVQ()
4634 return (uint32_t)(READ_BIT(RCC->DCKCFGR1, RCC_DCKCFGR1_PLLSAIDIVR)); in LL_RCC_PLLSAI_GetDIVR()