205   SET_BIT(PWR->CR1, PWR_CR1_UDEN);  in LL_PWR_EnableUnderDriveMode()
215   CLEAR_BIT(PWR->CR1, PWR_CR1_UDEN);  in LL_PWR_DisableUnderDriveMode()
225   return (READ_BIT(PWR->CR1, PWR_CR1_UDEN) == (PWR_CR1_UDEN));  in LL_PWR_IsEnabledUnderDriveMode()
235   SET_BIT(PWR->CR1, PWR_CR1_ODSWEN);  in LL_PWR_EnableOverDriveSwitching()
245   CLEAR_BIT(PWR->CR1, PWR_CR1_ODSWEN);  in LL_PWR_DisableOverDriveSwitching()
255   return (READ_BIT(PWR->CR1, PWR_CR1_ODSWEN) == (PWR_CR1_ODSWEN));  in LL_PWR_IsEnabledOverDriveSwitching()
265   SET_BIT(PWR->CR1, PWR_CR1_ODEN);  in LL_PWR_EnableOverDriveMode()
275   CLEAR_BIT(PWR->CR1, PWR_CR1_ODEN);  in LL_PWR_DisableOverDriveMode()
285   return (READ_BIT(PWR->CR1, PWR_CR1_ODEN) == (PWR_CR1_ODEN));  in LL_PWR_IsEnabledOverDriveMode()
299   MODIFY_REG(PWR->CR1, PWR_CR1_VOS, VoltageScaling);  in LL_PWR_SetRegulVoltageScaling()
312   return (uint32_t)(READ_BIT(PWR->CR1, PWR_CR1_VOS));  in LL_PWR_GetRegulVoltageScaling()
322   SET_BIT(PWR->CR1, PWR_CR1_MRUDS);  in LL_PWR_EnableMainRegulatorDeepSleepUDMode()
332   CLEAR_BIT(PWR->CR1, PWR_CR1_MRUDS);  in LL_PWR_DisableMainRegulatorDeepSleepUDMode()
342   return (READ_BIT(PWR->CR1, PWR_CR1_MRUDS) == (PWR_CR1_MRUDS));  in LL_PWR_IsEnabledMainRegulatorDeepSleepUDMode()
352   SET_BIT(PWR->CR1, PWR_CR1_LPUDS);  in LL_PWR_EnableLowPowerRegulatorDeepSleepUDMode()
362   CLEAR_BIT(PWR->CR1, PWR_CR1_LPUDS);  in LL_PWR_DisableLowPowerRegulatorDeepSleepUDMode()
372   return (READ_BIT(PWR->CR1, PWR_CR1_LPUDS) == (PWR_CR1_LPUDS));  in LL_PWR_IsEnabledLowPowerRegulatorDeepSleepUDMode()
382   SET_BIT(PWR->CR1, PWR_CR1_FPDS);  in LL_PWR_EnableFlashPowerDown()
392   CLEAR_BIT(PWR->CR1, PWR_CR1_FPDS);  in LL_PWR_DisableFlashPowerDown()
402   return (READ_BIT(PWR->CR1, PWR_CR1_FPDS) == (PWR_CR1_FPDS));  in LL_PWR_IsEnabledFlashPowerDown()
412   SET_BIT(PWR->CR1, PWR_CR1_DBP);  in LL_PWR_EnableBkUpAccess()
422   CLEAR_BIT(PWR->CR1, PWR_CR1_DBP);  in LL_PWR_DisableBkUpAccess()
432   return (READ_BIT(PWR->CR1, PWR_CR1_DBP) == (PWR_CR1_DBP));  in LL_PWR_IsEnabledBkUpAccess()
480   MODIFY_REG(PWR->CR1, PWR_CR1_LPDS, RegulMode);  in LL_PWR_SetRegulModeDS()
492   return (uint32_t)(READ_BIT(PWR->CR1, PWR_CR1_LPDS));  in LL_PWR_GetRegulModeDS()
512 …MODIFY_REG(PWR->CR1, (PWR_CR1_PDDS | PWR_CR1_LPDS | PWR_CR1_FPDS | PWR_CR1_LPUDS | PWR_CR1_MRUDS),…  in LL_PWR_SetPowerMode()
531 …return (uint32_t)(READ_BIT(PWR->CR1, (PWR_CR1_PDDS | PWR_CR1_LPDS | PWR_CR1_FPDS | PWR_CR1_LPUDS |…  in LL_PWR_GetPowerMode()
550   MODIFY_REG(PWR->CR1, PWR_CR1_PLS, PVDLevel);  in LL_PWR_SetPVDLevel()
568   return (uint32_t)(READ_BIT(PWR->CR1, PWR_CR1_PLS));  in LL_PWR_GetPVDLevel()
578   SET_BIT(PWR->CR1, PWR_CR1_PVDE);  in LL_PWR_EnablePVD()
588   CLEAR_BIT(PWR->CR1, PWR_CR1_PVDE);  in LL_PWR_DisablePVD()
598   return (READ_BIT(PWR->CR1, PWR_CR1_PVDE) == (PWR_CR1_PVDE));  in LL_PWR_IsEnabledPVD()
910   SET_BIT(PWR->CR1, PWR_CR1_CSBF);  in LL_PWR_ClearFlag_SB()