587   uint32_t tmpcr2;  in LL_TIM_HALLSENSOR_Init()  local
602   tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);  in LL_TIM_HALLSENSOR_Init()
614   tmpcr2 |= TIM_CR2_TI1S;  in LL_TIM_HALLSENSOR_Init()
617   tmpcr2 |= LL_TIM_TRGO_OC2REF;  in LL_TIM_HALLSENSOR_Init()
640   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in LL_TIM_HALLSENSOR_Init()
744   uint32_t tmpcr2;  in OC1Config()  local
759   tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);  in OC1Config()
790     MODIFY_REG(tmpcr2, TIM_CR2_OIS1, TIM_OCInitStruct->OCIdleState);  in OC1Config()
793     MODIFY_REG(tmpcr2, TIM_CR2_OIS1N, TIM_OCInitStruct->OCNIdleState << 1U);  in OC1Config()
797   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in OC1Config()
823   uint32_t tmpcr2;  in OC2Config()  local
838   tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);  in OC2Config()
869     MODIFY_REG(tmpcr2, TIM_CR2_OIS2, TIM_OCInitStruct->OCIdleState << 2U);  in OC2Config()
872     MODIFY_REG(tmpcr2, TIM_CR2_OIS2N, TIM_OCInitStruct->OCNIdleState << 3U);  in OC2Config()
876   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in OC2Config()
902   uint32_t tmpcr2;  in OC3Config()  local
917   tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);  in OC3Config()
948     MODIFY_REG(tmpcr2, TIM_CR2_OIS3, TIM_OCInitStruct->OCIdleState << 4U);  in OC3Config()
951     MODIFY_REG(tmpcr2, TIM_CR2_OIS3N, TIM_OCInitStruct->OCNIdleState << 5U);  in OC3Config()
955   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in OC3Config()
981   uint32_t tmpcr2;  in OC4Config()  local
996   tmpcr2 =  LL_TIM_ReadReg(TIMx, CR2);  in OC4Config()
1018     MODIFY_REG(tmpcr2, TIM_CR2_OIS4, TIM_OCInitStruct->OCIdleState << 6U);  in OC4Config()
1022   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in OC4Config()