292   regs->IFCR = 0x3FU << hdma->StreamIndex;  in HAL_DMA_Init()
362   regs->IFCR = 0x3FU << hdma->StreamIndex;  in HAL_DMA_DeInit()
476     regs->IFCR = 0x3FU << hdma->StreamIndex;  in HAL_DMA_Start_IT()
563     regs->IFCR = 0x3FU << hdma->StreamIndex;  in HAL_DMA_Abort()
639     mask_cpltlevel = DMA_FLAG_TCIF0_4 << hdma->StreamIndex;  in HAL_DMA_PollForTransfer()
644     mask_cpltlevel = DMA_FLAG_HTIF0_4 << hdma->StreamIndex;  in HAL_DMA_PollForTransfer()
673     if((tmpisr & (DMA_FLAG_TEIF0_4 << hdma->StreamIndex)) != RESET)  in HAL_DMA_PollForTransfer()
679       regs->IFCR = DMA_FLAG_TEIF0_4 << hdma->StreamIndex;  in HAL_DMA_PollForTransfer()
682     if((tmpisr & (DMA_FLAG_FEIF0_4 << hdma->StreamIndex)) != RESET)  in HAL_DMA_PollForTransfer()
688       regs->IFCR = DMA_FLAG_FEIF0_4 << hdma->StreamIndex;  in HAL_DMA_PollForTransfer()
691     if((tmpisr & (DMA_FLAG_DMEIF0_4 << hdma->StreamIndex)) != RESET)  in HAL_DMA_PollForTransfer()
697       regs->IFCR = DMA_FLAG_DMEIF0_4 << hdma->StreamIndex;  in HAL_DMA_PollForTransfer()
708       regs->IFCR = (DMA_FLAG_HTIF0_4 | DMA_FLAG_TCIF0_4) << hdma->StreamIndex;  in HAL_DMA_PollForTransfer()
724     regs->IFCR = (DMA_FLAG_HTIF0_4 | DMA_FLAG_TCIF0_4) << hdma->StreamIndex;  in HAL_DMA_PollForTransfer()
734     regs->IFCR = (DMA_FLAG_HTIF0_4) << hdma->StreamIndex;  in HAL_DMA_PollForTransfer()
758   if ((tmpisr & (DMA_FLAG_TEIF0_4 << hdma->StreamIndex)) != RESET)  in HAL_DMA_IRQHandler()
766       regs->IFCR = DMA_FLAG_TEIF0_4 << hdma->StreamIndex;  in HAL_DMA_IRQHandler()
773   if ((tmpisr & (DMA_FLAG_FEIF0_4 << hdma->StreamIndex)) != RESET)  in HAL_DMA_IRQHandler()
778       regs->IFCR = DMA_FLAG_FEIF0_4 << hdma->StreamIndex;  in HAL_DMA_IRQHandler()
785   if ((tmpisr & (DMA_FLAG_DMEIF0_4 << hdma->StreamIndex)) != RESET)  in HAL_DMA_IRQHandler()
790       regs->IFCR = DMA_FLAG_DMEIF0_4 << hdma->StreamIndex;  in HAL_DMA_IRQHandler()
797   if ((tmpisr & (DMA_FLAG_HTIF0_4 << hdma->StreamIndex)) != RESET)  in HAL_DMA_IRQHandler()
802       regs->IFCR = DMA_FLAG_HTIF0_4 << hdma->StreamIndex;  in HAL_DMA_IRQHandler()
844   if ((tmpisr & (DMA_FLAG_TCIF0_4 << hdma->StreamIndex)) != RESET)  in HAL_DMA_IRQHandler()
849       regs->IFCR = DMA_FLAG_TCIF0_4 << hdma->StreamIndex;  in HAL_DMA_IRQHandler()
863         regs->IFCR = 0x3FU << hdma->StreamIndex;  in HAL_DMA_IRQHandler()
1191   hdma->StreamIndex = flagBitshiftOffset[stream_number];  in DMA_CalcBaseAndBitshift()