597   uint32_t tmpccmr1;  in LL_TIM_ENCODER_Init()  local
616   tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);  in LL_TIM_ENCODER_Init()
622   tmpccmr1 &= (uint32_t)~(TIM_CCMR1_CC1S | TIM_CCMR1_IC1F  | TIM_CCMR1_IC1PSC);  in LL_TIM_ENCODER_Init()
623   tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1ActiveInput >> 16U);  in LL_TIM_ENCODER_Init()
624   tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1Filter >> 16U);  in LL_TIM_ENCODER_Init()
625   tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1Prescaler >> 16U);  in LL_TIM_ENCODER_Init()
628   tmpccmr1 &= (uint32_t)~(TIM_CCMR1_CC2S | TIM_CCMR1_IC2F  | TIM_CCMR1_IC2PSC);  in LL_TIM_ENCODER_Init()
629   tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2ActiveInput >> 8U);  in LL_TIM_ENCODER_Init()
630   tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2Filter >> 8U);  in LL_TIM_ENCODER_Init()
631   tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2Prescaler >> 8U);  in LL_TIM_ENCODER_Init()
643   LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);  in LL_TIM_ENCODER_Init()
692   uint32_t tmpccmr1;  in LL_TIM_HALLSENSOR_Init()  local
709   tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);  in LL_TIM_HALLSENSOR_Init()
729   tmpccmr1 &= (uint32_t)~(TIM_CCMR1_CC1S | TIM_CCMR1_IC1F  | TIM_CCMR1_IC1PSC);  in LL_TIM_HALLSENSOR_Init()
730   tmpccmr1 |= (uint32_t)(LL_TIM_ACTIVEINPUT_TRC >> 16U);  in LL_TIM_HALLSENSOR_Init()
731   tmpccmr1 |= (uint32_t)(TIM_HallSensorInitStruct->IC1Filter >> 16U);  in LL_TIM_HALLSENSOR_Init()
732   tmpccmr1 |= (uint32_t)(TIM_HallSensorInitStruct->IC1Prescaler >> 16U);  in LL_TIM_HALLSENSOR_Init()
735   tmpccmr1 &= (uint32_t)~(TIM_CCMR1_OC2M | TIM_CCMR1_OC2FE  | TIM_CCMR1_OC2PE  | TIM_CCMR1_OC2CE);  in LL_TIM_HALLSENSOR_Init()
736   tmpccmr1 |= (uint32_t)(LL_TIM_OCMODE_PWM2 << 8U);  in LL_TIM_HALLSENSOR_Init()
750   LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);  in LL_TIM_HALLSENSOR_Init()
878   uint32_t tmpccmr1;  in OC1Config()  local
898   tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);  in OC1Config()
901   CLEAR_BIT(tmpccmr1, TIM_CCMR1_CC1S);  in OC1Config()
904   MODIFY_REG(tmpccmr1, TIM_CCMR1_OC1M, TIM_OCInitStruct->OCMode);  in OC1Config()
936   LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);  in OC1Config()
957   uint32_t tmpccmr1;  in OC2Config()  local
977   tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);  in OC2Config()
980   CLEAR_BIT(tmpccmr1, TIM_CCMR1_CC2S);  in OC2Config()
983   MODIFY_REG(tmpccmr1, TIM_CCMR1_OC2M, TIM_OCInitStruct->OCMode << 8U);  in OC2Config()
1018   LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);  in OC2Config()