Lines Matching refs:Timing
327 FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank) in FMC_NORSRAM_Timing_Init() argument
333 assert_param(IS_FMC_ADDRESS_SETUP_TIME(Timing->AddressSetupTime)); in FMC_NORSRAM_Timing_Init()
334 assert_param(IS_FMC_ADDRESS_HOLD_TIME(Timing->AddressHoldTime)); in FMC_NORSRAM_Timing_Init()
335 assert_param(IS_FMC_DATASETUP_TIME(Timing->DataSetupTime)); in FMC_NORSRAM_Timing_Init()
336 assert_param(IS_FMC_TURNAROUND_TIME(Timing->BusTurnAroundDuration)); in FMC_NORSRAM_Timing_Init()
337 assert_param(IS_FMC_CLK_DIV(Timing->CLKDivision)); in FMC_NORSRAM_Timing_Init()
338 assert_param(IS_FMC_DATA_LATENCY(Timing->DataLatency)); in FMC_NORSRAM_Timing_Init()
339 assert_param(IS_FMC_ACCESS_MODE(Timing->AccessMode)); in FMC_NORSRAM_Timing_Init()
344 (Timing->AddressSetupTime << FMC_BTRx_ADDSET_Pos) | in FMC_NORSRAM_Timing_Init()
345 (Timing->AddressHoldTime << FMC_BTRx_ADDHLD_Pos) | in FMC_NORSRAM_Timing_Init()
346 (Timing->DataSetupTime << FMC_BTRx_DATAST_Pos) | in FMC_NORSRAM_Timing_Init()
347 (Timing->BusTurnAroundDuration << FMC_BTRx_BUSTURN_Pos) | in FMC_NORSRAM_Timing_Init()
348 ((Timing->CLKDivision - 1U) << FMC_BTRx_CLKDIV_Pos) | in FMC_NORSRAM_Timing_Init()
349 ((Timing->DataLatency - 2U) << FMC_BTRx_DATLAT_Pos) | in FMC_NORSRAM_Timing_Init()
350 Timing->AccessMode; in FMC_NORSRAM_Timing_Init()
356 tmpr |= (uint32_t)(((Timing->CLKDivision) - 1U) << FMC_BTRx_CLKDIV_Pos); in FMC_NORSRAM_Timing_Init()
376 FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank, in FMC_NORSRAM_Extended_Timing_Init() argument
387 assert_param(IS_FMC_ADDRESS_SETUP_TIME(Timing->AddressSetupTime)); in FMC_NORSRAM_Extended_Timing_Init()
388 assert_param(IS_FMC_ADDRESS_HOLD_TIME(Timing->AddressHoldTime)); in FMC_NORSRAM_Extended_Timing_Init()
389 assert_param(IS_FMC_DATASETUP_TIME(Timing->DataSetupTime)); in FMC_NORSRAM_Extended_Timing_Init()
390 assert_param(IS_FMC_ACCESS_MODE(Timing->AccessMode)); in FMC_NORSRAM_Extended_Timing_Init()
394 …MODIFY_REG(Device->BWTR[Bank], BWTR_CLEAR_MASK, (Timing->AddressSetupTime … in FMC_NORSRAM_Extended_Timing_Init()
395 … ((Timing->AddressHoldTime) << FMC_BWTRx_ADDHLD_Pos) | in FMC_NORSRAM_Extended_Timing_Init()
396 … ((Timing->DataSetupTime) << FMC_BWTRx_DATAST_Pos) | in FMC_NORSRAM_Extended_Timing_Init()
397 Timing->AccessMode)); in FMC_NORSRAM_Extended_Timing_Init()
569 … FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank) in FMC_NAND_CommonSpace_Timing_Init() argument
573 assert_param(IS_FMC_SETUP_TIME(Timing->SetupTime)); in FMC_NAND_CommonSpace_Timing_Init()
574 assert_param(IS_FMC_WAIT_TIME(Timing->WaitSetupTime)); in FMC_NAND_CommonSpace_Timing_Init()
575 assert_param(IS_FMC_HOLD_TIME(Timing->HoldSetupTime)); in FMC_NAND_CommonSpace_Timing_Init()
576 assert_param(IS_FMC_HIZ_TIME(Timing->HiZSetupTime)); in FMC_NAND_CommonSpace_Timing_Init()
583 …MODIFY_REG(Device->PMEM2, PMEM_CLEAR_MASK, (Timing->SetupTime … in FMC_NAND_CommonSpace_Timing_Init()
584 … ((Timing->WaitSetupTime) << FMC_PMEMx_MEMWAITx_Pos) | in FMC_NAND_CommonSpace_Timing_Init()
585 … ((Timing->HoldSetupTime) << FMC_PMEMx_MEMHOLDx_Pos) | in FMC_NAND_CommonSpace_Timing_Init()
586 … ((Timing->HiZSetupTime) << FMC_PMEMx_MEMHIZx_Pos))); in FMC_NAND_CommonSpace_Timing_Init()
591 …MODIFY_REG(Device->PMEM3, PMEM_CLEAR_MASK, (Timing->SetupTime … in FMC_NAND_CommonSpace_Timing_Init()
592 … ((Timing->WaitSetupTime) << FMC_PMEMx_MEMWAITx_Pos) | in FMC_NAND_CommonSpace_Timing_Init()
593 … ((Timing->HoldSetupTime) << FMC_PMEMx_MEMHOLDx_Pos) | in FMC_NAND_CommonSpace_Timing_Init()
594 … ((Timing->HiZSetupTime) << FMC_PMEMx_MEMHIZx_Pos))); in FMC_NAND_CommonSpace_Timing_Init()
609 … FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank) in FMC_NAND_AttributeSpace_Timing_Init() argument
613 assert_param(IS_FMC_SETUP_TIME(Timing->SetupTime)); in FMC_NAND_AttributeSpace_Timing_Init()
614 assert_param(IS_FMC_WAIT_TIME(Timing->WaitSetupTime)); in FMC_NAND_AttributeSpace_Timing_Init()
615 assert_param(IS_FMC_HOLD_TIME(Timing->HoldSetupTime)); in FMC_NAND_AttributeSpace_Timing_Init()
616 assert_param(IS_FMC_HIZ_TIME(Timing->HiZSetupTime)); in FMC_NAND_AttributeSpace_Timing_Init()
623 …MODIFY_REG(Device->PATT2, PATT_CLEAR_MASK, (Timing->SetupTime … in FMC_NAND_AttributeSpace_Timing_Init()
624 … ((Timing->WaitSetupTime) << FMC_PATTx_ATTWAITx_Pos) | in FMC_NAND_AttributeSpace_Timing_Init()
625 … ((Timing->HoldSetupTime) << FMC_PATTx_ATTHOLDx_Pos) | in FMC_NAND_AttributeSpace_Timing_Init()
626 … ((Timing->HiZSetupTime) << FMC_PATTx_ATTHIZx_Pos))); in FMC_NAND_AttributeSpace_Timing_Init()
631 …MODIFY_REG(Device->PATT3, PATT_CLEAR_MASK, (Timing->SetupTime … in FMC_NAND_AttributeSpace_Timing_Init()
632 … ((Timing->WaitSetupTime) << FMC_PATTx_ATTWAITx_Pos) | in FMC_NAND_AttributeSpace_Timing_Init()
633 … ((Timing->HoldSetupTime) << FMC_PATTx_ATTHOLDx_Pos) | in FMC_NAND_AttributeSpace_Timing_Init()
634 … ((Timing->HiZSetupTime) << FMC_PATTx_ATTHIZx_Pos))); in FMC_NAND_AttributeSpace_Timing_Init()
883 FMC_NAND_PCC_TimingTypeDef *Timing) in FMC_PCCARD_CommonSpace_Timing_Init() argument
888 assert_param(IS_FMC_SETUP_TIME(Timing->SetupTime)); in FMC_PCCARD_CommonSpace_Timing_Init()
889 assert_param(IS_FMC_WAIT_TIME(Timing->WaitSetupTime)); in FMC_PCCARD_CommonSpace_Timing_Init()
890 assert_param(IS_FMC_HOLD_TIME(Timing->HoldSetupTime)); in FMC_PCCARD_CommonSpace_Timing_Init()
891 assert_param(IS_FMC_HIZ_TIME(Timing->HiZSetupTime)); in FMC_PCCARD_CommonSpace_Timing_Init()
896 (Timing->SetupTime | in FMC_PCCARD_CommonSpace_Timing_Init()
897 ((Timing->WaitSetupTime) << FMC_PMEM4_MEMWAIT4_Pos) | in FMC_PCCARD_CommonSpace_Timing_Init()
898 ((Timing->HoldSetupTime) << FMC_PMEM4_MEMHOLD4_Pos) | in FMC_PCCARD_CommonSpace_Timing_Init()
899 ((Timing->HiZSetupTime) << FMC_PMEM4_MEMHIZ4_Pos))); in FMC_PCCARD_CommonSpace_Timing_Init()
912 FMC_NAND_PCC_TimingTypeDef *Timing) in FMC_PCCARD_AttributeSpace_Timing_Init() argument
917 assert_param(IS_FMC_SETUP_TIME(Timing->SetupTime)); in FMC_PCCARD_AttributeSpace_Timing_Init()
918 assert_param(IS_FMC_WAIT_TIME(Timing->WaitSetupTime)); in FMC_PCCARD_AttributeSpace_Timing_Init()
919 assert_param(IS_FMC_HOLD_TIME(Timing->HoldSetupTime)); in FMC_PCCARD_AttributeSpace_Timing_Init()
920 assert_param(IS_FMC_HIZ_TIME(Timing->HiZSetupTime)); in FMC_PCCARD_AttributeSpace_Timing_Init()
925 (Timing->SetupTime | in FMC_PCCARD_AttributeSpace_Timing_Init()
926 ((Timing->WaitSetupTime) << FMC_PATT4_ATTWAIT4_Pos) | in FMC_PCCARD_AttributeSpace_Timing_Init()
927 ((Timing->HoldSetupTime) << FMC_PATT4_ATTHOLD4_Pos) | in FMC_PCCARD_AttributeSpace_Timing_Init()
928 ((Timing->HiZSetupTime) << FMC_PATT4_ATTHIZ4_Pos))); in FMC_PCCARD_AttributeSpace_Timing_Init()
941 FMC_NAND_PCC_TimingTypeDef *Timing) in FMC_PCCARD_IOSpace_Timing_Init() argument
946 assert_param(IS_FMC_SETUP_TIME(Timing->SetupTime)); in FMC_PCCARD_IOSpace_Timing_Init()
947 assert_param(IS_FMC_WAIT_TIME(Timing->WaitSetupTime)); in FMC_PCCARD_IOSpace_Timing_Init()
948 assert_param(IS_FMC_HOLD_TIME(Timing->HoldSetupTime)); in FMC_PCCARD_IOSpace_Timing_Init()
949 assert_param(IS_FMC_HIZ_TIME(Timing->HiZSetupTime)); in FMC_PCCARD_IOSpace_Timing_Init()
954 (Timing->SetupTime | in FMC_PCCARD_IOSpace_Timing_Init()
955 (Timing->WaitSetupTime << FMC_PIO4_IOWAIT4_Pos) | in FMC_PCCARD_IOSpace_Timing_Init()
956 (Timing->HoldSetupTime << FMC_PIO4_IOHOLD4_Pos) | in FMC_PCCARD_IOSpace_Timing_Init()
957 (Timing->HiZSetupTime << FMC_PIO4_IOHIZ4_Pos))); in FMC_PCCARD_IOSpace_Timing_Init()