504   hi2c->Instance->CR1 |= I2C_CR1_SWRST;  in HAL_I2C_Init()
505   hi2c->Instance->CR1 &= ~I2C_CR1_SWRST;  in HAL_I2C_Init()
533 …MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC | I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode | …  in HAL_I2C_Init()
1073     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Master_Transmit()
1080     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Transmit()
1109           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Master_Transmit()
1143           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Master_Transmit()
1150     SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Master_Transmit()
1194     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Master_Receive()
1201     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Receive()
1225       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Master_Receive()
1230       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Receive()
1236       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Master_Receive()
1241       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Receive()
1244       SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Receive()
1252       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Receive()
1291           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Master_Receive()
1323           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Receive()
1342           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Master_Receive()
1389             CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Receive()
1444     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Slave_Transmit()
1451     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Slave_Transmit()
1464     SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Transmit()
1494         CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Transmit()
1533     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Transmit()
1574     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Slave_Receive()
1581     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Slave_Receive()
1594     SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Receive()
1611         CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Receive()
1644       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Receive()
1653     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Receive()
1706     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Master_Transmit_IT()
1713     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Transmit_IT()
1736     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Master_Transmit_IT()
1783     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Master_Receive_IT()
1790     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Receive_IT()
1815     SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Receive_IT()
1818     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Master_Receive_IT()
1850     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Slave_Transmit_IT()
1857     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Slave_Transmit_IT()
1870     SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Transmit_IT()
1912     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Slave_Receive_IT()
1919     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Slave_Receive_IT()
1932     SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Receive_IT()
1990     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Master_Transmit_DMA()
1997     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Transmit_DMA()
2060         SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Transmit_DMA()
2063         SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Master_Transmit_DMA()
2083       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Transmit_DMA()
2086       SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Master_Transmit_DMA()
2145     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Master_Receive_DMA()
2152     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Receive_DMA()
2202         SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Receive_DMA()
2205         SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Master_Receive_DMA()
2248       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Receive_DMA()
2251       SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Master_Receive_DMA()
2285     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Slave_Transmit_DMA()
2292     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Slave_Transmit_DMA()
2339       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Transmit_DMA()
2399     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Slave_Receive_DMA()
2406     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Slave_Receive_DMA()
2453       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Receive_DMA()
2523     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Mem_Write()
2530     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Mem_Write()
2556           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Mem_Write()
2591         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Mem_Write()
2597     SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Mem_Write()
2646     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Mem_Read()
2653     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Mem_Read()
2677       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Mem_Read()
2682       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Mem_Read()
2688       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Mem_Read()
2693       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Mem_Read()
2696       SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Mem_Read()
2740           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Mem_Read()
2772           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Mem_Read()
2791           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Mem_Read()
2837             CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Mem_Read()
2908     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Mem_Write_IT()
2915     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Mem_Write_IT()
2932     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Mem_Write_IT()
2993     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Mem_Read_IT()
3000     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Mem_Read_IT()
3017     SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Mem_Read_IT()
3020     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Mem_Read_IT()
3088     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Mem_Write_DMA()
3095     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Mem_Write_DMA()
3160           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Mem_Write_DMA()
3269     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Mem_Read_DMA()
3276     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Mem_Read_DMA()
3341           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Mem_Read_DMA()
3355           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Mem_Read_DMA()
3405       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Mem_Read_DMA()
3452     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_IsDeviceReady()
3459     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_IsDeviceReady()
3468       SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_IsDeviceReady()
3473         if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)  in HAL_I2C_IsDeviceReady()
3505         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_IsDeviceReady()
3526         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_IsDeviceReady()
3579 …if ((READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP) || (XferOptions == I2C_FIRST_AND…  in HAL_I2C_Master_Seq_Transmit_IT()
3603     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Master_Seq_Transmit_IT()
3610     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Seq_Transmit_IT()
3630       SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Master_Seq_Transmit_IT()
3675 …if ((READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP) || (XferOptions == I2C_FIRST_AND…  in HAL_I2C_Master_Seq_Transmit_DMA()
3699     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Master_Seq_Transmit_DMA()
3706     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Seq_Transmit_DMA()
3756         SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Seq_Transmit_DMA()
3763           SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Master_Seq_Transmit_DMA()
3802       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Seq_Transmit_DMA()
3809         SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Master_Seq_Transmit_DMA()
3855 …if ((READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP) || (XferOptions == I2C_FIRST_AND…  in HAL_I2C_Master_Seq_Receive_IT()
3879     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Master_Seq_Receive_IT()
3886     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Seq_Receive_IT()
3906         CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Seq_Receive_IT()
3909         SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Seq_Receive_IT()
3917         SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Seq_Receive_IT()
3923       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Seq_Receive_IT()
3931       SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Master_Seq_Receive_IT()
3977 …if ((READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP) || (XferOptions == I2C_FIRST_AND…  in HAL_I2C_Master_Seq_Receive_DMA()
4001     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Master_Seq_Receive_DMA()
4008     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Seq_Receive_DMA()
4033           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Seq_Receive_DMA()
4036           SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Seq_Receive_DMA()
4044           SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Seq_Receive_DMA()
4050         SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Seq_Receive_DMA()
4094           SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Master_Seq_Receive_DMA()
4141       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Seq_Receive_DMA()
4148         SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Master_Seq_Receive_DMA()
4195     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Slave_Seq_Transmit_IT()
4202     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Slave_Seq_Transmit_IT()
4317     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Slave_Seq_Transmit_DMA()
4324     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Slave_Seq_Transmit_DMA()
4369       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Seq_Transmit_DMA()
4435     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Slave_Seq_Receive_IT()
4442     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Slave_Seq_Receive_IT()
4557     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Slave_Seq_Receive_DMA()
4564     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Slave_Seq_Receive_DMA()
4609       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Seq_Receive_DMA()
4662     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_EnableListen_IT()
4669     SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_EnableListen_IT()
4702     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_DisableListen_IT()
4742     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Abort_IT()
4745     SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Master_Abort_IT()
5005         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_ER_IRQHandler()
5290       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_MasterTransmit_TXE()
5395         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_MasterTransmit_BTF()
5469       hi2c->Instance->CR1 |= I2C_CR1_START;  in I2C_MemoryTransmit_TXE_BTF()
5491       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_MemoryTransmit_TXE_BTF()
5553         CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_MasterReceive_RXNE()
5668       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_MasterReceive_BTF()
5686       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_MasterReceive_BTF()
5691       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_MasterReceive_BTF()
5696       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_MasterReceive_BTF()
5868       SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in I2C_Master_ADDR()
5880         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_Master_ADDR()
5887           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_Master_ADDR()
5892             CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_Master_ADDR()
5903             SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_Master_ADDR()
5913             CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_Master_ADDR()
5918             SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_Master_ADDR()
5927           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_Master_ADDR()
5933           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_Master_ADDR()
5941           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_Master_ADDR()
5944           SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in I2C_Master_ADDR()
5949           SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_Master_ADDR()
5964         SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_Master_ADDR()
6181   CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_Slave_STOPF()
6356     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_Slave_AF()
6383     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_Slave_AF()
6417     hi2c->Instance->CR1 &= ~I2C_CR1_POS;  in I2C_ITError()
6582     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in I2C_MasterRequestWrite()
6587     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in I2C_MasterRequestWrite()
6597     if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)  in I2C_MasterRequestWrite()
6649   SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_MasterRequestRead()
6655     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in I2C_MasterRequestRead()
6660     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in I2C_MasterRequestRead()
6670     if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)  in I2C_MasterRequestRead()
6706     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in I2C_MasterRequestRead()
6711       if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)  in I2C_MasterRequestRead()
6746   SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in I2C_RequestMemoryWrite()
6751     if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)  in I2C_RequestMemoryWrite()
6776       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_RequestMemoryWrite()
6799         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_RequestMemoryWrite()
6826   SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_RequestMemoryRead()
6829   SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in I2C_RequestMemoryRead()
6834     if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)  in I2C_RequestMemoryRead()
6859       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_RequestMemoryRead()
6882         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_RequestMemoryRead()
6897       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_RequestMemoryRead()
6903   SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in I2C_RequestMemoryRead()
6908     if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)  in I2C_RequestMemoryRead()
7001       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_DMAXferCplt()
7011       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_DMAXferCplt()
7095     hi2c->Instance->CR1 &= ~I2C_CR1_ACK;  in I2C_DMAError()
7138   while (READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP);  in I2C_DMAAbort()
7151   CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_DMAAbort()
7190       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_DMAAbort()
7265       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_WaitOnMasterAddressFlagUntilTimeout()
7446   while (READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP);  in I2C_WaitOnSTOPRequestThroughIT()