Lines Matching refs:heth
163 static void ETH_MACDMAConfig(ETH_HandleTypeDef *heth, uint32_t err);
164 static void ETH_MACAddressConfig(ETH_HandleTypeDef *heth, uint32_t MacAddr, uint8_t *Addr);
165 static void ETH_MACReceptionEnable(ETH_HandleTypeDef *heth);
166 static void ETH_MACReceptionDisable(ETH_HandleTypeDef *heth);
167 static void ETH_MACTransmissionEnable(ETH_HandleTypeDef *heth);
168 static void ETH_MACTransmissionDisable(ETH_HandleTypeDef *heth);
169 static void ETH_DMATransmissionEnable(ETH_HandleTypeDef *heth);
170 static void ETH_DMATransmissionDisable(ETH_HandleTypeDef *heth);
171 static void ETH_DMAReceptionEnable(ETH_HandleTypeDef *heth);
172 static void ETH_DMAReceptionDisable(ETH_HandleTypeDef *heth);
173 static void ETH_FlushTransmitFIFO(ETH_HandleTypeDef *heth);
176 static void ETH_InitCallbacksToDefault(ETH_HandleTypeDef *heth);
210 HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth) in HAL_ETH_Init() argument
218 if (heth == NULL) in HAL_ETH_Init()
224 assert_param(IS_ETH_AUTONEGOTIATION(heth->Init.AutoNegotiation)); in HAL_ETH_Init()
225 assert_param(IS_ETH_RX_MODE(heth->Init.RxMode)); in HAL_ETH_Init()
226 assert_param(IS_ETH_CHECKSUM_MODE(heth->Init.ChecksumMode)); in HAL_ETH_Init()
227 assert_param(IS_ETH_MEDIA_INTERFACE(heth->Init.MediaInterface)); in HAL_ETH_Init()
229 if (heth->State == HAL_ETH_STATE_RESET) in HAL_ETH_Init()
232 heth->Lock = HAL_UNLOCKED; in HAL_ETH_Init()
234 ETH_InitCallbacksToDefault(heth); in HAL_ETH_Init()
236 if (heth->MspInitCallback == NULL) in HAL_ETH_Init()
239 heth->MspInitCallback = HAL_ETH_MspInit; in HAL_ETH_Init()
241 heth->MspInitCallback(heth); in HAL_ETH_Init()
245 HAL_ETH_MspInit(heth); in HAL_ETH_Init()
254 SYSCFG->PMC |= (uint32_t)heth->Init.MediaInterface; in HAL_ETH_Init()
259 (heth->Instance)->DMABMR |= ETH_DMABMR_SR; in HAL_ETH_Init()
265 while (((heth->Instance)->DMABMR & ETH_DMABMR_SR) != (uint32_t)RESET) in HAL_ETH_Init()
270 heth->State = HAL_ETH_STATE_TIMEOUT; in HAL_ETH_Init()
273 __HAL_UNLOCK(heth); in HAL_ETH_Init()
283 tmpreg1 = (heth->Instance)->MACMIIAR; in HAL_ETH_Init()
313 (heth->Instance)->MACMIIAR = (uint32_t)tmpreg1; in HAL_ETH_Init()
317 if ((HAL_ETH_WritePHYRegister(heth, PHY_BCR, PHY_RESET)) != HAL_OK) in HAL_ETH_Init()
323 ETH_MACDMAConfig(heth, err); in HAL_ETH_Init()
326 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_Init()
335 if ((heth->Init).AutoNegotiation != ETH_AUTONEGOTIATION_DISABLE) in HAL_ETH_Init()
343 HAL_ETH_ReadPHYRegister(heth, PHY_BSR, &phyreg); in HAL_ETH_Init()
352 ETH_MACDMAConfig(heth, err); in HAL_ETH_Init()
354 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_Init()
357 __HAL_UNLOCK(heth); in HAL_ETH_Init()
366 if ((HAL_ETH_WritePHYRegister(heth, PHY_BCR, PHY_AUTONEGOTIATION)) != HAL_OK) in HAL_ETH_Init()
372 ETH_MACDMAConfig(heth, err); in HAL_ETH_Init()
375 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_Init()
387 HAL_ETH_ReadPHYRegister(heth, PHY_BSR, &phyreg); in HAL_ETH_Init()
396 ETH_MACDMAConfig(heth, err); in HAL_ETH_Init()
398 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_Init()
401 __HAL_UNLOCK(heth); in HAL_ETH_Init()
410 if ((HAL_ETH_ReadPHYRegister(heth, PHY_SR, &phyreg)) != HAL_OK) in HAL_ETH_Init()
416 ETH_MACDMAConfig(heth, err); in HAL_ETH_Init()
419 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_Init()
429 (heth->Init).DuplexMode = ETH_MODE_FULLDUPLEX; in HAL_ETH_Init()
434 (heth->Init).DuplexMode = ETH_MODE_HALFDUPLEX; in HAL_ETH_Init()
440 (heth->Init).Speed = ETH_SPEED_10M; in HAL_ETH_Init()
445 (heth->Init).Speed = ETH_SPEED_100M; in HAL_ETH_Init()
451 assert_param(IS_ETH_SPEED(heth->Init.Speed)); in HAL_ETH_Init()
452 assert_param(IS_ETH_DUPLEX_MODE(heth->Init.DuplexMode)); in HAL_ETH_Init()
455 if (HAL_ETH_WritePHYRegister(heth, PHY_BCR, ((uint16_t)((heth->Init).DuplexMode >> 3) | in HAL_ETH_Init()
456 (uint16_t)((heth->Init).Speed >> 1))) != HAL_OK) in HAL_ETH_Init()
462 ETH_MACDMAConfig(heth, err); in HAL_ETH_Init()
465 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_Init()
476 ETH_MACDMAConfig(heth, err); in HAL_ETH_Init()
479 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_Init()
491 HAL_StatusTypeDef HAL_ETH_DeInit(ETH_HandleTypeDef *heth) in HAL_ETH_DeInit() argument
494 heth->State = HAL_ETH_STATE_BUSY; in HAL_ETH_DeInit()
497 if (heth->MspDeInitCallback == NULL) in HAL_ETH_DeInit()
499 heth->MspDeInitCallback = HAL_ETH_MspDeInit; in HAL_ETH_DeInit()
502 heth->MspDeInitCallback(heth); in HAL_ETH_DeInit()
505 HAL_ETH_MspDeInit(heth); in HAL_ETH_DeInit()
509 heth->State = HAL_ETH_STATE_RESET; in HAL_ETH_DeInit()
512 __HAL_UNLOCK(heth); in HAL_ETH_DeInit()
527 HAL_StatusTypeDef HAL_ETH_DMATxDescListInit(ETH_HandleTypeDef *heth, ETH_DMADescTypeDef *DMATxDescT… in HAL_ETH_DMATxDescListInit() argument
533 __HAL_LOCK(heth); in HAL_ETH_DMATxDescListInit()
536 heth->State = HAL_ETH_STATE_BUSY; in HAL_ETH_DMATxDescListInit()
539 heth->TxDesc = DMATxDescTab; in HAL_ETH_DMATxDescListInit()
553 if ((heth->Init).ChecksumMode == ETH_CHECKSUM_BY_HARDWARE) in HAL_ETH_DMATxDescListInit()
573 (heth->Instance)->DMATDLAR = (uint32_t) DMATxDescTab; in HAL_ETH_DMATxDescListInit()
576 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_DMATxDescListInit()
579 __HAL_UNLOCK(heth); in HAL_ETH_DMATxDescListInit()
594 HAL_StatusTypeDef HAL_ETH_DMARxDescListInit(ETH_HandleTypeDef *heth, ETH_DMADescTypeDef *DMARxDescT… in HAL_ETH_DMARxDescListInit() argument
600 __HAL_LOCK(heth); in HAL_ETH_DMARxDescListInit()
603 heth->State = HAL_ETH_STATE_BUSY; in HAL_ETH_DMARxDescListInit()
606 heth->RxDesc = DMARxDescTab; in HAL_ETH_DMARxDescListInit()
623 if ((heth->Init).RxMode == ETH_RXINTERRUPT_MODE) in HAL_ETH_DMARxDescListInit()
643 (heth->Instance)->DMARDLAR = (uint32_t) DMARxDescTab; in HAL_ETH_DMARxDescListInit()
646 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_DMARxDescListInit()
649 __HAL_UNLOCK(heth); in HAL_ETH_DMARxDescListInit()
661 __weak void HAL_ETH_MspInit(ETH_HandleTypeDef *heth) in HAL_ETH_MspInit() argument
664 UNUSED(heth); in HAL_ETH_MspInit()
676 __weak void HAL_ETH_MspDeInit(ETH_HandleTypeDef *heth) in HAL_ETH_MspDeInit() argument
679 UNUSED(heth); in HAL_ETH_MspDeInit()
700 HAL_StatusTypeDef HAL_ETH_RegisterCallback(ETH_HandleTypeDef *heth, HAL_ETH_CallbackIDTypeDef Callb… in HAL_ETH_RegisterCallback() argument
709 __HAL_LOCK(heth); in HAL_ETH_RegisterCallback()
711 if (heth->State == HAL_ETH_STATE_READY) in HAL_ETH_RegisterCallback()
716 heth->TxCpltCallback = pCallback; in HAL_ETH_RegisterCallback()
720 heth->RxCpltCallback = pCallback; in HAL_ETH_RegisterCallback()
724 heth->DMAErrorCallback = pCallback; in HAL_ETH_RegisterCallback()
728 heth->MspInitCallback = pCallback; in HAL_ETH_RegisterCallback()
732 heth->MspDeInitCallback = pCallback; in HAL_ETH_RegisterCallback()
741 else if (heth->State == HAL_ETH_STATE_RESET) in HAL_ETH_RegisterCallback()
746 heth->MspInitCallback = pCallback; in HAL_ETH_RegisterCallback()
750 heth->MspDeInitCallback = pCallback; in HAL_ETH_RegisterCallback()
766 __HAL_UNLOCK(heth); in HAL_ETH_RegisterCallback()
784 HAL_StatusTypeDef HAL_ETH_UnRegisterCallback(ETH_HandleTypeDef *heth, HAL_ETH_CallbackIDTypeDef Cal… in HAL_ETH_UnRegisterCallback() argument
789 __HAL_LOCK(heth); in HAL_ETH_UnRegisterCallback()
791 if (heth->State == HAL_ETH_STATE_READY) in HAL_ETH_UnRegisterCallback()
796 heth->TxCpltCallback = HAL_ETH_TxCpltCallback; in HAL_ETH_UnRegisterCallback()
800 heth->RxCpltCallback = HAL_ETH_RxCpltCallback; in HAL_ETH_UnRegisterCallback()
804 heth->DMAErrorCallback = HAL_ETH_ErrorCallback; in HAL_ETH_UnRegisterCallback()
808 heth->MspInitCallback = HAL_ETH_MspInit; in HAL_ETH_UnRegisterCallback()
812 heth->MspDeInitCallback = HAL_ETH_MspDeInit; in HAL_ETH_UnRegisterCallback()
821 else if (heth->State == HAL_ETH_STATE_RESET) in HAL_ETH_UnRegisterCallback()
826 heth->MspInitCallback = HAL_ETH_MspInit; in HAL_ETH_UnRegisterCallback()
830 heth->MspDeInitCallback = HAL_ETH_MspDeInit; in HAL_ETH_UnRegisterCallback()
846 __HAL_UNLOCK(heth); in HAL_ETH_UnRegisterCallback()
886 HAL_StatusTypeDef HAL_ETH_TransmitFrame(ETH_HandleTypeDef *heth, uint32_t FrameLength) in HAL_ETH_TransmitFrame() argument
891 __HAL_LOCK(heth); in HAL_ETH_TransmitFrame()
894 heth->State = HAL_ETH_STATE_BUSY; in HAL_ETH_TransmitFrame()
899 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_TransmitFrame()
902 __HAL_UNLOCK(heth); in HAL_ETH_TransmitFrame()
908 if (((heth->TxDesc)->Status & ETH_DMATXDESC_OWN) != (uint32_t)RESET) in HAL_ETH_TransmitFrame()
911 heth->State = HAL_ETH_STATE_BUSY_TX; in HAL_ETH_TransmitFrame()
914 __HAL_UNLOCK(heth); in HAL_ETH_TransmitFrame()
935 heth->TxDesc->Status |= ETH_DMATXDESC_FS | ETH_DMATXDESC_LS; in HAL_ETH_TransmitFrame()
937 heth->TxDesc->ControlBufferSize = (FrameLength & ETH_DMATXDESC_TBS1); in HAL_ETH_TransmitFrame()
939 heth->TxDesc->Status |= ETH_DMATXDESC_OWN; in HAL_ETH_TransmitFrame()
941 heth->TxDesc = (ETH_DMADescTypeDef *)(heth->TxDesc->Buffer2NextDescAddr); in HAL_ETH_TransmitFrame()
948 heth->TxDesc->Status &= ~(ETH_DMATXDESC_FS | ETH_DMATXDESC_LS); in HAL_ETH_TransmitFrame()
953 heth->TxDesc->Status |= ETH_DMATXDESC_FS; in HAL_ETH_TransmitFrame()
957 heth->TxDesc->ControlBufferSize = (ETH_TX_BUF_SIZE & ETH_DMATXDESC_TBS1); in HAL_ETH_TransmitFrame()
962 heth->TxDesc->Status |= ETH_DMATXDESC_LS; in HAL_ETH_TransmitFrame()
964 heth->TxDesc->ControlBufferSize = (size & ETH_DMATXDESC_TBS1); in HAL_ETH_TransmitFrame()
968 heth->TxDesc->Status |= ETH_DMATXDESC_OWN; in HAL_ETH_TransmitFrame()
970 heth->TxDesc = (ETH_DMADescTypeDef *)(heth->TxDesc->Buffer2NextDescAddr); in HAL_ETH_TransmitFrame()
975 if (((heth->Instance)->DMASR & ETH_DMASR_TBUS) != (uint32_t)RESET) in HAL_ETH_TransmitFrame()
978 (heth->Instance)->DMASR = ETH_DMASR_TBUS; in HAL_ETH_TransmitFrame()
980 (heth->Instance)->DMATPDR = 0U; in HAL_ETH_TransmitFrame()
984 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_TransmitFrame()
987 __HAL_UNLOCK(heth); in HAL_ETH_TransmitFrame()
999 HAL_StatusTypeDef HAL_ETH_GetReceivedFrame(ETH_HandleTypeDef *heth) in HAL_ETH_GetReceivedFrame() argument
1004 __HAL_LOCK(heth); in HAL_ETH_GetReceivedFrame()
1007 heth->State = HAL_ETH_STATE_BUSY; in HAL_ETH_GetReceivedFrame()
1011 if (((heth->RxDesc->Status & ETH_DMARXDESC_OWN) == (uint32_t)RESET)) in HAL_ETH_GetReceivedFrame()
1014 if (((heth->RxDesc->Status & ETH_DMARXDESC_LS) != (uint32_t)RESET)) in HAL_ETH_GetReceivedFrame()
1017 (heth->RxFrameInfos).SegCount++; in HAL_ETH_GetReceivedFrame()
1020 if ((heth->RxFrameInfos).SegCount == 1U) in HAL_ETH_GetReceivedFrame()
1022 (heth->RxFrameInfos).FSRxDesc = heth->RxDesc; in HAL_ETH_GetReceivedFrame()
1025 heth->RxFrameInfos.LSRxDesc = heth->RxDesc; in HAL_ETH_GetReceivedFrame()
1028 …framelength = (((heth->RxDesc)->Status & ETH_DMARXDESC_FL) >> ETH_DMARXDESC_FRAMELENGTHSHIFT) - 4U; in HAL_ETH_GetReceivedFrame()
1029 heth->RxFrameInfos.length = framelength; in HAL_ETH_GetReceivedFrame()
1032 heth->RxFrameInfos.buffer = ((heth->RxFrameInfos).FSRxDesc)->Buffer1Addr; in HAL_ETH_GetReceivedFrame()
1034 heth->RxDesc = (ETH_DMADescTypeDef *)((heth->RxDesc)->Buffer2NextDescAddr); in HAL_ETH_GetReceivedFrame()
1037 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_GetReceivedFrame()
1040 __HAL_UNLOCK(heth); in HAL_ETH_GetReceivedFrame()
1046 else if ((heth->RxDesc->Status & ETH_DMARXDESC_FS) != (uint32_t)RESET) in HAL_ETH_GetReceivedFrame()
1048 (heth->RxFrameInfos).FSRxDesc = heth->RxDesc; in HAL_ETH_GetReceivedFrame()
1049 (heth->RxFrameInfos).LSRxDesc = NULL; in HAL_ETH_GetReceivedFrame()
1050 (heth->RxFrameInfos).SegCount = 1U; in HAL_ETH_GetReceivedFrame()
1052 heth->RxDesc = (ETH_DMADescTypeDef *)(heth->RxDesc->Buffer2NextDescAddr); in HAL_ETH_GetReceivedFrame()
1057 (heth->RxFrameInfos).SegCount++; in HAL_ETH_GetReceivedFrame()
1059 heth->RxDesc = (ETH_DMADescTypeDef *)(heth->RxDesc->Buffer2NextDescAddr); in HAL_ETH_GetReceivedFrame()
1064 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_GetReceivedFrame()
1067 __HAL_UNLOCK(heth); in HAL_ETH_GetReceivedFrame()
1079 HAL_StatusTypeDef HAL_ETH_GetReceivedFrame_IT(ETH_HandleTypeDef *heth) in HAL_ETH_GetReceivedFrame_IT() argument
1084 __HAL_LOCK(heth); in HAL_ETH_GetReceivedFrame_IT()
1087 heth->State = HAL_ETH_STATE_BUSY; in HAL_ETH_GetReceivedFrame_IT()
1090 …while (((heth->RxDesc->Status & ETH_DMARXDESC_OWN) == (uint32_t)RESET) && (descriptorscancounter <… in HAL_ETH_GetReceivedFrame_IT()
1097 … if ((heth->RxDesc->Status & (ETH_DMARXDESC_FS | ETH_DMARXDESC_LS)) == (uint32_t)ETH_DMARXDESC_FS) in HAL_ETH_GetReceivedFrame_IT()
1099 heth->RxFrameInfos.FSRxDesc = heth->RxDesc; in HAL_ETH_GetReceivedFrame_IT()
1100 heth->RxFrameInfos.SegCount = 1U; in HAL_ETH_GetReceivedFrame_IT()
1102 heth->RxDesc = (ETH_DMADescTypeDef *)(heth->RxDesc->Buffer2NextDescAddr); in HAL_ETH_GetReceivedFrame_IT()
1106 else if ((heth->RxDesc->Status & (ETH_DMARXDESC_LS | ETH_DMARXDESC_FS)) == (uint32_t)RESET) in HAL_ETH_GetReceivedFrame_IT()
1109 (heth->RxFrameInfos.SegCount)++; in HAL_ETH_GetReceivedFrame_IT()
1111 heth->RxDesc = (ETH_DMADescTypeDef *)(heth->RxDesc->Buffer2NextDescAddr); in HAL_ETH_GetReceivedFrame_IT()
1117 heth->RxFrameInfos.LSRxDesc = heth->RxDesc; in HAL_ETH_GetReceivedFrame_IT()
1120 (heth->RxFrameInfos.SegCount)++; in HAL_ETH_GetReceivedFrame_IT()
1123 if ((heth->RxFrameInfos.SegCount) == 1U) in HAL_ETH_GetReceivedFrame_IT()
1125 heth->RxFrameInfos.FSRxDesc = heth->RxDesc; in HAL_ETH_GetReceivedFrame_IT()
1129 …heth->RxFrameInfos.length = (((heth->RxDesc)->Status & ETH_DMARXDESC_FL) >> ETH_DMARXDESC_FRAMELEN… in HAL_ETH_GetReceivedFrame_IT()
1132 heth->RxFrameInfos.buffer = ((heth->RxFrameInfos).FSRxDesc)->Buffer1Addr; in HAL_ETH_GetReceivedFrame_IT()
1135 heth->RxDesc = (ETH_DMADescTypeDef *)(heth->RxDesc->Buffer2NextDescAddr); in HAL_ETH_GetReceivedFrame_IT()
1138 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_GetReceivedFrame_IT()
1141 __HAL_UNLOCK(heth); in HAL_ETH_GetReceivedFrame_IT()
1149 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_GetReceivedFrame_IT()
1152 __HAL_UNLOCK(heth); in HAL_ETH_GetReceivedFrame_IT()
1164 void HAL_ETH_IRQHandler(ETH_HandleTypeDef *heth) in HAL_ETH_IRQHandler() argument
1167 if (__HAL_ETH_DMA_GET_FLAG(heth, ETH_DMA_FLAG_R)) in HAL_ETH_IRQHandler()
1171 heth->RxCpltCallback(heth); in HAL_ETH_IRQHandler()
1174 HAL_ETH_RxCpltCallback(heth); in HAL_ETH_IRQHandler()
1178 __HAL_ETH_DMA_CLEAR_IT(heth, ETH_DMA_IT_R); in HAL_ETH_IRQHandler()
1181 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_IRQHandler()
1184 __HAL_UNLOCK(heth); in HAL_ETH_IRQHandler()
1188 else if (__HAL_ETH_DMA_GET_FLAG(heth, ETH_DMA_FLAG_T)) in HAL_ETH_IRQHandler()
1192 heth->TxCpltCallback(heth); in HAL_ETH_IRQHandler()
1195 HAL_ETH_TxCpltCallback(heth); in HAL_ETH_IRQHandler()
1199 __HAL_ETH_DMA_CLEAR_IT(heth, ETH_DMA_IT_T); in HAL_ETH_IRQHandler()
1202 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_IRQHandler()
1205 __HAL_UNLOCK(heth); in HAL_ETH_IRQHandler()
1209 __HAL_ETH_DMA_CLEAR_IT(heth, ETH_DMA_IT_NIS); in HAL_ETH_IRQHandler()
1212 if (__HAL_ETH_DMA_GET_FLAG(heth, ETH_DMA_FLAG_AIS)) in HAL_ETH_IRQHandler()
1215 heth->DMAErrorCallback(heth); in HAL_ETH_IRQHandler()
1218 HAL_ETH_ErrorCallback(heth); in HAL_ETH_IRQHandler()
1222 __HAL_ETH_DMA_CLEAR_IT(heth, ETH_DMA_FLAG_AIS); in HAL_ETH_IRQHandler()
1225 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_IRQHandler()
1228 __HAL_UNLOCK(heth); in HAL_ETH_IRQHandler()
1238 __weak void HAL_ETH_TxCpltCallback(ETH_HandleTypeDef *heth) in HAL_ETH_TxCpltCallback() argument
1241 UNUSED(heth); in HAL_ETH_TxCpltCallback()
1253 __weak void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *heth) in HAL_ETH_RxCpltCallback() argument
1256 UNUSED(heth); in HAL_ETH_RxCpltCallback()
1268 __weak void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *heth) in HAL_ETH_ErrorCallback() argument
1271 UNUSED(heth); in HAL_ETH_ErrorCallback()
1289 HAL_StatusTypeDef HAL_ETH_ReadPHYRegister(ETH_HandleTypeDef *heth, uint16_t PHYReg, uint32_t *RegVa… in HAL_ETH_ReadPHYRegister() argument
1295 assert_param(IS_ETH_PHY_ADDRESS(heth->Init.PhyAddress)); in HAL_ETH_ReadPHYRegister()
1298 if (heth->State == HAL_ETH_STATE_BUSY_RD) in HAL_ETH_ReadPHYRegister()
1303 heth->State = HAL_ETH_STATE_BUSY_RD; in HAL_ETH_ReadPHYRegister()
1306 tmpreg1 = heth->Instance->MACMIIAR; in HAL_ETH_ReadPHYRegister()
1312 …tmpreg1 |= (((uint32_t)heth->Init.PhyAddress << 11U) & ETH_MACMIIAR_PA); /* Set the PHY device add… in HAL_ETH_ReadPHYRegister()
1318 heth->Instance->MACMIIAR = tmpreg1; in HAL_ETH_ReadPHYRegister()
1329 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_ReadPHYRegister()
1332 __HAL_UNLOCK(heth); in HAL_ETH_ReadPHYRegister()
1337 tmpreg1 = heth->Instance->MACMIIAR; in HAL_ETH_ReadPHYRegister()
1341 *RegValue = (uint16_t)(heth->Instance->MACMIIDR); in HAL_ETH_ReadPHYRegister()
1344 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_ReadPHYRegister()
1361 HAL_StatusTypeDef HAL_ETH_WritePHYRegister(ETH_HandleTypeDef *heth, uint16_t PHYReg, uint32_t RegVa… in HAL_ETH_WritePHYRegister() argument
1367 assert_param(IS_ETH_PHY_ADDRESS(heth->Init.PhyAddress)); in HAL_ETH_WritePHYRegister()
1370 if (heth->State == HAL_ETH_STATE_BUSY_WR) in HAL_ETH_WritePHYRegister()
1375 heth->State = HAL_ETH_STATE_BUSY_WR; in HAL_ETH_WritePHYRegister()
1378 tmpreg1 = heth->Instance->MACMIIAR; in HAL_ETH_WritePHYRegister()
1384 …tmpreg1 |= (((uint32_t)heth->Init.PhyAddress << 11U) & ETH_MACMIIAR_PA); /* Set the PHY device add… in HAL_ETH_WritePHYRegister()
1390 heth->Instance->MACMIIDR = (uint16_t)RegValue; in HAL_ETH_WritePHYRegister()
1393 heth->Instance->MACMIIAR = tmpreg1; in HAL_ETH_WritePHYRegister()
1404 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_WritePHYRegister()
1407 __HAL_UNLOCK(heth); in HAL_ETH_WritePHYRegister()
1412 tmpreg1 = heth->Instance->MACMIIAR; in HAL_ETH_WritePHYRegister()
1416 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_WritePHYRegister()
1453 HAL_StatusTypeDef HAL_ETH_Start(ETH_HandleTypeDef *heth) in HAL_ETH_Start() argument
1456 __HAL_LOCK(heth); in HAL_ETH_Start()
1459 heth->State = HAL_ETH_STATE_BUSY; in HAL_ETH_Start()
1462 ETH_MACTransmissionEnable(heth); in HAL_ETH_Start()
1465 ETH_MACReceptionEnable(heth); in HAL_ETH_Start()
1468 ETH_FlushTransmitFIFO(heth); in HAL_ETH_Start()
1471 ETH_DMATransmissionEnable(heth); in HAL_ETH_Start()
1474 ETH_DMAReceptionEnable(heth); in HAL_ETH_Start()
1477 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_Start()
1480 __HAL_UNLOCK(heth); in HAL_ETH_Start()
1492 HAL_StatusTypeDef HAL_ETH_Stop(ETH_HandleTypeDef *heth) in HAL_ETH_Stop() argument
1495 __HAL_LOCK(heth); in HAL_ETH_Stop()
1498 heth->State = HAL_ETH_STATE_BUSY; in HAL_ETH_Stop()
1501 ETH_DMATransmissionDisable(heth); in HAL_ETH_Stop()
1504 ETH_DMAReceptionDisable(heth); in HAL_ETH_Stop()
1507 ETH_MACReceptionDisable(heth); in HAL_ETH_Stop()
1510 ETH_FlushTransmitFIFO(heth); in HAL_ETH_Stop()
1513 ETH_MACTransmissionDisable(heth); in HAL_ETH_Stop()
1516 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_Stop()
1519 __HAL_UNLOCK(heth); in HAL_ETH_Stop()
1532 HAL_StatusTypeDef HAL_ETH_ConfigMAC(ETH_HandleTypeDef *heth, ETH_MACInitTypeDef *macconf) in HAL_ETH_ConfigMAC() argument
1537 __HAL_LOCK(heth); in HAL_ETH_ConfigMAC()
1540 heth->State = HAL_ETH_STATE_BUSY; in HAL_ETH_ConfigMAC()
1542 assert_param(IS_ETH_SPEED(heth->Init.Speed)); in HAL_ETH_ConfigMAC()
1543 assert_param(IS_ETH_DUPLEX_MODE(heth->Init.DuplexMode)); in HAL_ETH_ConfigMAC()
1578 tmpreg1 = (heth->Instance)->MACCR; in HAL_ETH_ConfigMAC()
1586 (heth->Init).Speed | in HAL_ETH_ConfigMAC()
1589 (heth->Init).DuplexMode | in HAL_ETH_ConfigMAC()
1597 (heth->Instance)->MACCR = (uint32_t)tmpreg1; in HAL_ETH_ConfigMAC()
1601 tmpreg1 = (heth->Instance)->MACCR; in HAL_ETH_ConfigMAC()
1603 (heth->Instance)->MACCR = tmpreg1; in HAL_ETH_ConfigMAC()
1607 (heth->Instance)->MACFFR = (uint32_t)(macconf->ReceiveAll | in HAL_ETH_ConfigMAC()
1618 tmpreg1 = (heth->Instance)->MACFFR; in HAL_ETH_ConfigMAC()
1620 (heth->Instance)->MACFFR = tmpreg1; in HAL_ETH_ConfigMAC()
1624 (heth->Instance)->MACHTHR = (uint32_t)macconf->HashTableHigh; in HAL_ETH_ConfigMAC()
1627 (heth->Instance)->MACHTLR = (uint32_t)macconf->HashTableLow; in HAL_ETH_ConfigMAC()
1631 tmpreg1 = (heth->Instance)->MACFCR; in HAL_ETH_ConfigMAC()
1643 (heth->Instance)->MACFCR = (uint32_t)tmpreg1; in HAL_ETH_ConfigMAC()
1647 tmpreg1 = (heth->Instance)->MACFCR; in HAL_ETH_ConfigMAC()
1649 (heth->Instance)->MACFCR = tmpreg1; in HAL_ETH_ConfigMAC()
1652 (heth->Instance)->MACVLANTR = (uint32_t)(macconf->VLANTagComparison | in HAL_ETH_ConfigMAC()
1657 tmpreg1 = (heth->Instance)->MACVLANTR; in HAL_ETH_ConfigMAC()
1659 (heth->Instance)->MACVLANTR = tmpreg1; in HAL_ETH_ConfigMAC()
1665 tmpreg1 = (heth->Instance)->MACCR; in HAL_ETH_ConfigMAC()
1670 tmpreg1 |= (uint32_t)(heth->Init.Speed | heth->Init.DuplexMode); in HAL_ETH_ConfigMAC()
1673 (heth->Instance)->MACCR = (uint32_t)tmpreg1; in HAL_ETH_ConfigMAC()
1677 tmpreg1 = (heth->Instance)->MACCR; in HAL_ETH_ConfigMAC()
1679 (heth->Instance)->MACCR = tmpreg1; in HAL_ETH_ConfigMAC()
1683 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_ConfigMAC()
1686 __HAL_UNLOCK(heth); in HAL_ETH_ConfigMAC()
1699 HAL_StatusTypeDef HAL_ETH_ConfigDMA(ETH_HandleTypeDef *heth, ETH_DMAInitTypeDef *dmaconf) in HAL_ETH_ConfigDMA() argument
1704 __HAL_LOCK(heth); in HAL_ETH_ConfigDMA()
1707 heth->State = HAL_ETH_STATE_BUSY; in HAL_ETH_ConfigDMA()
1729 tmpreg1 = (heth->Instance)->DMAOMR; in HAL_ETH_ConfigDMA()
1744 (heth->Instance)->DMAOMR = (uint32_t)tmpreg1; in HAL_ETH_ConfigDMA()
1748 tmpreg1 = (heth->Instance)->DMAOMR; in HAL_ETH_ConfigDMA()
1750 (heth->Instance)->DMAOMR = tmpreg1; in HAL_ETH_ConfigDMA()
1753 (heth->Instance)->DMABMR = (uint32_t)(dmaconf->AddressAlignedBeats | in HAL_ETH_ConfigDMA()
1764 tmpreg1 = (heth->Instance)->DMABMR; in HAL_ETH_ConfigDMA()
1766 (heth->Instance)->DMABMR = tmpreg1; in HAL_ETH_ConfigDMA()
1769 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_ConfigDMA()
1772 __HAL_UNLOCK(heth); in HAL_ETH_ConfigDMA()
1806 HAL_ETH_StateTypeDef HAL_ETH_GetState(ETH_HandleTypeDef *heth) in HAL_ETH_GetState() argument
1809 return heth->State; in HAL_ETH_GetState()
1831 static void ETH_MACDMAConfig(ETH_HandleTypeDef *heth, uint32_t err) in ETH_MACDMAConfig() argument
1840 (heth->Init).DuplexMode = ETH_MODE_FULLDUPLEX; in ETH_MACDMAConfig()
1843 (heth->Init).Speed = ETH_SPEED_100M; in ETH_MACDMAConfig()
1853 if (heth->Init.ChecksumMode == ETH_CHECKSUM_BY_HARDWARE) in ETH_MACDMAConfig()
1886 tmpreg1 = (heth->Instance)->MACCR; in ETH_MACDMAConfig()
1906 (heth->Init).Speed | in ETH_MACDMAConfig()
1909 (heth->Init).DuplexMode | in ETH_MACDMAConfig()
1917 (heth->Instance)->MACCR = (uint32_t)tmpreg1; in ETH_MACDMAConfig()
1921 tmpreg1 = (heth->Instance)->MACCR; in ETH_MACDMAConfig()
1923 (heth->Instance)->MACCR = tmpreg1; in ETH_MACDMAConfig()
1935 (heth->Instance)->MACFFR = (uint32_t)(macinit.ReceiveAll | in ETH_MACDMAConfig()
1946 tmpreg1 = (heth->Instance)->MACFFR; in ETH_MACDMAConfig()
1948 (heth->Instance)->MACFFR = tmpreg1; in ETH_MACDMAConfig()
1952 (heth->Instance)->MACHTHR = (uint32_t)macinit.HashTableHigh; in ETH_MACDMAConfig()
1955 (heth->Instance)->MACHTLR = (uint32_t)macinit.HashTableLow; in ETH_MACDMAConfig()
1959 tmpreg1 = (heth->Instance)->MACFCR; in ETH_MACDMAConfig()
1977 (heth->Instance)->MACFCR = (uint32_t)tmpreg1; in ETH_MACDMAConfig()
1981 tmpreg1 = (heth->Instance)->MACFCR; in ETH_MACDMAConfig()
1983 (heth->Instance)->MACFCR = tmpreg1; in ETH_MACDMAConfig()
1988 (heth->Instance)->MACVLANTR = (uint32_t)(macinit.VLANTagComparison | in ETH_MACDMAConfig()
1993 tmpreg1 = (heth->Instance)->MACVLANTR; in ETH_MACDMAConfig()
1995 (heth->Instance)->MACVLANTR = tmpreg1; in ETH_MACDMAConfig()
2016 tmpreg1 = (heth->Instance)->DMAOMR; in ETH_MACDMAConfig()
2040 (heth->Instance)->DMAOMR = (uint32_t)tmpreg1; in ETH_MACDMAConfig()
2044 tmpreg1 = (heth->Instance)->DMAOMR; in ETH_MACDMAConfig()
2046 (heth->Instance)->DMAOMR = tmpreg1; in ETH_MACDMAConfig()
2056 (heth->Instance)->DMABMR = (uint32_t)(dmainit.AddressAlignedBeats | in ETH_MACDMAConfig()
2067 tmpreg1 = (heth->Instance)->DMABMR; in ETH_MACDMAConfig()
2069 (heth->Instance)->DMABMR = tmpreg1; in ETH_MACDMAConfig()
2071 if ((heth->Init).RxMode == ETH_RXINTERRUPT_MODE) in ETH_MACDMAConfig()
2074 __HAL_ETH_DMA_ENABLE_IT((heth), ETH_DMA_IT_NIS | ETH_DMA_IT_R); in ETH_MACDMAConfig()
2078 ETH_MACAddressConfig(heth, ETH_MAC_ADDRESS0, heth->Init.MACAddr); in ETH_MACDMAConfig()
2094 static void ETH_MACAddressConfig(ETH_HandleTypeDef *heth, uint32_t MacAddr, uint8_t *Addr) in ETH_MACAddressConfig() argument
2099 UNUSED(heth); in ETH_MACAddressConfig()
2121 static void ETH_MACTransmissionEnable(ETH_HandleTypeDef *heth) in ETH_MACTransmissionEnable() argument
2126 (heth->Instance)->MACCR |= ETH_MACCR_TE; in ETH_MACTransmissionEnable()
2130 tmpreg1 = (heth->Instance)->MACCR; in ETH_MACTransmissionEnable()
2132 (heth->Instance)->MACCR = tmpreg1; in ETH_MACTransmissionEnable()
2141 static void ETH_MACTransmissionDisable(ETH_HandleTypeDef *heth) in ETH_MACTransmissionDisable() argument
2146 (heth->Instance)->MACCR &= ~ETH_MACCR_TE; in ETH_MACTransmissionDisable()
2150 tmpreg1 = (heth->Instance)->MACCR; in ETH_MACTransmissionDisable()
2152 (heth->Instance)->MACCR = tmpreg1; in ETH_MACTransmissionDisable()
2161 static void ETH_MACReceptionEnable(ETH_HandleTypeDef *heth) in ETH_MACReceptionEnable() argument
2166 (heth->Instance)->MACCR |= ETH_MACCR_RE; in ETH_MACReceptionEnable()
2170 tmpreg1 = (heth->Instance)->MACCR; in ETH_MACReceptionEnable()
2172 (heth->Instance)->MACCR = tmpreg1; in ETH_MACReceptionEnable()
2181 static void ETH_MACReceptionDisable(ETH_HandleTypeDef *heth) in ETH_MACReceptionDisable() argument
2186 (heth->Instance)->MACCR &= ~ETH_MACCR_RE; in ETH_MACReceptionDisable()
2190 tmpreg1 = (heth->Instance)->MACCR; in ETH_MACReceptionDisable()
2192 (heth->Instance)->MACCR = tmpreg1; in ETH_MACReceptionDisable()
2201 static void ETH_DMATransmissionEnable(ETH_HandleTypeDef *heth) in ETH_DMATransmissionEnable() argument
2204 (heth->Instance)->DMAOMR |= ETH_DMAOMR_ST; in ETH_DMATransmissionEnable()
2213 static void ETH_DMATransmissionDisable(ETH_HandleTypeDef *heth) in ETH_DMATransmissionDisable() argument
2216 (heth->Instance)->DMAOMR &= ~ETH_DMAOMR_ST; in ETH_DMATransmissionDisable()
2225 static void ETH_DMAReceptionEnable(ETH_HandleTypeDef *heth) in ETH_DMAReceptionEnable() argument
2228 (heth->Instance)->DMAOMR |= ETH_DMAOMR_SR; in ETH_DMAReceptionEnable()
2237 static void ETH_DMAReceptionDisable(ETH_HandleTypeDef *heth) in ETH_DMAReceptionDisable() argument
2240 (heth->Instance)->DMAOMR &= ~ETH_DMAOMR_SR; in ETH_DMAReceptionDisable()
2249 static void ETH_FlushTransmitFIFO(ETH_HandleTypeDef *heth) in ETH_FlushTransmitFIFO() argument
2254 (heth->Instance)->DMAOMR |= ETH_DMAOMR_FTF; in ETH_FlushTransmitFIFO()
2258 tmpreg1 = (heth->Instance)->DMAOMR; in ETH_FlushTransmitFIFO()
2260 (heth->Instance)->DMAOMR = tmpreg1; in ETH_FlushTransmitFIFO()
2279 static void ETH_InitCallbacksToDefault(ETH_HandleTypeDef *heth) in ETH_InitCallbacksToDefault() argument
2282 heth->TxCpltCallback = HAL_ETH_TxCpltCallback; /* Legacy weak TxCpltCallback */ in ETH_InitCallbacksToDefault()
2283 heth->RxCpltCallback = HAL_ETH_RxCpltCallback; /* Legacy weak RxCpltCallback */ in ETH_InitCallbacksToDefault()
2284 heth->DMAErrorCallback = HAL_ETH_ErrorCallback; /* Legacy weak DMAErrorCallback */ in ETH_InitCallbacksToDefault()