Lines Matching refs:AHB1LPENR

1220 #define __HAL_RCC_GPIOA_CLK_SLEEP_ENABLE()           (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIOALPEN))
1221 #define __HAL_RCC_GPIOB_CLK_SLEEP_ENABLE()           (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIOBLPEN))
1222 #define __HAL_RCC_GPIOC_CLK_SLEEP_ENABLE()           (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIOCLPEN))
1223 #define __HAL_RCC_GPIOD_CLK_SLEEP_ENABLE()           (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIODLPEN))
1224 #define __HAL_RCC_GPIOE_CLK_SLEEP_ENABLE()           (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIOELPEN))
1225 #define __HAL_RCC_GPIOF_CLK_SLEEP_ENABLE()           (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIOFLPEN))
1226 #define __HAL_RCC_GPIOG_CLK_SLEEP_ENABLE()           (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIOGLPEN))
1227 #define __HAL_RCC_GPIOH_CLK_SLEEP_ENABLE()           (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIOHLPEN))
1228 #define __HAL_RCC_GPIOI_CLK_SLEEP_ENABLE()           (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIOILPEN))
1229 #define __HAL_RCC_CRC_CLK_SLEEP_ENABLE()             (RCC->AHB1LPENR |= (RCC_AHB1LPENR_CRCLPEN))
1230 #define __HAL_RCC_FLITF_CLK_SLEEP_ENABLE()           (RCC->AHB1LPENR |= (RCC_AHB1LPENR_FLITFLPEN))
1231 #define __HAL_RCC_SRAM1_CLK_SLEEP_ENABLE()           (RCC->AHB1LPENR |= (RCC_AHB1LPENR_SRAM1LPEN))
1232 #define __HAL_RCC_SRAM2_CLK_SLEEP_ENABLE()           (RCC->AHB1LPENR |= (RCC_AHB1LPENR_SRAM2LPEN))
1233 #define __HAL_RCC_BKPSRAM_CLK_SLEEP_ENABLE()         (RCC->AHB1LPENR |= (RCC_AHB1LPENR_BKPSRAMLPEN))
1234 #define __HAL_RCC_DMA1_CLK_SLEEP_ENABLE()            (RCC->AHB1LPENR |= (RCC_AHB1LPENR_DMA1LPEN))
1235 #define __HAL_RCC_DMA2_CLK_SLEEP_ENABLE()            (RCC->AHB1LPENR |= (RCC_AHB1LPENR_DMA2LPEN))
1236 #define __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE()      (RCC->AHB1LPENR |= (RCC_AHB1LPENR_OTGHSLPEN))
1237 #define __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_OTGHSULPILPE…
1239 #define __HAL_RCC_GPIOA_CLK_SLEEP_DISABLE()           (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIOALPEN))
1240 #define __HAL_RCC_GPIOB_CLK_SLEEP_DISABLE()           (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIOBLPEN))
1241 #define __HAL_RCC_GPIOC_CLK_SLEEP_DISABLE()           (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIOCLPEN))
1242 #define __HAL_RCC_GPIOD_CLK_SLEEP_DISABLE()           (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIODLPEN))
1243 #define __HAL_RCC_GPIOE_CLK_SLEEP_DISABLE()           (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIOELPEN))
1244 #define __HAL_RCC_GPIOF_CLK_SLEEP_DISABLE()           (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIOFLPEN))
1245 #define __HAL_RCC_GPIOG_CLK_SLEEP_DISABLE()           (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIOGLPEN))
1246 #define __HAL_RCC_GPIOH_CLK_SLEEP_DISABLE()           (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIOHLPEN))
1247 #define __HAL_RCC_GPIOI_CLK_SLEEP_DISABLE()           (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIOILPEN))
1248 #define __HAL_RCC_CRC_CLK_SLEEP_DISABLE()             (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_CRCLPEN))
1249 #define __HAL_RCC_FLITF_CLK_SLEEP_DISABLE()           (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_FLITFLPEN))
1250 #define __HAL_RCC_SRAM1_CLK_SLEEP_DISABLE()           (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_SRAM1LPEN))
1251 #define __HAL_RCC_SRAM2_CLK_SLEEP_DISABLE()           (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_SRAM2LPEN))
1252 #define __HAL_RCC_BKPSRAM_CLK_SLEEP_DISABLE()         (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_BKPSRAMLPE…
1253 #define __HAL_RCC_DMA1_CLK_SLEEP_DISABLE()            (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_DMA1LPEN))
1254 #define __HAL_RCC_DMA2_CLK_SLEEP_DISABLE()            (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_DMA2LPEN))
1255 #define __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE()      (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_OTGHSLPEN))
1256 #define __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_OTGHSULPIL…