Lines Matching refs:AHBPERIPH_BASE
612 #define AHBPERIPH_BASE (PERIPH_BASE + 0x00020000UL) macro
654 #define DMA1_BASE (AHBPERIPH_BASE + 0x00000000UL)
655 #define DMA1_Channel1_BASE (AHBPERIPH_BASE + 0x00000008UL)
656 #define DMA1_Channel2_BASE (AHBPERIPH_BASE + 0x0000001CUL)
657 #define DMA1_Channel3_BASE (AHBPERIPH_BASE + 0x00000030UL)
658 #define DMA1_Channel4_BASE (AHBPERIPH_BASE + 0x00000044UL)
659 #define DMA1_Channel5_BASE (AHBPERIPH_BASE + 0x00000058UL)
660 #define DMA1_Channel6_BASE (AHBPERIPH_BASE + 0x0000006CUL)
661 #define DMA1_Channel7_BASE (AHBPERIPH_BASE + 0x00000080UL)
662 #define DMA2_BASE (AHBPERIPH_BASE + 0x00000400UL)
663 #define DMA2_Channel1_BASE (AHBPERIPH_BASE + 0x00000408UL)
664 #define DMA2_Channel2_BASE (AHBPERIPH_BASE + 0x0000041CUL)
665 #define DMA2_Channel3_BASE (AHBPERIPH_BASE + 0x00000430UL)
666 #define DMA2_Channel4_BASE (AHBPERIPH_BASE + 0x00000444UL)
667 #define DMA2_Channel5_BASE (AHBPERIPH_BASE + 0x00000458UL)
668 #define RCC_BASE (AHBPERIPH_BASE + 0x00001000UL)
669 #define CRC_BASE (AHBPERIPH_BASE + 0x00003000UL)
671 #define FLASH_R_BASE (AHBPERIPH_BASE + 0x00002000UL) /*!< Flash registers base address */