Lines Matching refs:AHBPERIPH_BASE
479 #define AHBPERIPH_BASE (PERIPH_BASE + 0x00020000UL) macro
506 #define DMA1_BASE (AHBPERIPH_BASE + 0x00000000UL)
507 #define DMA1_Channel1_BASE (AHBPERIPH_BASE + 0x00000008UL)
508 #define DMA1_Channel2_BASE (AHBPERIPH_BASE + 0x0000001CUL)
509 #define DMA1_Channel3_BASE (AHBPERIPH_BASE + 0x00000030UL)
510 #define DMA1_Channel4_BASE (AHBPERIPH_BASE + 0x00000044UL)
511 #define DMA1_Channel5_BASE (AHBPERIPH_BASE + 0x00000058UL)
512 #define DMA1_Channel6_BASE (AHBPERIPH_BASE + 0x0000006CUL)
513 #define DMA1_Channel7_BASE (AHBPERIPH_BASE + 0x00000080UL)
514 #define RCC_BASE (AHBPERIPH_BASE + 0x00001000UL)
515 #define CRC_BASE (AHBPERIPH_BASE + 0x00003000UL)
517 #define FLASH_R_BASE (AHBPERIPH_BASE + 0x00002000UL) /*!< Flash registers base address */