605   uint32_t tmpcr2;  in LL_TIM_HALLSENSOR_Init()  local
620   tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);  in LL_TIM_HALLSENSOR_Init()
632   tmpcr2 |= TIM_CR2_TI1S;  in LL_TIM_HALLSENSOR_Init()
635   tmpcr2 |= LL_TIM_TRGO_OC2REF;  in LL_TIM_HALLSENSOR_Init()
658   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in LL_TIM_HALLSENSOR_Init()
762   uint32_t tmpcr2;  in OC1Config()  local
777   tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);  in OC1Config()
808     MODIFY_REG(tmpcr2, TIM_CR2_OIS1, TIM_OCInitStruct->OCIdleState);  in OC1Config()
811     MODIFY_REG(tmpcr2, TIM_CR2_OIS1N, TIM_OCInitStruct->OCNIdleState << 1U);  in OC1Config()
815   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in OC1Config()
841   uint32_t tmpcr2;  in OC2Config()  local
856   tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);  in OC2Config()
887     MODIFY_REG(tmpcr2, TIM_CR2_OIS2, TIM_OCInitStruct->OCIdleState << 2U);  in OC2Config()
890     MODIFY_REG(tmpcr2, TIM_CR2_OIS2N, TIM_OCInitStruct->OCNIdleState << 3U);  in OC2Config()
894   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in OC2Config()
920   uint32_t tmpcr2;  in OC3Config()  local
935   tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);  in OC3Config()
966     MODIFY_REG(tmpcr2, TIM_CR2_OIS3, TIM_OCInitStruct->OCIdleState << 4U);  in OC3Config()
969     MODIFY_REG(tmpcr2, TIM_CR2_OIS3N, TIM_OCInitStruct->OCNIdleState << 5U);  in OC3Config()
973   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in OC3Config()
999   uint32_t tmpcr2;  in OC4Config()  local
1014   tmpcr2 =  LL_TIM_ReadReg(TIMx, CR2);  in OC4Config()
1036     MODIFY_REG(tmpcr2, TIM_CR2_OIS4, TIM_OCInitStruct->OCIdleState << 6U);  in OC4Config()
1040   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in OC4Config()