522   hi2c->Instance->CR1 |= I2C_CR1_SWRST;  in HAL_I2C_Init()
523   hi2c->Instance->CR1 &= ~I2C_CR1_SWRST;  in HAL_I2C_Init()
551 …MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC | I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode | …  in HAL_I2C_Init()
1091     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Master_Transmit()
1098     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Transmit()
1127           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Master_Transmit()
1161           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Master_Transmit()
1168     SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Master_Transmit()
1214     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Master_Receive()
1221     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Receive()
1245       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Master_Receive()
1250       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Receive()
1260       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Master_Receive()
1268       SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Receive()
1278       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Receive()
1286       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Receive()
1329           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Master_Receive()
1364           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Receive()
1404           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Master_Receive()
1454             CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Receive()
1509     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Slave_Transmit()
1516     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Slave_Transmit()
1529     SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Transmit()
1559         CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Transmit()
1598     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Transmit()
1639     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Slave_Receive()
1646     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Slave_Receive()
1659     SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Receive()
1676         CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Receive()
1709       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Receive()
1718     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Receive()
1771     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Master_Transmit_IT()
1778     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Transmit_IT()
1801     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Master_Transmit_IT()
1848     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Master_Receive_IT()
1855     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Receive_IT()
1880     SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Receive_IT()
1883     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Master_Receive_IT()
1915     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Slave_Transmit_IT()
1922     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Slave_Transmit_IT()
1935     SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Transmit_IT()
1977     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Slave_Receive_IT()
1984     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Slave_Receive_IT()
1997     SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Receive_IT()
2055     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Master_Transmit_DMA()
2062     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Transmit_DMA()
2123         SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Transmit_DMA()
2126         SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Master_Transmit_DMA()
2146       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Transmit_DMA()
2149       SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Master_Transmit_DMA()
2208     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Master_Receive_DMA()
2215     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Receive_DMA()
2263         SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Receive_DMA()
2266         SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Master_Receive_DMA()
2309       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Receive_DMA()
2312       SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Master_Receive_DMA()
2346     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Slave_Transmit_DMA()
2353     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Slave_Transmit_DMA()
2398       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Transmit_DMA()
2458     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Slave_Receive_DMA()
2465     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Slave_Receive_DMA()
2510       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Receive_DMA()
2580     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Mem_Write()
2587     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Mem_Write()
2613           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Mem_Write()
2648         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Mem_Write()
2654     SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Mem_Write()
2705     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Mem_Read()
2712     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Mem_Read()
2736       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Mem_Read()
2741       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Mem_Read()
2751       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Mem_Read()
2759       SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Mem_Read()
2769       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Mem_Read()
2777       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Mem_Read()
2819           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Mem_Read()
2854           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Mem_Read()
2894           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Mem_Read()
2943             CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Mem_Read()
3014     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Mem_Write_IT()
3021     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Mem_Write_IT()
3038     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Mem_Write_IT()
3099     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Mem_Read_IT()
3106     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Mem_Read_IT()
3123     SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Mem_Read_IT()
3126     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Mem_Read_IT()
3194     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Mem_Write_DMA()
3201     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Mem_Write_DMA()
3264           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Mem_Write_DMA()
3373     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Mem_Read_DMA()
3380     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Mem_Read_DMA()
3443           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Mem_Read_DMA()
3457           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Mem_Read_DMA()
3507       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Mem_Read_DMA()
3554     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_IsDeviceReady()
3561     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_IsDeviceReady()
3570       SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_IsDeviceReady()
3575         if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)  in HAL_I2C_IsDeviceReady()
3607         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_IsDeviceReady()
3628         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_IsDeviceReady()
3681 …if ((READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP) || (XferOptions == I2C_FIRST_AND…  in HAL_I2C_Master_Seq_Transmit_IT()
3705     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Master_Seq_Transmit_IT()
3712     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Seq_Transmit_IT()
3732       SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Master_Seq_Transmit_IT()
3777 …if ((READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP) || (XferOptions == I2C_FIRST_AND…  in HAL_I2C_Master_Seq_Transmit_DMA()
3801     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Master_Seq_Transmit_DMA()
3808     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Seq_Transmit_DMA()
3858         SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Seq_Transmit_DMA()
3865           SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Master_Seq_Transmit_DMA()
3904       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Seq_Transmit_DMA()
3911         SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Master_Seq_Transmit_DMA()
3957 …if ((READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP) || (XferOptions == I2C_FIRST_AND…  in HAL_I2C_Master_Seq_Receive_IT()
3981     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Master_Seq_Receive_IT()
3988     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Seq_Receive_IT()
4008         CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Seq_Receive_IT()
4011         SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Seq_Receive_IT()
4019         SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Seq_Receive_IT()
4025       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Seq_Receive_IT()
4033       SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Master_Seq_Receive_IT()
4079 …if ((READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP) || (XferOptions == I2C_FIRST_AND…  in HAL_I2C_Master_Seq_Receive_DMA()
4103     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Master_Seq_Receive_DMA()
4110     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Seq_Receive_DMA()
4135           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Seq_Receive_DMA()
4138           SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Seq_Receive_DMA()
4146           SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Seq_Receive_DMA()
4152         SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Seq_Receive_DMA()
4196           SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Master_Seq_Receive_DMA()
4243       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Seq_Receive_DMA()
4250         SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Master_Seq_Receive_DMA()
4297     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Slave_Seq_Transmit_IT()
4304     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Slave_Seq_Transmit_IT()
4419     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Slave_Seq_Transmit_DMA()
4426     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Slave_Seq_Transmit_DMA()
4471       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Seq_Transmit_DMA()
4537     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Slave_Seq_Receive_IT()
4544     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Slave_Seq_Receive_IT()
4659     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Slave_Seq_Receive_DMA()
4666     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Slave_Seq_Receive_DMA()
4711       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Seq_Receive_DMA()
4764     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_EnableListen_IT()
4771     SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_EnableListen_IT()
4804     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_DisableListen_IT()
4844     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Abort_IT()
4847     SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Master_Abort_IT()
5074     SET_BIT(hi2c->Instance->CR1, I2C_CR1_SWRST);  in HAL_I2C_ER_IRQHandler()
5110         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_ER_IRQHandler()
5395       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_MasterTransmit_TXE()
5500         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_MasterTransmit_BTF()
5574       hi2c->Instance->CR1 |= I2C_CR1_START;  in I2C_MemoryTransmit_TXE_BTF()
5596       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_MemoryTransmit_TXE_BTF()
5658         CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_MasterReceive_RXNE()
5773       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_MasterReceive_BTF()
5791       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_MasterReceive_BTF()
5796       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_MasterReceive_BTF()
5801       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_MasterReceive_BTF()
5973       SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in I2C_Master_ADDR()
5985         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_Master_ADDR()
5992           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_Master_ADDR()
5997             CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_Master_ADDR()
6008             SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_Master_ADDR()
6018             CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_Master_ADDR()
6023             SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_Master_ADDR()
6032           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_Master_ADDR()
6038           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_Master_ADDR()
6046           SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in I2C_Master_ADDR()
6052           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_Master_ADDR()
6057           SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_Master_ADDR()
6072         SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_Master_ADDR()
6289   CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_Slave_STOPF()
6464     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_Slave_AF()
6491     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_Slave_AF()
6525     hi2c->Instance->CR1 &= ~I2C_CR1_POS;  in I2C_ITError()
6690     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in I2C_MasterRequestWrite()
6695     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in I2C_MasterRequestWrite()
6705     if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)  in I2C_MasterRequestWrite()
6757   SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_MasterRequestRead()
6763     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in I2C_MasterRequestRead()
6768     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in I2C_MasterRequestRead()
6778     if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)  in I2C_MasterRequestRead()
6814     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in I2C_MasterRequestRead()
6819       if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)  in I2C_MasterRequestRead()
6854   SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in I2C_RequestMemoryWrite()
6859     if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)  in I2C_RequestMemoryWrite()
6884       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_RequestMemoryWrite()
6907         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_RequestMemoryWrite()
6934   SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_RequestMemoryRead()
6937   SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in I2C_RequestMemoryRead()
6942     if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)  in I2C_RequestMemoryRead()
6967       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_RequestMemoryRead()
6990         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_RequestMemoryRead()
7005       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_RequestMemoryRead()
7011   SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in I2C_RequestMemoryRead()
7016     if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)  in I2C_RequestMemoryRead()
7109       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_DMAXferCplt()
7119       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_DMAXferCplt()
7200   CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_DMAError()
7240   while (READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP);  in I2C_DMAAbort()
7253   CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_DMAAbort()
7292       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_DMAAbort()
7367       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_WaitOnMasterAddressFlagUntilTimeout()
7548   while (READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP);  in I2C_WaitOnSTOPRequestThroughIT()