Lines Matching refs:heth
165 static void ETH_MACDMAConfig(ETH_HandleTypeDef *heth, uint32_t err);
166 static void ETH_MACAddressConfig(ETH_HandleTypeDef *heth, uint32_t MacAddr, uint8_t *Addr);
167 static void ETH_MACReceptionEnable(ETH_HandleTypeDef *heth);
168 static void ETH_MACReceptionDisable(ETH_HandleTypeDef *heth);
169 static void ETH_MACTransmissionEnable(ETH_HandleTypeDef *heth);
170 static void ETH_MACTransmissionDisable(ETH_HandleTypeDef *heth);
171 static void ETH_DMATransmissionEnable(ETH_HandleTypeDef *heth);
172 static void ETH_DMATransmissionDisable(ETH_HandleTypeDef *heth);
173 static void ETH_DMAReceptionEnable(ETH_HandleTypeDef *heth);
174 static void ETH_DMAReceptionDisable(ETH_HandleTypeDef *heth);
175 static void ETH_FlushTransmitFIFO(ETH_HandleTypeDef *heth);
178 static void ETH_InitCallbacksToDefault(ETH_HandleTypeDef *heth);
212 HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth) in HAL_ETH_Init() argument
220 if (heth == NULL) in HAL_ETH_Init()
226 assert_param(IS_ETH_AUTONEGOTIATION(heth->Init.AutoNegotiation)); in HAL_ETH_Init()
227 assert_param(IS_ETH_RX_MODE(heth->Init.RxMode)); in HAL_ETH_Init()
228 assert_param(IS_ETH_CHECKSUM_MODE(heth->Init.ChecksumMode)); in HAL_ETH_Init()
229 assert_param(IS_ETH_MEDIA_INTERFACE(heth->Init.MediaInterface)); in HAL_ETH_Init()
231 if (heth->State == HAL_ETH_STATE_RESET) in HAL_ETH_Init()
234 heth->Lock = HAL_UNLOCKED; in HAL_ETH_Init()
236 ETH_InitCallbacksToDefault(heth); in HAL_ETH_Init()
238 if (heth->MspInitCallback == NULL) in HAL_ETH_Init()
241 heth->MspInitCallback = HAL_ETH_MspInit; in HAL_ETH_Init()
243 heth->MspInitCallback(heth); in HAL_ETH_Init()
247 HAL_ETH_MspInit(heth); in HAL_ETH_Init()
253 AFIO->MAPR |= (uint32_t)heth->Init.MediaInterface; in HAL_ETH_Init()
258 (heth->Instance)->DMABMR |= ETH_DMABMR_SR; in HAL_ETH_Init()
264 while (((heth->Instance)->DMABMR & ETH_DMABMR_SR) != (uint32_t)RESET) in HAL_ETH_Init()
269 heth->State = HAL_ETH_STATE_TIMEOUT; in HAL_ETH_Init()
272 __HAL_UNLOCK(heth); in HAL_ETH_Init()
282 tmpreg1 = (heth->Instance)->MACMIIAR; in HAL_ETH_Init()
307 (heth->Instance)->MACMIIAR = (uint32_t)tmpreg1; in HAL_ETH_Init()
311 if ((HAL_ETH_WritePHYRegister(heth, PHY_BCR, PHY_RESET)) != HAL_OK) in HAL_ETH_Init()
317 ETH_MACDMAConfig(heth, err); in HAL_ETH_Init()
320 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_Init()
329 if ((heth->Init).AutoNegotiation != ETH_AUTONEGOTIATION_DISABLE) in HAL_ETH_Init()
337 HAL_ETH_ReadPHYRegister(heth, PHY_BSR, &phyreg); in HAL_ETH_Init()
346 ETH_MACDMAConfig(heth, err); in HAL_ETH_Init()
348 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_Init()
351 __HAL_UNLOCK(heth); in HAL_ETH_Init()
360 if ((HAL_ETH_WritePHYRegister(heth, PHY_BCR, PHY_AUTONEGOTIATION)) != HAL_OK) in HAL_ETH_Init()
366 ETH_MACDMAConfig(heth, err); in HAL_ETH_Init()
369 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_Init()
381 HAL_ETH_ReadPHYRegister(heth, PHY_BSR, &phyreg); in HAL_ETH_Init()
390 ETH_MACDMAConfig(heth, err); in HAL_ETH_Init()
392 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_Init()
395 __HAL_UNLOCK(heth); in HAL_ETH_Init()
404 if ((HAL_ETH_ReadPHYRegister(heth, PHY_SR, &phyreg)) != HAL_OK) in HAL_ETH_Init()
410 ETH_MACDMAConfig(heth, err); in HAL_ETH_Init()
413 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_Init()
423 (heth->Init).DuplexMode = ETH_MODE_FULLDUPLEX; in HAL_ETH_Init()
428 (heth->Init).DuplexMode = ETH_MODE_HALFDUPLEX; in HAL_ETH_Init()
434 (heth->Init).Speed = ETH_SPEED_10M; in HAL_ETH_Init()
439 (heth->Init).Speed = ETH_SPEED_100M; in HAL_ETH_Init()
445 assert_param(IS_ETH_SPEED(heth->Init.Speed)); in HAL_ETH_Init()
446 assert_param(IS_ETH_DUPLEX_MODE(heth->Init.DuplexMode)); in HAL_ETH_Init()
449 if (HAL_ETH_WritePHYRegister(heth, PHY_BCR, ((uint16_t)((heth->Init).DuplexMode >> 3U) | in HAL_ETH_Init()
450 (uint16_t)((heth->Init).Speed >> 1U))) != HAL_OK) in HAL_ETH_Init()
456 ETH_MACDMAConfig(heth, err); in HAL_ETH_Init()
459 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_Init()
470 ETH_MACDMAConfig(heth, err); in HAL_ETH_Init()
473 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_Init()
485 HAL_StatusTypeDef HAL_ETH_DeInit(ETH_HandleTypeDef *heth) in HAL_ETH_DeInit() argument
488 heth->State = HAL_ETH_STATE_BUSY; in HAL_ETH_DeInit()
491 if (heth->MspDeInitCallback == NULL) in HAL_ETH_DeInit()
493 heth->MspDeInitCallback = HAL_ETH_MspDeInit; in HAL_ETH_DeInit()
496 heth->MspDeInitCallback(heth); in HAL_ETH_DeInit()
499 HAL_ETH_MspDeInit(heth); in HAL_ETH_DeInit()
503 heth->State = HAL_ETH_STATE_RESET; in HAL_ETH_DeInit()
506 __HAL_UNLOCK(heth); in HAL_ETH_DeInit()
521 HAL_StatusTypeDef HAL_ETH_DMATxDescListInit(ETH_HandleTypeDef *heth, ETH_DMADescTypeDef *DMATxDescT… in HAL_ETH_DMATxDescListInit() argument
527 __HAL_LOCK(heth); in HAL_ETH_DMATxDescListInit()
530 heth->State = HAL_ETH_STATE_BUSY; in HAL_ETH_DMATxDescListInit()
533 heth->TxDesc = DMATxDescTab; in HAL_ETH_DMATxDescListInit()
547 if ((heth->Init).ChecksumMode == ETH_CHECKSUM_BY_HARDWARE) in HAL_ETH_DMATxDescListInit()
567 (heth->Instance)->DMATDLAR = (uint32_t) DMATxDescTab; in HAL_ETH_DMATxDescListInit()
570 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_DMATxDescListInit()
573 __HAL_UNLOCK(heth); in HAL_ETH_DMATxDescListInit()
588 HAL_StatusTypeDef HAL_ETH_DMARxDescListInit(ETH_HandleTypeDef *heth, ETH_DMADescTypeDef *DMARxDescT… in HAL_ETH_DMARxDescListInit() argument
594 __HAL_LOCK(heth); in HAL_ETH_DMARxDescListInit()
597 heth->State = HAL_ETH_STATE_BUSY; in HAL_ETH_DMARxDescListInit()
600 heth->RxDesc = DMARxDescTab; in HAL_ETH_DMARxDescListInit()
617 if ((heth->Init).RxMode == ETH_RXINTERRUPT_MODE) in HAL_ETH_DMARxDescListInit()
637 (heth->Instance)->DMARDLAR = (uint32_t) DMARxDescTab; in HAL_ETH_DMARxDescListInit()
640 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_DMARxDescListInit()
643 __HAL_UNLOCK(heth); in HAL_ETH_DMARxDescListInit()
655 __weak void HAL_ETH_MspInit(ETH_HandleTypeDef *heth) in HAL_ETH_MspInit() argument
658 UNUSED(heth); in HAL_ETH_MspInit()
670 __weak void HAL_ETH_MspDeInit(ETH_HandleTypeDef *heth) in HAL_ETH_MspDeInit() argument
673 UNUSED(heth); in HAL_ETH_MspDeInit()
694 HAL_StatusTypeDef HAL_ETH_RegisterCallback(ETH_HandleTypeDef *heth, HAL_ETH_CallbackIDTypeDef Callb… in HAL_ETH_RegisterCallback() argument
703 __HAL_LOCK(heth); in HAL_ETH_RegisterCallback()
705 if (heth->State == HAL_ETH_STATE_READY) in HAL_ETH_RegisterCallback()
710 heth->TxCpltCallback = pCallback; in HAL_ETH_RegisterCallback()
714 heth->RxCpltCallback = pCallback; in HAL_ETH_RegisterCallback()
718 heth->DMAErrorCallback = pCallback; in HAL_ETH_RegisterCallback()
722 heth->MspInitCallback = pCallback; in HAL_ETH_RegisterCallback()
726 heth->MspDeInitCallback = pCallback; in HAL_ETH_RegisterCallback()
735 else if (heth->State == HAL_ETH_STATE_RESET) in HAL_ETH_RegisterCallback()
740 heth->MspInitCallback = pCallback; in HAL_ETH_RegisterCallback()
744 heth->MspDeInitCallback = pCallback; in HAL_ETH_RegisterCallback()
760 __HAL_UNLOCK(heth); in HAL_ETH_RegisterCallback()
778 HAL_StatusTypeDef HAL_ETH_UnRegisterCallback(ETH_HandleTypeDef *heth, HAL_ETH_CallbackIDTypeDef Cal… in HAL_ETH_UnRegisterCallback() argument
783 __HAL_LOCK(heth); in HAL_ETH_UnRegisterCallback()
785 if (heth->State == HAL_ETH_STATE_READY) in HAL_ETH_UnRegisterCallback()
790 heth->TxCpltCallback = HAL_ETH_TxCpltCallback; in HAL_ETH_UnRegisterCallback()
794 heth->RxCpltCallback = HAL_ETH_RxCpltCallback; in HAL_ETH_UnRegisterCallback()
798 heth->DMAErrorCallback = HAL_ETH_ErrorCallback; in HAL_ETH_UnRegisterCallback()
802 heth->MspInitCallback = HAL_ETH_MspInit; in HAL_ETH_UnRegisterCallback()
806 heth->MspDeInitCallback = HAL_ETH_MspDeInit; in HAL_ETH_UnRegisterCallback()
815 else if (heth->State == HAL_ETH_STATE_RESET) in HAL_ETH_UnRegisterCallback()
820 heth->MspInitCallback = HAL_ETH_MspInit; in HAL_ETH_UnRegisterCallback()
824 heth->MspDeInitCallback = HAL_ETH_MspDeInit; in HAL_ETH_UnRegisterCallback()
840 __HAL_UNLOCK(heth); in HAL_ETH_UnRegisterCallback()
880 HAL_StatusTypeDef HAL_ETH_TransmitFrame(ETH_HandleTypeDef *heth, uint32_t FrameLength) in HAL_ETH_TransmitFrame() argument
885 __HAL_LOCK(heth); in HAL_ETH_TransmitFrame()
888 heth->State = HAL_ETH_STATE_BUSY; in HAL_ETH_TransmitFrame()
893 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_TransmitFrame()
896 __HAL_UNLOCK(heth); in HAL_ETH_TransmitFrame()
902 if (((heth->TxDesc)->Status & ETH_DMATXDESC_OWN) != (uint32_t)RESET) in HAL_ETH_TransmitFrame()
905 heth->State = HAL_ETH_STATE_BUSY_TX; in HAL_ETH_TransmitFrame()
908 __HAL_UNLOCK(heth); in HAL_ETH_TransmitFrame()
929 heth->TxDesc->Status |= ETH_DMATXDESC_FS | ETH_DMATXDESC_LS; in HAL_ETH_TransmitFrame()
931 heth->TxDesc->ControlBufferSize = (FrameLength & ETH_DMATXDESC_TBS1); in HAL_ETH_TransmitFrame()
933 heth->TxDesc->Status |= ETH_DMATXDESC_OWN; in HAL_ETH_TransmitFrame()
935 heth->TxDesc = (ETH_DMADescTypeDef *)(heth->TxDesc->Buffer2NextDescAddr); in HAL_ETH_TransmitFrame()
942 heth->TxDesc->Status &= ~(ETH_DMATXDESC_FS | ETH_DMATXDESC_LS); in HAL_ETH_TransmitFrame()
947 heth->TxDesc->Status |= ETH_DMATXDESC_FS; in HAL_ETH_TransmitFrame()
951 heth->TxDesc->ControlBufferSize = (ETH_TX_BUF_SIZE & ETH_DMATXDESC_TBS1); in HAL_ETH_TransmitFrame()
956 heth->TxDesc->Status |= ETH_DMATXDESC_LS; in HAL_ETH_TransmitFrame()
958 heth->TxDesc->ControlBufferSize = (size & ETH_DMATXDESC_TBS1); in HAL_ETH_TransmitFrame()
962 heth->TxDesc->Status |= ETH_DMATXDESC_OWN; in HAL_ETH_TransmitFrame()
964 heth->TxDesc = (ETH_DMADescTypeDef *)(heth->TxDesc->Buffer2NextDescAddr); in HAL_ETH_TransmitFrame()
969 if (((heth->Instance)->DMASR & ETH_DMASR_TBUS) != (uint32_t)RESET) in HAL_ETH_TransmitFrame()
972 (heth->Instance)->DMASR = ETH_DMASR_TBUS; in HAL_ETH_TransmitFrame()
974 (heth->Instance)->DMATPDR = 0U; in HAL_ETH_TransmitFrame()
978 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_TransmitFrame()
981 __HAL_UNLOCK(heth); in HAL_ETH_TransmitFrame()
993 HAL_StatusTypeDef HAL_ETH_GetReceivedFrame(ETH_HandleTypeDef *heth) in HAL_ETH_GetReceivedFrame() argument
998 __HAL_LOCK(heth); in HAL_ETH_GetReceivedFrame()
1001 heth->State = HAL_ETH_STATE_BUSY; in HAL_ETH_GetReceivedFrame()
1005 if (((heth->RxDesc->Status & ETH_DMARXDESC_OWN) == (uint32_t)RESET)) in HAL_ETH_GetReceivedFrame()
1008 if (((heth->RxDesc->Status & ETH_DMARXDESC_LS) != (uint32_t)RESET)) in HAL_ETH_GetReceivedFrame()
1011 (heth->RxFrameInfos).SegCount++; in HAL_ETH_GetReceivedFrame()
1014 if ((heth->RxFrameInfos).SegCount == 1U) in HAL_ETH_GetReceivedFrame()
1016 (heth->RxFrameInfos).FSRxDesc = heth->RxDesc; in HAL_ETH_GetReceivedFrame()
1019 heth->RxFrameInfos.LSRxDesc = heth->RxDesc; in HAL_ETH_GetReceivedFrame()
1022 …framelength = (((heth->RxDesc)->Status & ETH_DMARXDESC_FL) >> ETH_DMARXDESC_FRAMELENGTHSHIFT) - 4U; in HAL_ETH_GetReceivedFrame()
1023 heth->RxFrameInfos.length = framelength; in HAL_ETH_GetReceivedFrame()
1026 heth->RxFrameInfos.buffer = ((heth->RxFrameInfos).FSRxDesc)->Buffer1Addr; in HAL_ETH_GetReceivedFrame()
1028 heth->RxDesc = (ETH_DMADescTypeDef *)((heth->RxDesc)->Buffer2NextDescAddr); in HAL_ETH_GetReceivedFrame()
1031 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_GetReceivedFrame()
1034 __HAL_UNLOCK(heth); in HAL_ETH_GetReceivedFrame()
1040 else if ((heth->RxDesc->Status & ETH_DMARXDESC_FS) != (uint32_t)RESET) in HAL_ETH_GetReceivedFrame()
1042 (heth->RxFrameInfos).FSRxDesc = heth->RxDesc; in HAL_ETH_GetReceivedFrame()
1043 (heth->RxFrameInfos).LSRxDesc = NULL; in HAL_ETH_GetReceivedFrame()
1044 (heth->RxFrameInfos).SegCount = 1U; in HAL_ETH_GetReceivedFrame()
1046 heth->RxDesc = (ETH_DMADescTypeDef *)(heth->RxDesc->Buffer2NextDescAddr); in HAL_ETH_GetReceivedFrame()
1051 (heth->RxFrameInfos).SegCount++; in HAL_ETH_GetReceivedFrame()
1053 heth->RxDesc = (ETH_DMADescTypeDef *)(heth->RxDesc->Buffer2NextDescAddr); in HAL_ETH_GetReceivedFrame()
1058 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_GetReceivedFrame()
1061 __HAL_UNLOCK(heth); in HAL_ETH_GetReceivedFrame()
1073 HAL_StatusTypeDef HAL_ETH_GetReceivedFrame_IT(ETH_HandleTypeDef *heth) in HAL_ETH_GetReceivedFrame_IT() argument
1078 __HAL_LOCK(heth); in HAL_ETH_GetReceivedFrame_IT()
1081 heth->State = HAL_ETH_STATE_BUSY; in HAL_ETH_GetReceivedFrame_IT()
1084 …while (((heth->RxDesc->Status & ETH_DMARXDESC_OWN) == (uint32_t)RESET) && (descriptorscancounter <… in HAL_ETH_GetReceivedFrame_IT()
1091 … if ((heth->RxDesc->Status & (ETH_DMARXDESC_FS | ETH_DMARXDESC_LS)) == (uint32_t)ETH_DMARXDESC_FS) in HAL_ETH_GetReceivedFrame_IT()
1093 heth->RxFrameInfos.FSRxDesc = heth->RxDesc; in HAL_ETH_GetReceivedFrame_IT()
1094 heth->RxFrameInfos.SegCount = 1U; in HAL_ETH_GetReceivedFrame_IT()
1096 heth->RxDesc = (ETH_DMADescTypeDef *)(heth->RxDesc->Buffer2NextDescAddr); in HAL_ETH_GetReceivedFrame_IT()
1100 else if ((heth->RxDesc->Status & (ETH_DMARXDESC_LS | ETH_DMARXDESC_FS)) == (uint32_t)RESET) in HAL_ETH_GetReceivedFrame_IT()
1103 (heth->RxFrameInfos.SegCount)++; in HAL_ETH_GetReceivedFrame_IT()
1105 heth->RxDesc = (ETH_DMADescTypeDef *)(heth->RxDesc->Buffer2NextDescAddr); in HAL_ETH_GetReceivedFrame_IT()
1111 heth->RxFrameInfos.LSRxDesc = heth->RxDesc; in HAL_ETH_GetReceivedFrame_IT()
1114 (heth->RxFrameInfos.SegCount)++; in HAL_ETH_GetReceivedFrame_IT()
1117 if ((heth->RxFrameInfos.SegCount) == 1U) in HAL_ETH_GetReceivedFrame_IT()
1119 heth->RxFrameInfos.FSRxDesc = heth->RxDesc; in HAL_ETH_GetReceivedFrame_IT()
1123 …heth->RxFrameInfos.length = (((heth->RxDesc)->Status & ETH_DMARXDESC_FL) >> ETH_DMARXDESC_FRAMELEN… in HAL_ETH_GetReceivedFrame_IT()
1126 heth->RxFrameInfos.buffer = ((heth->RxFrameInfos).FSRxDesc)->Buffer1Addr; in HAL_ETH_GetReceivedFrame_IT()
1129 heth->RxDesc = (ETH_DMADescTypeDef *)(heth->RxDesc->Buffer2NextDescAddr); in HAL_ETH_GetReceivedFrame_IT()
1132 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_GetReceivedFrame_IT()
1135 __HAL_UNLOCK(heth); in HAL_ETH_GetReceivedFrame_IT()
1143 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_GetReceivedFrame_IT()
1146 __HAL_UNLOCK(heth); in HAL_ETH_GetReceivedFrame_IT()
1158 void HAL_ETH_IRQHandler(ETH_HandleTypeDef *heth) in HAL_ETH_IRQHandler() argument
1161 if (__HAL_ETH_DMA_GET_FLAG(heth, ETH_DMA_FLAG_R)) in HAL_ETH_IRQHandler()
1165 heth->RxCpltCallback(heth); in HAL_ETH_IRQHandler()
1168 HAL_ETH_RxCpltCallback(heth); in HAL_ETH_IRQHandler()
1172 __HAL_ETH_DMA_CLEAR_IT(heth, ETH_DMA_IT_R); in HAL_ETH_IRQHandler()
1175 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_IRQHandler()
1178 __HAL_UNLOCK(heth); in HAL_ETH_IRQHandler()
1182 else if (__HAL_ETH_DMA_GET_FLAG(heth, ETH_DMA_FLAG_T)) in HAL_ETH_IRQHandler()
1186 heth->TxCpltCallback(heth); in HAL_ETH_IRQHandler()
1189 HAL_ETH_TxCpltCallback(heth); in HAL_ETH_IRQHandler()
1193 __HAL_ETH_DMA_CLEAR_IT(heth, ETH_DMA_IT_T); in HAL_ETH_IRQHandler()
1196 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_IRQHandler()
1199 __HAL_UNLOCK(heth); in HAL_ETH_IRQHandler()
1203 __HAL_ETH_DMA_CLEAR_IT(heth, ETH_DMA_IT_NIS); in HAL_ETH_IRQHandler()
1206 if (__HAL_ETH_DMA_GET_FLAG(heth, ETH_DMA_FLAG_AIS)) in HAL_ETH_IRQHandler()
1209 heth->DMAErrorCallback(heth); in HAL_ETH_IRQHandler()
1212 HAL_ETH_ErrorCallback(heth); in HAL_ETH_IRQHandler()
1216 __HAL_ETH_DMA_CLEAR_IT(heth, ETH_DMA_FLAG_AIS); in HAL_ETH_IRQHandler()
1219 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_IRQHandler()
1222 __HAL_UNLOCK(heth); in HAL_ETH_IRQHandler()
1232 __weak void HAL_ETH_TxCpltCallback(ETH_HandleTypeDef *heth) in HAL_ETH_TxCpltCallback() argument
1235 UNUSED(heth); in HAL_ETH_TxCpltCallback()
1247 __weak void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *heth) in HAL_ETH_RxCpltCallback() argument
1250 UNUSED(heth); in HAL_ETH_RxCpltCallback()
1262 __weak void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *heth) in HAL_ETH_ErrorCallback() argument
1265 UNUSED(heth); in HAL_ETH_ErrorCallback()
1283 HAL_StatusTypeDef HAL_ETH_ReadPHYRegister(ETH_HandleTypeDef *heth, uint16_t PHYReg, uint32_t *RegVa… in HAL_ETH_ReadPHYRegister() argument
1289 assert_param(IS_ETH_PHY_ADDRESS(heth->Init.PhyAddress)); in HAL_ETH_ReadPHYRegister()
1292 if (heth->State == HAL_ETH_STATE_BUSY_RD) in HAL_ETH_ReadPHYRegister()
1297 heth->State = HAL_ETH_STATE_BUSY_RD; in HAL_ETH_ReadPHYRegister()
1300 tmpreg1 = heth->Instance->MACMIIAR; in HAL_ETH_ReadPHYRegister()
1306 …tmpreg1 |= (((uint32_t)heth->Init.PhyAddress << 11U) & ETH_MACMIIAR_PA); /* Set the PHY device add… in HAL_ETH_ReadPHYRegister()
1312 heth->Instance->MACMIIAR = tmpreg1; in HAL_ETH_ReadPHYRegister()
1323 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_ReadPHYRegister()
1326 __HAL_UNLOCK(heth); in HAL_ETH_ReadPHYRegister()
1331 tmpreg1 = heth->Instance->MACMIIAR; in HAL_ETH_ReadPHYRegister()
1335 *RegValue = (uint16_t)(heth->Instance->MACMIIDR); in HAL_ETH_ReadPHYRegister()
1338 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_ReadPHYRegister()
1355 HAL_StatusTypeDef HAL_ETH_WritePHYRegister(ETH_HandleTypeDef *heth, uint16_t PHYReg, uint32_t RegVa… in HAL_ETH_WritePHYRegister() argument
1361 assert_param(IS_ETH_PHY_ADDRESS(heth->Init.PhyAddress)); in HAL_ETH_WritePHYRegister()
1364 if (heth->State == HAL_ETH_STATE_BUSY_WR) in HAL_ETH_WritePHYRegister()
1369 heth->State = HAL_ETH_STATE_BUSY_WR; in HAL_ETH_WritePHYRegister()
1372 tmpreg1 = heth->Instance->MACMIIAR; in HAL_ETH_WritePHYRegister()
1378 …tmpreg1 |= (((uint32_t)heth->Init.PhyAddress << 11U) & ETH_MACMIIAR_PA); /* Set the PHY device add… in HAL_ETH_WritePHYRegister()
1384 heth->Instance->MACMIIDR = (uint16_t)RegValue; in HAL_ETH_WritePHYRegister()
1387 heth->Instance->MACMIIAR = tmpreg1; in HAL_ETH_WritePHYRegister()
1398 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_WritePHYRegister()
1401 __HAL_UNLOCK(heth); in HAL_ETH_WritePHYRegister()
1406 tmpreg1 = heth->Instance->MACMIIAR; in HAL_ETH_WritePHYRegister()
1410 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_WritePHYRegister()
1447 HAL_StatusTypeDef HAL_ETH_Start(ETH_HandleTypeDef *heth) in HAL_ETH_Start() argument
1450 __HAL_LOCK(heth); in HAL_ETH_Start()
1453 heth->State = HAL_ETH_STATE_BUSY; in HAL_ETH_Start()
1456 ETH_MACTransmissionEnable(heth); in HAL_ETH_Start()
1459 ETH_MACReceptionEnable(heth); in HAL_ETH_Start()
1462 ETH_FlushTransmitFIFO(heth); in HAL_ETH_Start()
1465 ETH_DMATransmissionEnable(heth); in HAL_ETH_Start()
1468 ETH_DMAReceptionEnable(heth); in HAL_ETH_Start()
1471 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_Start()
1474 __HAL_UNLOCK(heth); in HAL_ETH_Start()
1486 HAL_StatusTypeDef HAL_ETH_Stop(ETH_HandleTypeDef *heth) in HAL_ETH_Stop() argument
1489 __HAL_LOCK(heth); in HAL_ETH_Stop()
1492 heth->State = HAL_ETH_STATE_BUSY; in HAL_ETH_Stop()
1495 ETH_DMATransmissionDisable(heth); in HAL_ETH_Stop()
1498 ETH_DMAReceptionDisable(heth); in HAL_ETH_Stop()
1501 ETH_MACReceptionDisable(heth); in HAL_ETH_Stop()
1504 ETH_FlushTransmitFIFO(heth); in HAL_ETH_Stop()
1507 ETH_MACTransmissionDisable(heth); in HAL_ETH_Stop()
1510 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_Stop()
1513 __HAL_UNLOCK(heth); in HAL_ETH_Stop()
1526 HAL_StatusTypeDef HAL_ETH_ConfigMAC(ETH_HandleTypeDef *heth, ETH_MACInitTypeDef *macconf) in HAL_ETH_ConfigMAC() argument
1531 __HAL_LOCK(heth); in HAL_ETH_ConfigMAC()
1534 heth->State = HAL_ETH_STATE_BUSY; in HAL_ETH_ConfigMAC()
1536 assert_param(IS_ETH_SPEED(heth->Init.Speed)); in HAL_ETH_ConfigMAC()
1537 assert_param(IS_ETH_DUPLEX_MODE(heth->Init.DuplexMode)); in HAL_ETH_ConfigMAC()
1572 tmpreg1 = (heth->Instance)->MACCR; in HAL_ETH_ConfigMAC()
1580 (heth->Init).Speed | in HAL_ETH_ConfigMAC()
1583 (heth->Init).DuplexMode | in HAL_ETH_ConfigMAC()
1591 (heth->Instance)->MACCR = (uint32_t)tmpreg1; in HAL_ETH_ConfigMAC()
1595 tmpreg1 = (heth->Instance)->MACCR; in HAL_ETH_ConfigMAC()
1597 (heth->Instance)->MACCR = tmpreg1; in HAL_ETH_ConfigMAC()
1601 (heth->Instance)->MACFFR = (uint32_t)(macconf->ReceiveAll | in HAL_ETH_ConfigMAC()
1612 tmpreg1 = (heth->Instance)->MACFFR; in HAL_ETH_ConfigMAC()
1614 (heth->Instance)->MACFFR = tmpreg1; in HAL_ETH_ConfigMAC()
1618 (heth->Instance)->MACHTHR = (uint32_t)macconf->HashTableHigh; in HAL_ETH_ConfigMAC()
1621 (heth->Instance)->MACHTLR = (uint32_t)macconf->HashTableLow; in HAL_ETH_ConfigMAC()
1625 tmpreg1 = (heth->Instance)->MACFCR; in HAL_ETH_ConfigMAC()
1637 (heth->Instance)->MACFCR = (uint32_t)tmpreg1; in HAL_ETH_ConfigMAC()
1641 tmpreg1 = (heth->Instance)->MACFCR; in HAL_ETH_ConfigMAC()
1643 (heth->Instance)->MACFCR = tmpreg1; in HAL_ETH_ConfigMAC()
1646 (heth->Instance)->MACVLANTR = (uint32_t)(macconf->VLANTagComparison | in HAL_ETH_ConfigMAC()
1651 tmpreg1 = (heth->Instance)->MACVLANTR; in HAL_ETH_ConfigMAC()
1653 (heth->Instance)->MACVLANTR = tmpreg1; in HAL_ETH_ConfigMAC()
1659 tmpreg1 = (heth->Instance)->MACCR; in HAL_ETH_ConfigMAC()
1664 tmpreg1 |= (uint32_t)(heth->Init.Speed | heth->Init.DuplexMode); in HAL_ETH_ConfigMAC()
1667 (heth->Instance)->MACCR = (uint32_t)tmpreg1; in HAL_ETH_ConfigMAC()
1671 tmpreg1 = (heth->Instance)->MACCR; in HAL_ETH_ConfigMAC()
1673 (heth->Instance)->MACCR = tmpreg1; in HAL_ETH_ConfigMAC()
1677 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_ConfigMAC()
1680 __HAL_UNLOCK(heth); in HAL_ETH_ConfigMAC()
1693 HAL_StatusTypeDef HAL_ETH_ConfigDMA(ETH_HandleTypeDef *heth, ETH_DMAInitTypeDef *dmaconf) in HAL_ETH_ConfigDMA() argument
1698 __HAL_LOCK(heth); in HAL_ETH_ConfigDMA()
1701 heth->State = HAL_ETH_STATE_BUSY; in HAL_ETH_ConfigDMA()
1722 tmpreg1 = (heth->Instance)->DMAOMR; in HAL_ETH_ConfigDMA()
1737 (heth->Instance)->DMAOMR = (uint32_t)tmpreg1; in HAL_ETH_ConfigDMA()
1741 tmpreg1 = (heth->Instance)->DMAOMR; in HAL_ETH_ConfigDMA()
1743 (heth->Instance)->DMAOMR = tmpreg1; in HAL_ETH_ConfigDMA()
1746 (heth->Instance)->DMABMR = (uint32_t)(dmaconf->AddressAlignedBeats | in HAL_ETH_ConfigDMA()
1756 tmpreg1 = (heth->Instance)->DMABMR; in HAL_ETH_ConfigDMA()
1758 (heth->Instance)->DMABMR = tmpreg1; in HAL_ETH_ConfigDMA()
1761 heth->State = HAL_ETH_STATE_READY; in HAL_ETH_ConfigDMA()
1764 __HAL_UNLOCK(heth); in HAL_ETH_ConfigDMA()
1798 HAL_ETH_StateTypeDef HAL_ETH_GetState(ETH_HandleTypeDef *heth) in HAL_ETH_GetState() argument
1801 return heth->State; in HAL_ETH_GetState()
1823 static void ETH_MACDMAConfig(ETH_HandleTypeDef *heth, uint32_t err) in ETH_MACDMAConfig() argument
1832 (heth->Init).DuplexMode = ETH_MODE_FULLDUPLEX; in ETH_MACDMAConfig()
1835 (heth->Init).Speed = ETH_SPEED_100M; in ETH_MACDMAConfig()
1845 if (heth->Init.ChecksumMode == ETH_CHECKSUM_BY_HARDWARE) in ETH_MACDMAConfig()
1878 tmpreg1 = (heth->Instance)->MACCR; in ETH_MACDMAConfig()
1898 (heth->Init).Speed | in ETH_MACDMAConfig()
1901 (heth->Init).DuplexMode | in ETH_MACDMAConfig()
1909 (heth->Instance)->MACCR = (uint32_t)tmpreg1; in ETH_MACDMAConfig()
1913 tmpreg1 = (heth->Instance)->MACCR; in ETH_MACDMAConfig()
1915 (heth->Instance)->MACCR = tmpreg1; in ETH_MACDMAConfig()
1927 (heth->Instance)->MACFFR = (uint32_t)(macinit.ReceiveAll | in ETH_MACDMAConfig()
1938 tmpreg1 = (heth->Instance)->MACFFR; in ETH_MACDMAConfig()
1940 (heth->Instance)->MACFFR = tmpreg1; in ETH_MACDMAConfig()
1944 (heth->Instance)->MACHTHR = (uint32_t)macinit.HashTableHigh; in ETH_MACDMAConfig()
1947 (heth->Instance)->MACHTLR = (uint32_t)macinit.HashTableLow; in ETH_MACDMAConfig()
1951 tmpreg1 = (heth->Instance)->MACFCR; in ETH_MACDMAConfig()
1969 (heth->Instance)->MACFCR = (uint32_t)tmpreg1; in ETH_MACDMAConfig()
1973 tmpreg1 = (heth->Instance)->MACFCR; in ETH_MACDMAConfig()
1975 (heth->Instance)->MACFCR = tmpreg1; in ETH_MACDMAConfig()
1980 (heth->Instance)->MACVLANTR = (uint32_t)(macinit.VLANTagComparison | in ETH_MACDMAConfig()
1985 tmpreg1 = (heth->Instance)->MACVLANTR; in ETH_MACDMAConfig()
1987 (heth->Instance)->MACVLANTR = tmpreg1; in ETH_MACDMAConfig()
2007 tmpreg1 = (heth->Instance)->DMAOMR; in ETH_MACDMAConfig()
2031 (heth->Instance)->DMAOMR = (uint32_t)tmpreg1; in ETH_MACDMAConfig()
2035 tmpreg1 = (heth->Instance)->DMAOMR; in ETH_MACDMAConfig()
2037 (heth->Instance)->DMAOMR = tmpreg1; in ETH_MACDMAConfig()
2046 (heth->Instance)->DMABMR = (uint32_t)(dmainit.AddressAlignedBeats | in ETH_MACDMAConfig()
2056 tmpreg1 = (heth->Instance)->DMABMR; in ETH_MACDMAConfig()
2058 (heth->Instance)->DMABMR = tmpreg1; in ETH_MACDMAConfig()
2060 if ((heth->Init).RxMode == ETH_RXINTERRUPT_MODE) in ETH_MACDMAConfig()
2063 __HAL_ETH_DMA_ENABLE_IT((heth), ETH_DMA_IT_NIS | ETH_DMA_IT_R); in ETH_MACDMAConfig()
2067 ETH_MACAddressConfig(heth, ETH_MAC_ADDRESS0, heth->Init.MACAddr); in ETH_MACDMAConfig()
2083 static void ETH_MACAddressConfig(ETH_HandleTypeDef *heth, uint32_t MacAddr, uint8_t *Addr) in ETH_MACAddressConfig() argument
2088 UNUSED(heth); in ETH_MACAddressConfig()
2110 static void ETH_MACTransmissionEnable(ETH_HandleTypeDef *heth) in ETH_MACTransmissionEnable() argument
2115 (heth->Instance)->MACCR |= ETH_MACCR_TE; in ETH_MACTransmissionEnable()
2119 tmpreg1 = (heth->Instance)->MACCR; in ETH_MACTransmissionEnable()
2121 (heth->Instance)->MACCR = tmpreg1; in ETH_MACTransmissionEnable()
2130 static void ETH_MACTransmissionDisable(ETH_HandleTypeDef *heth) in ETH_MACTransmissionDisable() argument
2135 (heth->Instance)->MACCR &= ~ETH_MACCR_TE; in ETH_MACTransmissionDisable()
2139 tmpreg1 = (heth->Instance)->MACCR; in ETH_MACTransmissionDisable()
2141 (heth->Instance)->MACCR = tmpreg1; in ETH_MACTransmissionDisable()
2150 static void ETH_MACReceptionEnable(ETH_HandleTypeDef *heth) in ETH_MACReceptionEnable() argument
2155 (heth->Instance)->MACCR |= ETH_MACCR_RE; in ETH_MACReceptionEnable()
2159 tmpreg1 = (heth->Instance)->MACCR; in ETH_MACReceptionEnable()
2161 (heth->Instance)->MACCR = tmpreg1; in ETH_MACReceptionEnable()
2170 static void ETH_MACReceptionDisable(ETH_HandleTypeDef *heth) in ETH_MACReceptionDisable() argument
2175 (heth->Instance)->MACCR &= ~ETH_MACCR_RE; in ETH_MACReceptionDisable()
2179 tmpreg1 = (heth->Instance)->MACCR; in ETH_MACReceptionDisable()
2181 (heth->Instance)->MACCR = tmpreg1; in ETH_MACReceptionDisable()
2190 static void ETH_DMATransmissionEnable(ETH_HandleTypeDef *heth) in ETH_DMATransmissionEnable() argument
2193 (heth->Instance)->DMAOMR |= ETH_DMAOMR_ST; in ETH_DMATransmissionEnable()
2202 static void ETH_DMATransmissionDisable(ETH_HandleTypeDef *heth) in ETH_DMATransmissionDisable() argument
2205 (heth->Instance)->DMAOMR &= ~ETH_DMAOMR_ST; in ETH_DMATransmissionDisable()
2214 static void ETH_DMAReceptionEnable(ETH_HandleTypeDef *heth) in ETH_DMAReceptionEnable() argument
2217 (heth->Instance)->DMAOMR |= ETH_DMAOMR_SR; in ETH_DMAReceptionEnable()
2226 static void ETH_DMAReceptionDisable(ETH_HandleTypeDef *heth) in ETH_DMAReceptionDisable() argument
2229 (heth->Instance)->DMAOMR &= ~ETH_DMAOMR_SR; in ETH_DMAReceptionDisable()
2238 static void ETH_FlushTransmitFIFO(ETH_HandleTypeDef *heth) in ETH_FlushTransmitFIFO() argument
2243 (heth->Instance)->DMAOMR |= ETH_DMAOMR_FTF; in ETH_FlushTransmitFIFO()
2247 tmpreg1 = (heth->Instance)->DMAOMR; in ETH_FlushTransmitFIFO()
2249 (heth->Instance)->DMAOMR = tmpreg1; in ETH_FlushTransmitFIFO()
2268 static void ETH_InitCallbacksToDefault(ETH_HandleTypeDef *heth) in ETH_InitCallbacksToDefault() argument
2271 heth->TxCpltCallback = HAL_ETH_TxCpltCallback; /* Legacy weak TxCpltCallback */ in ETH_InitCallbacksToDefault()
2272 heth->RxCpltCallback = HAL_ETH_RxCpltCallback; /* Legacy weak RxCpltCallback */ in ETH_InitCallbacksToDefault()
2273 heth->DMAErrorCallback = HAL_ETH_ErrorCallback; /* Legacy weak DMAErrorCallback */ in ETH_InitCallbacksToDefault()