Lines Matching refs:regshift
277 uint32_t regshift = COMP_CSR_COMP1_SHIFT; in HAL_COMP_Init() local
341 regshift = COMP_CSR_COMP2_SHIFT; in HAL_COMP_Init()
346 COMP_CSR_COMPxHYST | COMP_CSR_COMPxMODE) << regshift, in HAL_COMP_Init()
352 hcomp->Init.Mode) << regshift); in HAL_COMP_Init()
376 uint32_t regshift = COMP_CSR_COMP1_SHIFT; in HAL_COMP_DeInit() local
391 regshift = COMP_CSR_COMP2_SHIFT; in HAL_COMP_DeInit()
394 COMP_CSR_RESET_PARAMETERS_MASK << regshift, in HAL_COMP_DeInit()
395 COMP_CSR_RESET_VALUE << regshift); in HAL_COMP_DeInit()
637 uint32_t regshift = COMP_CSR_COMP1_SHIFT; in HAL_COMP_Start() local
654 regshift = COMP_CSR_COMP2_SHIFT; in HAL_COMP_Start()
656 SET_BIT(COMP->CSR, COMP_CSR_COMPxEN << regshift); in HAL_COMP_Start()
685 uint32_t regshift = COMP_CSR_COMP1_SHIFT; in HAL_COMP_Stop() local
702 regshift = COMP_CSR_COMP2_SHIFT; in HAL_COMP_Stop()
704 CLEAR_BIT(COMP->CSR, COMP_CSR_COMPxEN << regshift); in HAL_COMP_Stop()
832 uint32_t regshift = COMP_CSR_COMP1_SHIFT; in HAL_COMP_Lock() local
850 regshift = COMP_CSR_COMP2_SHIFT; in HAL_COMP_Lock()
852 SET_BIT(COMP->CSR, COMP_CSR_COMPxLOCK << regshift); in HAL_COMP_Lock()
878 uint32_t regshift = COMP_CSR_COMP1_SHIFT; in HAL_COMP_GetOutputLevel() local
885 regshift = COMP_CSR_COMP2_SHIFT; in HAL_COMP_GetOutputLevel()
887 level = READ_BIT(COMP->CSR, COMP_CSR_COMPxOUT << regshift); in HAL_COMP_GetOutputLevel()