Lines Matching refs:pll
356 scm_system_clock_config.pll.are_pll_params_initialized = 1; in ConfigHwPll()
374 memset(&(scm_system_clock_config.pll), 0, sizeof(scm_pll_config_t)); in scm_init()
430 scm_system_clock_config.pll.PLLM = LL_RCC_PLL1_GetDivider(); in scm_init()
431 scm_system_clock_config.pll.PLLN = LL_RCC_PLL1_GetN(); in scm_init()
432 scm_system_clock_config.pll.PLLP = LL_RCC_PLL1_GetP(); in scm_init()
433 scm_system_clock_config.pll.PLLQ = LL_RCC_PLL1_GetQ(); in scm_init()
434 scm_system_clock_config.pll.PLLR = LL_RCC_PLL1_GetR(); in scm_init()
435 scm_system_clock_config.pll.PLLFractional = LL_RCC_PLL1_GetFRACN(); in scm_init()
436 scm_system_clock_config.pll.AHB5_PLL1_CLKDivider = LL_RCC_GetAHB5Prescaler(); in scm_init()
437 if(scm_system_clock_config.pll.PLLFractional == PLL_FRACTIONAL_MODE) in scm_init()
439 scm_system_clock_config.pll.pll_mode = PLL_FRACTIONAL_MODE; in scm_init()
443 scm_system_clock_config.pll.pll_mode = PLL_INTEGER_MODE; in scm_init()
527 scm_system_clock_config.pll.PLLM = p_pll_config->PLLM; in scm_pll_setconfig()
528 scm_system_clock_config.pll.PLLN = p_pll_config->PLLN; in scm_pll_setconfig()
529 scm_system_clock_config.pll.PLLP = p_pll_config->PLLP; in scm_pll_setconfig()
530 scm_system_clock_config.pll.PLLQ = p_pll_config->PLLQ; in scm_pll_setconfig()
531 scm_system_clock_config.pll.PLLR = p_pll_config->PLLR; in scm_pll_setconfig()
532 scm_system_clock_config.pll.PLLFractional = p_pll_config->PLLFractional; in scm_pll_setconfig()
533 scm_system_clock_config.pll.pll_mode = p_pll_config->pll_mode; in scm_pll_setconfig()
534 scm_system_clock_config.pll.AHB5_PLL1_CLKDivider = p_pll_config->AHB5_PLL1_CLKDivider; in scm_pll_setconfig()
536 ConfigHwPll(&scm_system_clock_config.pll); in scm_pll_setconfig()
869 if(scm_system_clock_config.pll.are_pll_params_initialized == 1) in scm_standbyexit()
872 ConfigHwPll(&scm_system_clock_config.pll); in scm_standbyexit()