Lines Matching full:with
14 * If no LICENSE file comes with this software, it is provided AS-IS.
72 … compatibility with some ADC on other STM32 families
76 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
84 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
106 ADC_CHANNEL_ID_NUMBER_MASK with reduced range: on this STM32 series, ADC group regular sequencer,
107 if set to mode "fully configurable", can contain channels with a restricted channel number.
253 … | ADC_CR_ADSTART | ADC_CR_ADSTP) /* ADC register CR bits with
263 with which VrefInt has been calibrated in production (tolerance: +-10 mV) (unit: mV). */
276 …with which temperature sensor has been calibrated in production (tolerance: +-10 mV) (unit: mV). */
340 * (setting possible with ADC enabled without conversion on going,
341 * ADC enabled with conversion on going, ...)
342 * Each feature can be updated afterwards with a unitary function
343 * and potentially with ADC in a different state than disabled,
352 … ADC clock synchronous (from PCLK) with prescaler 1 must be enabled
382 * (functions with prefix "REG").
389 * (setting possible with ADC enabled without conversion on going,
390 * ADC enabled with conversion on going, ...)
391 * Each feature can be updated afterwards with a unitary function
392 * and potentially with ADC in a different state than disabled,
403 … with some ADC on other STM32 families having this setting set by HW
463 * @brief Flags defines which can be used with LL_ADC_ReadReg function
481 * @brief IT defines which can be used with LL_ADC_ReadReg and LL_ADC_WriteReg functions
498 /** @defgroup ADC_LL_EC_REGISTERS ADC registers compliant with specific purpose
501 /* List of ADC registers intended to be used (most commonly) with */
505 … (corresponding to register DR) to be used with ADC
518 …_PRESC_0) /*!< ADC asynchronous clock with prescaler division …
519 …_PRESC_1 ) /*!< ADC asynchronous clock with prescaler division …
520 …_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with prescaler division …
521 …_PRESC_2 ) /*!< ADC asynchronous clock with prescaler division …
522 …_PRESC_2 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with prescaler division …
523 …_PRESC_2 | ADC_CCR_PRESC_1 ) /*!< ADC asynchronous clock with prescaler division …
524 …_PRESC_2 | ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with prescaler division …
525 …_PRESC_3) /*!< ADC asynchronous clock with prescaler division …
526 …_PRESC_3 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with prescaler division …
527 …_PRESC_3 | ADC_CCR_PRESC_1) /*!< ADC asynchronous clock with prescaler division …
528 …_PRESC_3 | ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with prescaler division …
584 …en necessary (when previous ADC conversion data is read). See description with function @ref LL_AD…
585 …n a new ADC conversion is triggered (with startup time between trigger and start of sampling). See…
586 …DC low power modes auto wait and auto power-off combined. See description with function @ref LL_AD…
683 …mber of ADC conversions) is reached. This ADC mode is intended to be used with DMA mode non-circul…
684 …sferred (number of ADC conversions). This ADC mode is intended to be used with DMA mode circular. …
711 …LE_2RANKS (ADC_CHSELR_SQ3) /*!< ADC group regular sequencer enable with 2 ranks in the sequ…
712 …LE_3RANKS (ADC_CHSELR_SQ4) /*!< ADC group regular sequencer enable with 3 ranks in the sequ…
713 …LE_4RANKS (ADC_CHSELR_SQ5) /*!< ADC group regular sequencer enable with 4 ranks in the sequ…
714 …LE_5RANKS (ADC_CHSELR_SQ6) /*!< ADC group regular sequencer enable with 5 ranks in the sequ…
715 …LE_6RANKS (ADC_CHSELR_SQ7) /*!< ADC group regular sequencer enable with 6 ranks in the sequ…
716 …LE_7RANKS (ADC_CHSELR_SQ8) /*!< ADC group regular sequencer enable with 7 ranks in the sequ…
717 …LE_8RANKS (0x00000000UL) /*!< ADC group regular sequencer enable with 8 ranks in the sequ…
725 …ber to highest channel number (scan of all ranks, ADC conversion of ranks with channels enabled in…
726 …mber to lowest channel number (scan of all ranks, ADC conversion of ranks with channels enabled in…
735 … /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
825 …f ADC group regular. Literal suffix "continued" is kept for compatibility with other STM32 devices…
985 * number is returned, either defined with number
986 * or with bitfield (only one bit must be set).
1091 * comparison with internal channel parameter to be done
1113 * number in ADC registers. The differentiation is made only with
1223 * number in ADC registers. The differentiation is made only with
1241 * define a single channel to monitor with analog watchdog
1243 * @note To be used with function @ref LL_ADC_SetAnalogWDMonitChannels().
1276 * comparison with internal channel parameter to be done
1313 * @note To be used with function @ref LL_ADC_ConfigAnalogWDThresholds()
1315 * Example, with a ADC resolution of 8 bits, to set the value of
1336 * @note To be used with function @ref LL_ADC_GetAnalogWDThresholds().
1337 * Example, with a ADC resolution of 8 bits, to get the value of
1357 * @note To be used with function @ref LL_ADC_GetAnalogWDThresholds().
1375 * - Multimode (for devices with several ADC instances)
1386 * @note This check is required by functions with setting conditioned to
1390 * @note On devices with only 1 ADC common instance, parameter of this macro
1392 * with devices featuring several ADC common instances).
1476 * On devices with small package, the pin Vref+ is not present
1510 * with TS_ADC_DATA = temperature sensor raw data measured by ADC
1573 * with TS_ADC_DATA = temperature sensor raw data measured by ADC
1580 * of the current device has characteristics in line with
1653 * intended to be used (most commonly) with DMA transfer.
1657 * @note This macro is intended to be used with LL DMA driver, refer to
1665 * @note For devices with several ADC: in multimode, some devices
1698 * This check can be done with function @ref LL_ADC_IsEnabled() for each
1781 * This check can be done with function @ref LL_ADC_IsEnabled() for each
1823 * This check can be done with function @ref LL_ADC_IsEnabled() for each
1853 * This check can be done with function @ref LL_ADC_IsEnabled() for each
1957 * or differential (for devices with differential mode available).
1979 * or differential (for devices with differential mode available).
2079 * - It is not recommended to use with interruption or DMA
2085 * - Do use with polling: 1. Start conversion,
2094 * (with startup time between trigger and start of sampling).
2095 * This feature can be combined with low power mode "auto wait".
2096 * @note With ADC low power mode "auto wait", the ADC conversion data read
2136 * - It is not recommended to use with interruption or DMA
2142 * - Do use with polling: 1. Start conversion,
2151 * (with startup time between trigger and start of sampling).
2152 * This feature can be combined with low power mode "auto wait".
2153 * @note With ADC low power mode "auto wait", the ADC conversion data read
2183 * @note Usage of ADC trigger frequency mode with ADC low power mode:
2313 * (default setting for compatibility with some ADC on other
2377 /* to match with triggers literals definition. */ in LL_ADC_REG_GetTriggerSource()
2500 * - For devices with sequencer fully configurable
2510 * - For devices with sequencer not fully configurable
2572 * - For devices with sequencer fully configurable
2582 * - For devices with sequencer not fully configurable
2808 /* Set bits with content of parameter "Channel" with bits position */ in LL_ADC_REG_SetSequencerRanks()
2810 /* Parameters "Rank" and "Channel" are used with masks because containing */ in LL_ADC_REG_SetSequencerRanks()
2831 * with parts of literals LL_ADC_CHANNEL_x or using
2836 * process the returned value with the helper macro
2884 * comparison with internal channel parameter to be done
2909 * This function can be used with setting "not fully configurable".
2983 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_REG_SetSequencerChannels()
3001 * This function can be used with setting "not fully configurable".
3075 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_REG_SetSequencerChAdd()
3093 * This function can be used with setting "not fully configurable".
3167 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_REG_SetSequencerChRem()
3183 * This function can be used with setting "not fully configurable".
3319 * This ADC mode is intended to be used with DMA mode non-circular.
3323 * This ADC mode is intended to be used with DMA mode circular.
3356 * This ADC mode is intended to be used with DMA mode non-circular.
3360 * This ADC mode is intended to be used with DMA mode circular.
3384 * @note Compatibility with devices without feature overrun:
3388 * Therefore, for compatibility with all devices, parameter
3504 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_SetChannelSamplingTime()
3602 * with analog watchdog from sequencer channel definition,
3666 /* Set bits with content of parameter "AWDChannelGroup" with bits position */ in LL_ADC_SetAnalogWDMonitChannels()
3668 /* Parameters "AWDChannelGroup" and "AWDy" are used with masks because */ in LL_ADC_SetAnalogWDMonitChannels()
3693 * with parts of literals LL_ADC_CHANNEL_x or using
3698 * process the returned value with the helper macro
3886 /* Set bits with content of parameter "AWDThresholdxxxValue" with bits */ in LL_ADC_ConfigAnalogWDThresholds()
3889 /* Parameters "AWDy" and "AWDThresholdxxxValue" are used with masks because */ in LL_ADC_ConfigAnalogWDThresholds()
3947 * ADC can be disabled, enabled with or without conversion on going
3969 /* Set bits with content of parameter "AWDThresholdValue" with bits */ in LL_ADC_SetAnalogWDThresholds()
3972 /* Parameters "AWDy" and "AWDThresholdValue" are used with masks because */ in LL_ADC_SetAnalogWDThresholds()
3987 * threshold low or raw data with ADC thresholds high and low
3989 * @note If raw data with ADC thresholds high and low is retrieved,
4015 /* Set bits with content of parameter "AWDThresholdValue" with bits */ in LL_ADC_GetAnalogWDThresholds()
4018 /* Parameters "AWDy" and "AWDThresholdValue" are used with masks because */ in LL_ADC_GetAnalogWDThresholds()
4220 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_EnableInternalRegulator()
4222 /* to not interfere with bits with HW property "rs". */ in LL_ADC_EnableInternalRegulator()
4271 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_Enable()
4273 /* to not interfere with bits with HW property "rs". */ in LL_ADC_Enable()
4291 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_Disable()
4293 /* to not interfere with bits with HW property "rs". */ in LL_ADC_Disable()
4326 * or differential (for devices with differential mode available).
4330 * @note In case of usage of ADC with DMA transfer:
4354 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_StartCalibration()
4356 /* to not interfere with bits with HW property "rs". */ in LL_ADC_StartCalibration()
4401 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_REG_StartConversion()
4403 /* to not interfere with bits with HW property "rs". */ in LL_ADC_REG_StartConversion()
4413 * ADC must be enabled with conversion on going on group regular,
4421 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_REG_StopConversion()
4423 /* to not interfere with bits with HW property "rs". */ in LL_ADC_REG_StopConversion()
4455 * with feature oversampling).
4468 * @note For devices with feature oversampling: Oversampling
4483 * @note For devices with feature oversampling: Oversampling
4498 * @note For devices with feature oversampling: Oversampling
4513 * @note For devices with feature oversampling: Oversampling