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72 …                                                compatibility with some ADC on other STM32 families
106 ADC_CHANNEL_ID_NUMBER_MASK with reduced range: on this STM32 series, ADC group regular sequencer,
113 /* Equivalent mask of ADC_CHANNEL_NUMBER_MASK aligned on register LSB (bit 0) */
170 /* on one of the common sampling time available. */
180 /* (feature of several watchdogs not available on all STM32 families)). */
184 /* selection on groups. */
254 …HW property "rs": Software can read as well as set this bit. Writing '0' has no effect on the bit …
265 …R_CAL1_ADDR ((uint16_t*) (0x1FFF75A8UL)) /* Address of parameter TS_CAL1: On STM32WL,
268 …R_CAL2_ADDR ((uint16_t*) (0x1FFF75C8UL)) /* Address of parameter TS_CAL2: On STM32WL,
331 * @note These parameters have an impact on ADC scope: ADC instance.
340 * (setting possible with ADC enabled without conversion on going,
341 * ADC enabled with conversion on going, ...)
351 … @note On this STM32 series, this parameter has some clock ratio constraints:
379 * @note These parameters have an impact on ADC scope: ADC group regular.
389 * (setting possible with ADC enabled without conversion on going,
390 * ADC enabled with conversion on going, ...)
401 … @note On this STM32 series, setting trigger source to external trigger also
403 … with some ADC on other STM32 families having this setting set by HW
422 … enabled (depending on the sequencer mode: scan length of 2 ranks or
428 …uint32_t ContinuousMode; /*!< Set ADC continuous conversion mode on ADC group regular…
574 …00UL) /*!< ADC conversion data alignment: right aligned (alignment on data register LSB bi…
575 …R1_ALIGN) /*!< ADC conversion data alignment: left aligned (alignment on data register MSB bi…
612 #define LL_ADC_GROUP_REGULAR (0x00000001UL) /*!< ADC group regular (available on all …
689 /** @defgroup ADC_LL_EC_REG_OVR_DATA_BEHAVIOR ADC group regular - Overrun behavior on conversion d…
710 … regular sequencer disable (equivalent to sequencer of 1 rank: ADC conversion on only 1 channel) */
725On this STM32 series, parameter relevant only is sequencer set to mode not fully configurable, ref…
726 #define LL_ADC_REG_SEQ_SCAN_DIR_BACKWARD (ADC_CFGR1_SCANDIR) /*!< On this STM32 series, parame…
825 … ADC_CFGR2_OVSE) /*!< ADC oversampling on conversions of ADC g…
874 … @ref __LL_ADC_CALC_TEMPERATURE(), due to issue on
875 … calibration parameters. This value is coded on 16 bits
876 … (to fit on signed word or double word) and corresponds
885 * For details on delays values, refer to descriptions in source code
904 /* - ADC conversion time: duration depending on ADC clock and ADC */
928 /* Note: On this STM32 series, a minimum number of ADC clock cycles */
1011 * (1) On STM32WL, parameter can be set in ADC group sequencer
1087 * (1) On STM32WL, parameter can be set in ADC group sequencer
1139 * (1) On STM32WL, parameter can be set in ADC group sequencer
1186 * (1) On STM32WL, parameter can be set in ADC group sequencer
1214 * selected is available on the ADC instance selected.
1231 …* @retval Value "0" if the internal channel selected is not available on the ADC instance selected.
1232 * Value "1" if the internal channel selected is available on the ADC instance selected.
1272 * (1) On STM32WL, parameter can be set in ADC group sequencer
1316 * analog watchdog threshold high (on 8 bits):
1338 * analog watchdog threshold high (on 8 bits):
1390 * @note On devices with only 1 ADC common instance, parameter of this macro
1474 * @note This voltage depends on user board environment: voltage level
1476 * On devices with small package, the pin Vref+ is not present
1478 * @note On this STM32 series, calibration data of internal voltage reference
1528 * @note On this STM32 series, calibration data of temperature sensor
1582 * If temperature sensor calibration values are available on
1583 * on this device (presence of macro __LL_ADC_CALC_TEMPERATURE()),
1596 …* On STM32WL, refer to device datasheet parameter "Avg_Slope…
1599 …* On STM32WL, refer to datasheet parameter "V30" (correspond…
1695 * @note On this STM32 series, setting of this feature is conditioned to
1778 * @note On this STM32 series, setting of this feature is conditioned to
1820 * @note On this STM32 series, setting of this feature is conditioned to
1850 * @note On this STM32 series, setting of this feature is conditioned to
1905 * @note On this STM32 series, setting of this feature is conditioned to
1961 * @note On this STM32 series, setting of this feature is conditioned to
1963 * ADC must be enabled, without calibration on going, without conversion
1964 * on going on group regular.
1995 * @note On this STM32 series, setting of this feature is conditioned to
2033 * @note On this STM32 series, setting of this feature is conditioned to
2086 * 2. Later on, when conversion data is needed: poll for end of
2090 * - ADC low power mode "auto power-off" (feature available on
2100 * correspond to the current voltage level on the selected
2102 * @note On this STM32 series, setting of this feature is conditioned to
2143 * 2. Later on, when conversion data is needed: poll for end of
2147 * - ADC low power mode "auto power-off" (feature available on
2157 * correspond to the current voltage level on the selected
2188 * @note On this STM32 series, setting of this feature is conditioned to
2219 * @note On this STM32 series, sampling time scope is on ADC instance:
2221 * (on some other STM32 families, sampling time is channel wise)
2230 * On this STM32 series, ADC processing time is:
2239 * @note On this STM32 series, setting of this feature is conditioned to
2241 * ADC must be disabled or enabled without conversion on going
2242 * on group regular.
2271 * @note On this STM32 series, sampling time scope is on ADC instance:
2273 * (on some other STM32 families, sampling time is channel wise)
2311 * @note On this STM32 series, setting trigger source to external trigger
2313 * (default setting for compatibility with some ADC on other
2317 * @note On this STM32 series, ADC trigger frequency mode must be set
2322 * depends on timers availability on the selected device.
2323 * @note On this STM32 series, setting of this feature is conditioned to
2355 * depends on timers availability on the selected device.
2372 /* Value for shift of {0; 4; 8; 12} depending on value of bitfield */ in LL_ADC_REG_GetTriggerSource()
2403 * @note On this STM32 series, setting of this feature is conditioned to
2436 * @note On this STM32 series, ADC group regular sequencer both modes
2449 * @note On this STM32 series, after modifying sequencer (functions
2456 * @note On this STM32 series, setting of this feature is conditioned to
2473 * @note On this STM32 series, ADC group regular sequencer both modes
2518 * (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
2526 * @note On this STM32 series, ADC group regular sequencer both modes
2530 * @note On this STM32 series, after modifying sequencer (functions
2539 * ADC conversion on only 1 channel.
2540 * @note On this STM32 series, setting of this feature is conditioned to
2542 * ADC must be disabled or enabled without conversion on going
2543 * on group regular.
2590 * (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
2598 * @note On this STM32 series, ADC group regular sequencer both modes
2603 * ADC conversion on only 1 channel.
2649 * @note On this STM32 series, parameter relevant only is sequencer is set
2652 * @note On some other STM32 series, this setting is not available and
2654 * @note On this STM32 series, after modifying sequencer (functions
2662 * @note On this STM32 series, setting of this feature is conditioned to
2679 * @note On this STM32 series, parameter relevant only is sequencer is set
2682 * @note On some other STM32 families, this setting is not available and
2701 * @note On this STM32 series, setting of this feature is conditioned to
2732 * @brief Set ADC group regular sequence: channel on the selected
2737 * @note On this STM32 series, ADC group regular sequencer is
2741 * @note Depending on devices and packages, some channels may not be available.
2743 * @note On this STM32 series, to measure internal channels (VrefInt,
2747 * @note On this STM32 series, after modifying sequencer (functions
2755 * @note On this STM32 series, setting of this feature is conditioned to
2757 * ADC must be disabled or enabled without conversion on going
2758 * on group regular.
2801 * (1) On STM32WL, parameter can be set in ADC group sequencer
2809 /* in register depending on parameter "Rank". */ in LL_ADC_REG_SetSequencerRanks()
2819 * @brief Get ADC group regular sequence: channel on the selected
2821 * @note On this STM32 series, ADC group regular sequencer is
2825 * @note Depending on devices and packages, some channels may not be available.
2829 * the returned channel number is only partly formatted on definition
2880 * (1) On STM32WL, parameter can be set in ADC group sequencer
2897 * @brief Set ADC group regular sequence: channel on rank corresponding to
2902 * (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
2905 * @note On this STM32 series, ADC group regular sequencer both modes
2912 * @note On this STM32 series, after modifying sequencer (functions
2920 * @note Depending on devices and packages, some channels may not be available.
2922 * @note On this STM32 series, to measure internal channels (VrefInt,
2926 * @note On this STM32 series, setting of this feature is conditioned to
2928 * ADC must be disabled or enabled without conversion on going
2929 * on group regular.
2976 * (1) On STM32WL, parameter can be set in ADC group sequencer
2989 * @brief Add channel to ADC group regular sequence: channel on rank corresponding to
2994 * (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
2997 * @note On this STM32 series, ADC group regular sequencer both modes
3004 * @note On this STM32 series, after modifying sequencer (functions
3012 * @note Depending on devices and packages, some channels may not be available.
3014 * @note On this STM32 series, to measure internal channels (VrefInt,
3018 * @note On this STM32 series, setting of this feature is conditioned to
3020 * ADC must be disabled or enabled without conversion on going
3021 * on group regular.
3068 * (1) On STM32WL, parameter can be set in ADC group sequencer
3081 * @brief Remove channel to ADC group regular sequence: channel on rank corresponding to
3086 * (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
3089 * @note On this STM32 series, ADC group regular sequencer both modes
3096 * @note On this STM32 series, after modifying sequencer (functions
3104 * @note Depending on devices and packages, some channels may not be available.
3106 * @note On this STM32 series, to measure internal channels (VrefInt,
3110 * @note On this STM32 series, setting of this feature is conditioned to
3112 * ADC must be disabled or enabled without conversion on going
3113 * on group regular.
3160 * (1) On STM32WL, parameter can be set in ADC group sequencer
3173 * @brief Get ADC group regular sequence: channel on rank corresponding to
3178 * (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
3179 * @note On this STM32 series, ADC group regular sequencer both modes
3186 * @note Depending on devices and packages, some channels may not be available.
3188 * @note On this STM32 series, to measure internal channels (VrefInt,
3192 * @note On this STM32 series, setting of this feature is conditioned to
3194 * ADC must be disabled or enabled without conversion on going
3195 * on group regular.
3242 * (1) On STM32WL, parameter can be set in ADC group sequencer
3272 * @brief Set ADC continuous conversion mode on ADC group regular.
3279 * @note On this STM32 series, setting of this feature is conditioned to
3295 * @brief Get ADC continuous conversion mode on ADC group regular.
3331 * @note On this STM32 series, setting of this feature is conditioned to
3390 * @note On this STM32 series, setting of this feature is conditioned to
3430 * @note On this device, sampling time is on channel scope: independently
3431 * of channel mapped on ADC group regular or injected.
3446 * @note On this STM32 series, setting of this feature is conditioned to
3448 * ADC must be disabled or enabled without conversion on going
3449 * on group regular.
3494 * (1) On STM32WL, parameter can be set in ADC group sequencer
3515 * @note On this device, sampling time is on channel scope: independently
3516 * of channel mapped on ADC group regular or injected.
3564 * (1) On STM32WL, parameter can be set in ADC group sequencer
3582 /* Select sampling time bitfield depending on sampling time bit value 0 or 1. */ in LL_ADC_GetChannelSamplingTime()
3598 * on ADC group regular.
3604 * @note On this STM32 series, there are 2 kinds of analog watchdog
3612 * - channels monitored: flexible on channels monitored, selection is
3617 * - groups monitored: not selection possible (monitoring on both
3619 * Channels selected are monitored on groups regular and injected:
3624 * @note On this STM32 series, setting of this feature is conditioned to
3667 /* in register and register position depending on parameter "AWDy". */ in LL_ADC_SetAnalogWDMonitChannels()
3691 * the returned channel number is only partly formatted on definition
3702 * @note On this STM32 series, there are 2 kinds of analog watchdog
3710 * - channels monitored: flexible on channels monitored, selection is
3715 * - groups monitored: not selection possible (monitoring on both
3717 * Channels selected are monitored on groups regular and injected:
3722 * @note On this STM32 series, setting of this feature is conditioned to
3724 * ADC must be disabled or enabled without conversion on going
3725 * on group regular.
3737 * (1) On this AWD number, monitored channel can be retrieved
3830 * @note On this STM32 series, there are 2 kinds of analog watchdog
3838 * - channels monitored: flexible on channels monitored, selection is
3843 * - groups monitored: not selection possible (monitoring on both
3845 * Channels selected are monitored on groups regular and injected:
3851 * impacted: the comparison of analog watchdog thresholds is done on
3856 * on 12 bits (ratio 16 and shift 4, or ratio 32 and shift 5, ...):
3859 * on 14 bits (ratio 16 and shift 2, or ratio 32 and shift 3, ...):
3862 * on 16 bits (ratio 16 and shift none, or ratio 32 and shift 1, ...):
3864 * @note On this STM32 series, setting of this feature is conditioned to
3866 * ADC must be disabled or enabled without conversion on going
3867 * on group regular.
3887 /* position in register and register position depending on parameter */ in LL_ADC_ConfigAnalogWDThresholds()
3911 * @note On this STM32 series, there are 2 kinds of analog watchdog
3919 * - channels monitored: flexible on channels monitored, selection is
3924 * - groups monitored: not selection possible (monitoring on both
3926 * Channels selected are monitored on groups regular and injected:
3932 * impacted: the comparison of analog watchdog thresholds is done on
3937 * on 12 bits (ratio 16 and shift 4, or ratio 32 and shift 5, ...):
3940 * on 14 bits (ratio 16 and shift 2, or ratio 32 and shift 3, ...):
3943 * on 16 bits (ratio 16 and shift none, or ratio 32 and shift 1, ...):
3945 * @note On this STM32 series, setting of this feature is not conditioned to
3947 * ADC can be disabled, enabled with or without conversion on going
3948 * on ADC group regular.
3970 /* position in register and register position depending on parameters */ in LL_ADC_SetAnalogWDThresholds()
4016 /* position in register and register position depending on parameters */ in LL_ADC_GetAnalogWDThresholds()
4042 * @note On this STM32 series, setting of this feature is conditioned to
4072 * on the selected ADC group.
4078 * @note On this STM32 series, setting of this feature is conditioned to
4095 * on the selected ADC group.
4117 * @note On this STM32 series, setting of this feature is conditioned to
4192 /** @defgroup ADC_LL_EF_Operation_ADC_Instance Operation on ADC hierarchical scope: ADC instance
4198 * @note On this STM32 series, there are three possibilities to enable
4206 * @note On this STM32 series, after ADC internal voltage regulator enable,
4211 * @note On this STM32 series, setting of this feature is conditioned to
4230 * @note On this STM32 series, setting of this feature is conditioned to
4255 * @note On this STM32 series, after ADC enable, a delay for
4259 * @note On this STM32 series, flag LL_ADC_FLAG_ADRDY is raised when the ADC
4262 * @note On this STM32 series, setting of this feature is conditioned to
4281 * @note On this STM32 series, setting of this feature is conditioned to
4283 * ADC must be not disabled. Must be enabled without conversion on going
4284 * on group regular.
4301 * @note On this STM32 series, flag LL_ADC_FLAG_ADRDY is raised when the ADC
4317 * @retval 0: no ADC disable command on going.
4327 * @note On this STM32 series, a minimum number of ADC clock cycles
4331 * On this STM32 series, ADC DMA transfer request should be disabled
4345 * @note On this STM32 series, setting of this feature is conditioned to
4377 /** @defgroup ADC_LL_EF_Operation_ADC_Group_Regular Operation on ADC hierarchical scope: group regu…
4383 * @note On this STM32 series, this function is relevant for both
4388 * will start at next trigger event (on the selected trigger edge)
4390 * @note On this STM32 series, setting of this feature is conditioned to
4392 * ADC must be enabled without conversion on going on group regular,
4393 * without conversion stop command on going on group regular,
4394 * without ADC disable command on going.
4411 * @note On this STM32 series, setting of this feature is conditioned to
4413 * ADC must be enabled with conversion on going on group regular,
4414 * without ADC disable command on going.
4433 * @retval 0: no conversion is on going on ADC group regular.
4444 * @retval 0: no command of conversion stop is on going on ADC group regular.
4535 * @note On this STM32 series, flag LL_ADC_FLAG_ADRDY is raised when the ADC
4549 * @note On this STM32 series, after modifying sequencer
4664 * @note On this STM32 series, flag LL_ADC_FLAG_ADRDY is raised when the ADC