Lines Matching full:with
14 * If no LICENSE file comes with this software, it is provided AS-IS.
129 …_0) /* Trigger edge set to rising edge (default setting for compatibility with some ADC on other S…
132 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
140 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
157 …_0) /* Trigger edge set to rising edge (default setting for compatibility with some ADC on other S…
160 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
168 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
200 …MBER_MASK with reduced range: on this STM32 series, ADC group regular sequencer, if set to mode "f…
430 …TP | ADC_CR_ADSTART | ADC_CR_ADDIS | ADC_CR_ADEN) /* ADC register CR bits with HW property "rs": S…
432 …RT | ADC_CR_ADSTART | ADC_CR_ADDIS | ADC_CR_ADEN) /* ADC register CR bits with HW property "rs": S…
439 … (3600UL) /* Analog voltage reference (Vref+) value with which temperature s…
445 … (3000UL) /* Analog voltage reference (Vref+) voltage with which temperature s…
515 * (setting possible with ADC enabled without conversion on going,
516 * ADC enabled with conversion on going, ...)
517 * Each feature can be updated afterwards with a unitary function
518 * and potentially with ADC in a different state than disabled,
528 …ADC clock synchronous (from PCLK) with prescaler 1 must be enabled only if PCLK has a 50% duty clo…
557 * (functions with prefix "REG").
564 * (setting possible with ADC enabled without conversion on going,
565 * ADC enabled with conversion on going, ...)
566 * Each feature can be updated afterwards with a unitary function
567 * and potentially with ADC in a different state than disabled,
576 …(default setting for compatibility with some ADC on other STM32 families having this setting set b…
620 * (functions with prefix "INJ").
627 * (setting possible with ADC enabled without conversion on going,
628 * ADC enabled with conversion on going, ...)
629 * Each feature can be updated afterwards with a unitary function
630 * and potentially with ADC in a different state than disabled,
639 …(default setting for compatibility with some ADC on other STM32 families having this setting set b…
676 * @brief Flags defines which can be used with LL_ADC_ReadReg function
702 * @brief IT defines which can be used with LL_ADC_ReadReg and LL_ADC_WriteReg functions
727 /** @defgroup ADC_LL_EC_REGISTERS ADC registers compliant with specific purpose
730 /* List of ADC registers intended to be used (most commonly) with */
733 …egular conversion data register (corresponding to register DR) to be used with ADC configured in i…
743 … ) /*!< ADC synchronous clock derived from AHB clock with prescaler division …
744 …MODE_0) /*!< ADC synchronous clock derived from AHB clock with prescaler division …
747 …_PRESC_0) /*!< ADC asynchronous clock with prescaler division …
748 …_PRESC_1 ) /*!< ADC asynchronous clock with prescaler division …
749 …_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with prescaler division …
750 …_PRESC_2 ) /*!< ADC asynchronous clock with prescaler division …
751 …_PRESC_2 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with prescaler division …
752 …_PRESC_2 | ADC_CCR_PRESC_1 ) /*!< ADC asynchronous clock with prescaler division …
753 …_PRESC_2 | ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with prescaler division …
754 …_PRESC_3) /*!< ADC asynchronous clock with prescaler division …
755 …_PRESC_3 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with prescaler division …
756 …_PRESC_3 | ADC_CCR_PRESC_1) /*!< ADC asynchronous clock with prescaler division …
757 …_PRESC_3 | ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with prescaler division …
816 …en necessary (when previous ADC conversion data is read). See description with function @ref LL_AD…
817 …n a new ADC conversion is triggered (with startup time between trigger and start of sampling). See…
818 …DC low power modes auto wait and auto power-off combined. See description with function @ref LL_AD…
820 …en necessary (when previous ADC conversion data is read). See description with function @ref LL_AD…
982 …mber of ADC conversions) is reached. This ADC mode is intended to be used with DMA mode non-circul…
983 …sferred (number of ADC conversions). This ADC mode is intended to be used with DMA mode circular. …
1015 …LE_2RANKS (ADC_CHSELR_SQ3) /*!< ADC group regular sequencer enable with 2 ranks in the sequ…
1016 …LE_3RANKS (ADC_CHSELR_SQ4) /*!< ADC group regular sequencer enable with 3 ranks in the sequ…
1017 …LE_4RANKS (ADC_CHSELR_SQ5) /*!< ADC group regular sequencer enable with 4 ranks in the sequ…
1018 …LE_5RANKS (ADC_CHSELR_SQ6) /*!< ADC group regular sequencer enable with 5 ranks in the sequ…
1019 …LE_6RANKS (ADC_CHSELR_SQ7) /*!< ADC group regular sequencer enable with 6 ranks in the sequ…
1020 …LE_7RANKS (ADC_CHSELR_SQ8) /*!< ADC group regular sequencer enable with 7 ranks in the sequ…
1021 …LE_8RANKS (0x00000000UL) /*!< ADC group regular sequencer enable with 8 ranks in the sequ…
1024 … ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 2 ranks in the sequ…
1025 … ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 3 ranks in the sequ…
1026 … ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 4 ranks in the sequ…
1027 …_2 ) /*!< ADC group regular sequencer enable with 5 ranks in the sequ…
1028 …_2 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 6 ranks in the sequ…
1029 …_2 | ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 7 ranks in the sequ…
1030 …_2 | ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 8 ranks in the sequ…
1031 … ) /*!< ADC group regular sequencer enable with 9 ranks in the sequ…
1032 … | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 10 ranks in the seq…
1033 … | ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 11 ranks in the seq…
1034 … | ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 12 ranks in the seq…
1035 …_2 ) /*!< ADC group regular sequencer enable with 13 ranks in the seq…
1036 …_2 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 14 ranks in the seq…
1037 …_2 | ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 15 ranks in the seq…
1038 …_2 | ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 16 ranks in the seq…
1048 …ber to highest channel number (scan of all ranks, ADC conversion of ranks with channels enabled in…
1049 …mber to lowest channel number (scan of all ranks, ADC conversion of ranks with channels enabled in…
1060 … /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
1062 …C_CFGR_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
1063 …_CFGR_DISCEN) /*!< ADC group regular sequencer discontinuous mode enabled with sequence interrupti…
1064 …C_CFGR_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
1065 …C_CFGR_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
1066 …C_CFGR_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
1067 …C_CFGR_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
1068 …C_CFGR_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
1069 …C_CFGR_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
1140 …njected conversion trigger from ADC group regular. Setting compliant only with group injected trig…
1159 … ( ADC_JSQR_JL_0) /*!< ADC group injected sequencer enable with 2 ranks in the sequ…
1160 … (ADC_JSQR_JL_1 ) /*!< ADC group injected sequencer enable with 3 ranks in the sequ…
1161 … (ADC_JSQR_JL_1 | ADC_JSQR_JL_0) /*!< ADC group injected sequencer enable with 4 ranks in the sequ…
1170 …_JDISCEN) /*!< ADC group injected sequencer discontinuous mode enable with sequence interrupti…
1366 …f ADC group regular. Literal suffix "continued" is kept for compatibility with other STM32 devices…
1526 * number is returned, either defined with number
1527 * or with bitfield (only one bit must be set).
1601 * comparison with internal channel parameter to be done
1642 * number in ADC registers. The differentiation is made only with
1750 * number in ADC registers. The differentiation is made only with
1770 * define a single channel to monitor with analog watchdog
1772 * @note To be used with function @ref LL_ADC_SetAnalogWDMonitChannels().
1804 * comparison with internal channel parameter to be done
1841 * define a single channel to monitor with analog watchdog
1843 * @note To be used with function @ref LL_ADC_SetAnalogWDMonitChannels().
1875 * comparison with internal channel parameter to be done
1971 * @note To be used with function @ref LL_ADC_ConfigAnalogWDThresholds()
1973 * Example, with a ADC resolution of 8 bits, to set the value of
1994 * @note To be used with function @ref LL_ADC_GetAnalogWDThresholds().
1995 * Example, with a ADC resolution of 8 bits, to get the value of
2015 * @note To be used with function @ref LL_ADC_GetAnalogWDThresholds().
2028 * @brief Helper macro to set the ADC calibration value with both single ended
2030 * @note To be used with function @ref LL_ADC_SetCalibrationFactor().
2048 * - Multimode (for devices with several ADC instances)
2067 * @note This check is required by functions with setting conditioned to
2071 * @note On devices with only 1 ADC common instance, parameter of this macro
2073 * with devices featuring several ADC common instances).
2168 * On devices with small package, the pin Vref+ is not present
2201 * with TS_ADC_DATA = temperature sensor raw data measured by ADC
2259 * with TS_ADC_DATA = temperature sensor raw data measured by ADC
2266 * of the current device has characteristics in line with
2337 * intended to be used (most commonly) with DMA transfer.
2341 * @note This macro is intended to be used with LL DMA driver, refer to
2349 * @note For devices with several ADC: in multimode, some devices
2389 * This check can be done with function @ref LL_ADC_IsEnabled() for each
2481 * This check can be done with function @ref LL_ADC_IsEnabled() for each
2522 * This check can be done with function @ref LL_ADC_IsEnabled() for each
2552 * This check can be done with function @ref LL_ADC_IsEnabled() for each
2659 * or differential (for devices with differential mode available).
2663 * @note For devices with differential mode available:
2693 * or differential (for devices with differential mode available).
2697 * @note For devices with differential mode available:
2735 * or differential (for devices with differential mode available).
2738 * @note For devices with differential mode available:
2753 * or differential (for devices with differential mode available).
2756 * @note For devices with differential mode available:
2769 /* Retrieve bits with position in register depending on parameter */ in LL_ADC_GetCalibrationFactor()
2771 /* Parameter used with mask "ADC_SINGLEDIFF_CALIB_FACTOR_MASK" because */ in LL_ADC_GetCalibrationFactor()
2883 * - It is not recommended to use with interruption or DMA
2889 * - Do use with polling: 1. Start conversion,
2898 * (with startup time between trigger and start of sampling).
2899 * This feature can be combined with low power mode "auto wait".
2900 * @note With ADC low power mode "auto wait", the ADC conversion data read
2947 * - It is not recommended to use with interruption or DMA
2953 * - Do use with polling: 1. Start conversion,
2962 * (with startup time between trigger and start of sampling).
2963 * This feature can be combined with low power mode "auto wait".
2964 * @note With ADC low power mode "auto wait", the ADC conversion data read
3000 * @note Usage of ADC trigger frequency mode with ADC low power mode:
3140 * with the lowest value is considered for the subtraction.
3212 * with parts of literals LL_ADC_CHANNEL_x or using
3217 * process the returned value with the helper macro
3258 * comparison with internal channel parameter to be done
3369 * (default setting for compatibility with some ADC on other
3455 /* to match with triggers literals definition. */ in LL_ADC_REG_GetTriggerSource()
3468 /* to match with triggers literals definition. */ in LL_ADC_REG_GetTriggerSource()
3601 * - For devices with sequencer fully configurable
3611 * - For devices with sequencer not fully configurable
3683 * - For devices with sequencer fully configurable
3693 * - For devices with sequencer not fully configurable
3965 /* Set bits with content of parameter "Channel" with bits position */ in LL_ADC_REG_SetSequencerRanks()
3967 /* Parameters "Rank" and "Channel" are used with masks because containing */ in LL_ADC_REG_SetSequencerRanks()
3973 /* Set bits with content of parameter "Channel" with bits position */ in LL_ADC_REG_SetSequencerRanks()
3975 /* Parameters "Rank" and "Channel" are used with masks because containing */ in LL_ADC_REG_SetSequencerRanks()
3998 * with parts of literals LL_ADC_CHANNEL_x or using
4003 * process the returned value with the helper macro
4068 * comparison with internal channel parameter to be done
4103 * This function can be used with setting "not fully configurable".
4170 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_REG_SetSequencerChannels()
4188 * This function can be used with setting "not fully configurable".
4255 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_REG_SetSequencerChAdd()
4273 * This function can be used with setting "not fully configurable".
4340 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_REG_SetSequencerChRem()
4356 * This function can be used with setting "not fully configurable".
4503 * This ADC mode is intended to be used with DMA mode non-circular.
4507 * This ADC mode is intended to be used with DMA mode circular.
4545 * This ADC mode is intended to be used with DMA mode non-circular.
4549 * This ADC mode is intended to be used with DMA mode circular.
4578 * @note Compatibility with devices without feature overrun:
4582 * Therefore, for compatibility with all devices, parameter
4639 * (default setting for compatibility with some ADC on other
4647 * ADC must not be disabled. Can be enabled with or without conversion
4700 /* to match with triggers literals definition. */ in LL_ADC_INJ_GetTriggerSource()
4728 * ADC must not be disabled. Can be enabled with or without conversion
4768 * ADC must not be disabled. Can be enabled with or without conversion
4851 * ADC must not be disabled. Can be enabled with or without conversion
4893 /* Set bits with content of parameter "Channel" with bits position */ in LL_ADC_INJ_SetSequencerRanks()
4895 /* Parameters "Rank" and "Channel" are used with masks because containing */ in LL_ADC_INJ_SetSequencerRanks()
4911 * with parts of literals LL_ADC_CHANNEL_x or using
4916 * process the returned value with the helper macro
4955 * comparison with internal channel parameter to be done
4970 * updated after one ADC conversion trigger and with data
4978 * ADC group injected automatic trigger is compliant only with
5101 * ADC must not be disabled. Can be enabled with or without conversion
5246 /* Set bits with content of parameter "Rankx_Channel" with bits position */ in LL_ADC_INJ_ConfigQueueContext()
5248 /* Parameters "Rankx_Channel" and "LL_ADC_INJ_RANK_x" are used with masks */ in LL_ADC_INJ_ConfigQueueContext()
5360 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_SetChannelSamplingTime()
5454 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_SetChannelSamplingTime()
5461 /* Set bits with content of parameter "SamplingTime" with bits position */ in LL_ADC_SetChannelSamplingTime()
5463 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_SetChannelSamplingTime()
5763 * with analog watchdog from sequencer channel definition,
5887 /* Set bits with content of parameter "AWDChannelGroup" with bits position */ in LL_ADC_SetAnalogWDMonitChannels()
5889 /* Parameters "AWDChannelGroup" and "AWDy" are used with masks because */ in LL_ADC_SetAnalogWDMonitChannels()
5906 * with parts of literals LL_ADC_CHANNEL_x or using
5911 * process the returned value with the helper macro
6169 /* Set bits with content of parameter "AWDThresholdxxxValue" with bits */ in LL_ADC_ConfigAnalogWDThresholds()
6172 /* Parameters "AWDy" and "AWDThresholdxxxValue" are used with masks because */ in LL_ADC_ConfigAnalogWDThresholds()
6250 /* Set bits with content of parameter "AWDThresholdValue" with bits */ in LL_ADC_SetAnalogWDThresholds()
6253 /* Parameters "AWDy" and "AWDThresholdValue" are used with masks because */ in LL_ADC_SetAnalogWDThresholds()
6273 * threshold low or raw data with ADC thresholds high and low
6275 * @note If raw data with ADC thresholds high and low is retrieved,
6561 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_EnableDeepPowerDown()
6563 /* to not interfere with bits with HW property "rs". */ in LL_ADC_EnableDeepPowerDown()
6584 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_DisableDeepPowerDown()
6586 /* to not interfere with bits with HW property "rs". */ in LL_ADC_DisableDeepPowerDown()
6618 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_EnableInternalRegulator()
6620 /* to not interfere with bits with HW property "rs". */ in LL_ADC_EnableInternalRegulator()
6669 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_Enable()
6671 /* to not interfere with bits with HW property "rs". */ in LL_ADC_Enable()
6689 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_Disable()
6691 /* to not interfere with bits with HW property "rs". */ in LL_ADC_Disable()
6725 * or differential (for devices with differential mode available).
6729 * @note For devices with differential mode available:
6748 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_StartCalibration()
6750 /* to not interfere with bits with HW property "rs". */ in LL_ADC_StartCalibration()
6758 * or differential (for devices with differential mode available).
6762 * @note For devices with differential mode available:
6781 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_StartCalibration()
6783 /* to not interfere with bits with HW property "rs". */ in LL_ADC_StartCalibration()
6829 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_REG_StartConversion()
6831 /* to not interfere with bits with HW property "rs". */ in LL_ADC_REG_StartConversion()
6841 * ADC must be enabled with conversion on going on group regular,
6849 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_REG_StopConversion()
6851 /* to not interfere with bits with HW property "rs". */ in LL_ADC_REG_StopConversion()
6883 * with feature oversampling).
6896 * @note For devices with feature oversampling: Oversampling
6911 * @note For devices with feature oversampling: Oversampling
6926 * @note For devices with feature oversampling: Oversampling
6941 * @note For devices with feature oversampling: Oversampling
6984 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_INJ_StartConversion()
6986 /* to not interfere with bits with HW property "rs". */ in LL_ADC_INJ_StartConversion()
6996 * ADC must be enabled with conversion on going on group injected,
7004 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_INJ_StopConversion()
7006 /* to not interfere with bits with HW property "rs". */ in LL_ADC_INJ_StopConversion()
7038 * with feature oversampling).
7063 * @note For devices with feature oversampling: Oversampling
7090 * @note For devices with feature oversampling: Oversampling
7117 * @note For devices with feature oversampling: Oversampling
7144 * @note For devices with feature oversampling: Oversampling