Lines Matching full:with
14 * If no LICENSE file comes with this software, it is provided AS-IS.
72 … compatibility with some ADC on other STM32 series
76 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
84 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
106 ADC_CHANNEL_ID_NUMBER_MASK with reduced range: on this STM32 series, ADC group regular sequencer,
107 if set to mode "fully configurable", can contain channels with a restricted channel number.
250 … | ADC_CR_ADSTART | ADC_CR_ADSTP) /* ADC register CR bits with
261 with which VrefInt has been calibrated in production
277 … with which temperature sensor has been calibrated in production
291 * @brief Driver macro reserved for internal use: isolate bits with the
353 * (setting possible with ADC enabled without conversion on going,
354 * ADC enabled with conversion on going, ...)
355 * Each feature can be updated afterwards with a unitary function
356 * and potentially with ADC in a different state than disabled,
380 * (functions with prefix "REG").
387 * (setting possible with ADC enabled without conversion on going,
388 * ADC enabled with conversion on going, ...)
389 * Each feature can be updated afterwards with a unitary function
390 * and potentially with ADC in a different state than disabled,
401 … with some ADC on other STM32 series having this setting set by HW
461 * @brief Flags defines which can be used with LL_ADC_ReadReg function
481 * @brief IT defines which can be used with LL_ADC_ReadReg and LL_ADC_WriteReg functions
501 /** @defgroup ADC_LL_EC_REGISTERS ADC registers compliant with specific purpose
504 /* List of ADC registers intended to be used (most commonly) with */
508 … (corresponding to register DR) to be used with ADC configured in independent
521 …DC_CLOCK_ASYNC_DIV2 (ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with
524 …DC_CLOCK_ASYNC_DIV4 (ADC_CCR_PRESC_1) /*!< ADC asynchronous clock with
527 …DC_CLOCK_ASYNC_DIV6 (ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with
530 …DC_CLOCK_ASYNC_DIV8 (ADC_CCR_PRESC_2) /*!< ADC asynchronous clock with
533 …DC_CLOCK_ASYNC_DIV10 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with
536 …DC_CLOCK_ASYNC_DIV12 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_1) /*!< ADC asynchronous clock with
540 … | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with
543 …DC_CLOCK_ASYNC_DIV32 (ADC_CCR_PRESC_3) /*!< ADC asynchronous clock with
546 …DC_CLOCK_ASYNC_DIV64 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with
549 …DC_CLOCK_ASYNC_DIV128 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_1) /*!< ADC asynchronous clock with
553 … | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with
605 … See description with function @ref LL_ADC_SetLPModeAutoWait(). */
609 /* Definitions for backward compatibility with legacy STM32 series */
620 … when a new ADC conversion is triggered (with startup time between trigger
621 and start of sampling). See description with function
623 It can be combined with mode low power mode auto wait. */
786 … This ADC mode is intended to be used with DMA mode non-circular. */
790 … This ADC mode is intended to be used with DMA mode circular. */
826 with 2 ranks in the sequence */
828 with 3 ranks in the sequence */
830 with 4 ranks in the sequence */
832 with 5 ranks in the sequence */
834 with 6 ranks in the sequence */
836 with 7 ranks in the sequence */
838 with 8 ranks in the sequence */
850 … (scan of all ranks, ADC conversion of ranks with channels enabled in
857 … (scan of all ranks, ADC conversion of ranks with channels enabled in
869 … discontinuous mode enable with sequence interruption every rank */
1018 … with other STM32 devices featuring ADC group injected, in this case other
1224 * number is returned, either defined with number
1225 * or with bitfield (only one bit must be set).
1284 * comparison with internal channel parameter to be done
1306 * number in ADC registers. The differentiation is made only with
1394 * number in ADC registers. The differentiation is made only with
1411 * define a single channel to monitor with analog watchdog
1413 * @note To be used with function @ref LL_ADC_SetAnalogWDMonitChannels().
1438 * comparison with internal channel parameter to be done
1468 * @note To be used with function @ref LL_ADC_ConfigAnalogWDThresholds()
1470 * Example, with a ADC resolution of 8 bits, to set the value of
1491 * @note To be used with function @ref LL_ADC_GetAnalogWDThresholds().
1492 * Example, with a ADC resolution of 8 bits, to get the value of
1512 * @note To be used with function @ref LL_ADC_GetAnalogWDThresholds().
1530 * - Multimode (for devices with several ADC instances)
1541 * @note This check is required by functions with setting conditioned to
1545 * @note On devices with only 1 ADC common instance, parameter of this macro
1547 * with devices featuring several ADC common instances).
1631 * On devices with small package, the pin Vref+ is not present
1665 * with TS_ADC_DATA = temperature sensor raw data measured by ADC
1728 * with TS_ADC_DATA = temperature sensor raw data measured by ADC
1735 * of the current device has characteristics in line with
1809 * intended to be used (most commonly) with DMA transfer.
1813 * @note This macro is intended to be used with LL DMA driver, refer to
1821 * @note For devices with several ADC: in multimode, some devices
1854 * This check can be done with function @ref LL_ADC_IsEnabled() for each
1927 * This check can be done with function @ref LL_ADC_IsEnabled() for each
1967 * This check can be done with function @ref LL_ADC_IsEnabled() for each
1995 * This check can be done with function @ref LL_ADC_IsEnabled() for each
2043 * or differential (for devices with differential mode available).
2065 * or differential (for devices with differential mode available).
2167 * - It is not recommended to use with interruption or DMA
2173 * - Do use with polling: 1. Start conversion,
2178 * @note With ADC low power mode "auto wait", the ADC conversion data read
2216 * - It is not recommended to use with interruption or DMA
2222 * - Do use with polling: 1. Start conversion,
2227 * @note With ADC low power mode "auto wait", the ADC conversion data read
2244 /* Definitions for backward compatibility with legacy STM32 series */
2254 * (with startup time between trigger and start of sampling).
2255 * This feature can be combined with low power mode "auto wait".
2277 * (with startup time between trigger and start of sampling).
2278 * This feature can be combined with low power mode "auto wait".
2331 * @note Usage of ADC trigger frequency mode with ADC low power mode:
2459 * (default setting for compatibility with some ADC on other
2522 /* to match with triggers literals definition. */ in LL_ADC_REG_GetTriggerSource()
2640 * - For devices with sequencer fully configurable
2650 * - For devices with sequencer not fully configurable
2704 * - For devices with sequencer fully configurable
2714 * - For devices with sequencer not fully configurable
2917 /* Set bits with content of parameter "Channel" with bits position */ in LL_ADC_REG_SetSequencerRanks()
2919 /* Parameters "Rank" and "Channel" are used with masks because containing */ in LL_ADC_REG_SetSequencerRanks()
2940 * with parts of literals LL_ADC_CHANNEL_x or using
2945 * process the returned value with the helper macro
2985 * comparison with internal channel parameter to be done
3010 * This function can be used with setting "not fully configurable".
3067 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_REG_SetSequencerChannels()
3085 * This function can be used with setting "not fully configurable".
3142 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_REG_SetSequencerChAdd()
3160 * This function can be used with setting "not fully configurable".
3217 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_REG_SetSequencerChRem()
3233 * This function can be used with setting "not fully configurable".
3355 * This ADC mode is intended to be used with DMA mode non-circular.
3359 * This ADC mode is intended to be used with DMA mode circular.
3393 * This ADC mode is intended to be used with DMA mode non-circular.
3397 * This ADC mode is intended to be used with DMA mode circular.
3421 * @note Compatibility with devices without feature overrun:
3425 * Therefore, for compatibility with all devices, parameter
3533 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_SetChannelSamplingTime()
3622 * with analog watchdog from sequencer channel definition,
3660 /* Set bits with content of parameter "AWDChannelGroup" with bits position */ in LL_ADC_SetAnalogWDMonitChannels()
3662 /* Parameters "AWDChannelGroup" and "AWDy" are used with masks because */ in LL_ADC_SetAnalogWDMonitChannels()
3687 * with parts of literals LL_ADC_CHANNEL_x or using
3692 * process the returned value with the helper macro
3834 /* Set bits with content of parameter "AWDThresholdxxxValue" with bits */ in LL_ADC_ConfigAnalogWDThresholds()
3837 /* Parameters "AWDy" and "AWDThresholdxxxValue" are used with masks because */ in LL_ADC_ConfigAnalogWDThresholds()
3875 * ADC can be disabled, enabled with or without conversion on going
3897 /* Set bits with content of parameter "AWDThresholdValue" with bits */ in LL_ADC_SetAnalogWDThresholds()
3900 /* Parameters "AWDy" and "AWDThresholdValue" are used with masks because */ in LL_ADC_SetAnalogWDThresholds()
3915 * threshold low or raw data with ADC thresholds high and low
3917 * @note If raw data with ADC thresholds high and low is retrieved,
3944 /* Set bits with content of parameter "AWDThresholdValue" with bits */ in LL_ADC_GetAnalogWDThresholds()
3947 /* Parameters "AWDy" and "AWDThresholdValue" are used with masks because */ in LL_ADC_GetAnalogWDThresholds()
4150 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_EnableInternalRegulator()
4152 /* to not interfere with bits with HW property "rs". */ in LL_ADC_EnableInternalRegulator()
4201 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_Enable()
4203 /* to not interfere with bits with HW property "rs". */ in LL_ADC_Enable()
4221 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_Disable()
4223 /* to not interfere with bits with HW property "rs". */ in LL_ADC_Disable()
4256 * or differential (for devices with differential mode available).
4260 * @note In case of usage of ADC with DMA transfer:
4284 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_StartCalibration()
4286 /* to not interfere with bits with HW property "rs". */ in LL_ADC_StartCalibration()
4331 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_REG_StartConversion()
4333 /* to not interfere with bits with HW property "rs". */ in LL_ADC_REG_StartConversion()
4343 * ADC must be enabled (potentially with conversion on going on group regular),
4351 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_REG_StopConversion()
4353 /* to not interfere with bits with HW property "rs". */ in LL_ADC_REG_StopConversion()
4385 * with feature oversampling).
4398 * @note For devices with feature oversampling: Oversampling
4413 * @note For devices with feature oversampling: Oversampling
4428 * @note For devices with feature oversampling: Oversampling
4443 * @note For devices with feature oversampling: Oversampling