Lines Matching full:with
14 * If no LICENSE file comes with this software, it is provided AS-IS.
117 … compatibility with some ADC on other STM32 series
121 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
129 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
147 … compatibility with some ADC on other STM32 series
151 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
159 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
364 … | ADC_CR_ADSTART | ADC_CR_ADSTP) /* ADC register CR bits with
375 with which VrefInt has been calibrated in production
397 … with which temperature sensor has been calibrated in production
454 (for devices with several ADC instances).
485 * (setting possible with ADC enabled without conversion on going,
486 * ADC enabled with conversion on going, ...)
487 * Each feature can be updated afterwards with a unitary function
488 * and potentially with ADC in a different state than disabled,
516 * (functions with prefix "REG").
523 * (setting possible with ADC enabled without conversion on going,
524 * ADC enabled with conversion on going, ...)
525 * Each feature can be updated afterwards with a unitary function
526 * and potentially with ADC in a different state than disabled,
537 … with some ADC on other STM32 series having this setting set by HW
586 * (functions with prefix "INJ").
593 * (setting possible with ADC enabled without conversion on going,
594 * ADC enabled with conversion on going, ...)
595 * Each feature can be updated afterwards with a unitary function
596 * and potentially with ADC in a different state than disabled,
607 … compatibility with some ADC on other STM32 series having this
648 * @brief Flags defines which can be used with LL_ADC_ReadReg function
716 * @brief IT defines which can be used with LL_ADC_ReadReg and LL_ADC_WriteReg functions
740 /** @defgroup ADC_LL_EC_REGISTERS ADC registers compliant with specific purpose
743 /* List of ADC registers intended to be used (most commonly) with */
747 … (corresponding to register DR) to be used with ADC configured in independent
753 … (corresponding to register CDR) to be used with ADC configured in multimode
754 (available on STM32 devices with several ADC instances).
768 AHB clock with prescaler division by 2 */
770 AHB clock with prescaler division by 4 */
773 …DC_CLOCK_ASYNC_DIV2 (ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with
775 …DC_CLOCK_ASYNC_DIV4 (ADC_CCR_PRESC_1) /*!< ADC asynchronous clock with
777 …DC_CLOCK_ASYNC_DIV6 (ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with
779 …DC_CLOCK_ASYNC_DIV8 (ADC_CCR_PRESC_2) /*!< ADC asynchronous clock with
781 …DC_CLOCK_ASYNC_DIV10 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with
783 …DC_CLOCK_ASYNC_DIV12 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_1) /*!< ADC asynchronous clock with
786 … | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with
788 …DC_CLOCK_ASYNC_DIV32 (ADC_CCR_PRESC_3) /*!< ADC asynchronous clock with
790 …DC_CLOCK_ASYNC_DIV64 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with
792 …DC_CLOCK_ASYNC_DIV128 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_1) /*!< ADC asynchronous clock with
795 … | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with
847 … See description with function @ref LL_ADC_SetLowPowerMode(). */
948 … shared with ADC internal channel connected to internal temperature sensor,
953 shared with ADC internal channel connected to Vbat,
1080 … This ADC mode is intended to be used with DMA mode non-circular. */
1084 … This ADC mode is intended to be used with DMA mode circular. */
1110 … with selection sampling time 2.5 ADC clock cycles, whatever channels mapped
1134 with 2 ranks in the sequence */
1136 with 3 ranks in the sequence */
1138 with 4 ranks in the sequence */
1140 with 5 ranks in the sequence */
1142 with 6 ranks in the sequence */
1144 with 7 ranks in the sequence */
1147 with 8 ranks in the sequence */
1149 with 9 ranks in the sequence */
1151 with 10 ranks in the sequence */
1153 with 11 ranks in the sequence */
1156 with 12 ranks in the sequence */
1158 with 13 ranks in the sequence */
1161 with 14 ranks in the sequence */
1164 with 15 ranks in the sequence */
1167 … with 16 ranks in the sequence */
1178 … discontinuous mode enable with sequence interruption every rank */
1180 … discontinuous mode enabled with sequence interruption every 2 ranks */
1182 … discontinuous mode enable with sequence interruption every 3 ranks */
1185 … discontinuous mode enable with sequence interruption every 4 ranks */
1187 … discontinuous mode enable with sequence interruption every 5 ranks */
1190 … discontinuous mode enable with sequence interruption every 6 ranks */
1193 … discontinuous mode enable with sequence interruption every 7 ranks */
1196 … discontinuous mode enable with sequence interruption every 8 ranks */
1335 … regular. Setting compliant only with group injected trigger source set to
1364 with 2 ranks in the sequence */
1366 with 3 ranks in the sequence */
1368 with 4 ranks in the sequence */
1379 enable with sequence interruption every rank */
1906 … alternate trigger. Works only with external triggers (not SW start) */
1922 with its individual DMA transfer settings */
1927 … is reached. This ADC mode is intended to be used with DMA mode
1933 … is reached. This ADC mode is intended to be used with DMA mode
1939 … This ADC mode is intended to be used with DMA mode circular.
1946 … This ADC mode is intended to be used with DMA mode circular.
2154 * number is returned, either defined with number
2155 * or with bitfield (only one bit must be set).
2190 * (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
2191 * (6) On STM32L4, parameter available on devices with several ADC instances.\n
2248 * (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
2249 * (6) On STM32L4, parameter available on devices with several ADC instances.\n
2254 * comparison with internal channel parameter to be done
2287 * number in ADC registers. The differentiation is made only with
2323 * (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
2324 * (6) On STM32L4, parameter available on devices with several ADC instances.\n
2381 * (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
2382 * (6) On STM32L4, parameter available on devices with several ADC instances.\n
2420 * number in ADC registers. The differentiation is made only with
2438 * (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
2439 * (6) On STM32L4, parameter available on devices with several ADC instances.
2501 * define a single channel to monitor with analog watchdog
2503 * @note To be used with function @ref LL_ADC_SetAnalogWDMonitChannels().
2542 * (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
2543 * (6) On STM32L4, parameter available on devices with several ADC instances.\n
2548 * comparison with internal channel parameter to be done
2649 * (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
2650 * (6) On STM32L4, parameter available on devices with several ADC instances.
2666 * @note To be used with function @ref LL_ADC_ConfigAnalogWDThresholds()
2668 * Example, with a ADC resolution of 8 bits, to set the value of
2689 * @note To be used with function @ref LL_ADC_GetAnalogWDThresholds().
2690 * Example, with a ADC resolution of 8 bits, to get the value of
2710 * @note To be used with function @ref LL_ADC_GetAnalogWDThresholds().
2724 * @brief Helper macro to set the ADC calibration value with both single ended
2726 * @note To be used with function @ref LL_ADC_SetCalibrationFactor().
2742 * or ADC slave from raw value with both ADC conversion data concatenated.
2745 * In this case the transferred data need to processed with this macro
2762 * @note In case of device with multimode available and a mix of
2763 * ADC instances compliant and not compliant with multimode feature,
2764 * ADC instances not compliant with multimode feature are
2788 * - Multimode (for devices with several ADC instances)
2807 * @note This check is required by functions with setting conditioned to
2811 * @note On devices with only 1 ADC common instance, parameter of this macro
2813 * with devices featuring several ADC common instances).
2911 * On devices with small package, the pin Vref+ is not present
2945 * with TS_ADC_DATA = temperature sensor raw data measured by ADC
3008 * with TS_ADC_DATA = temperature sensor raw data measured by ADC
3015 * of the current device has characteristics in line with
3088 * intended to be used (most commonly) with DMA transfer.
3092 * @note This macro is intended to be used with LL DMA driver, refer to
3100 * @note For devices with several ADC: in multimode, some devices
3112 * (1) Available on devices with several ADC instances.
3162 * This check can be done with function @ref LL_ADC_IsEnabled() for each
3349 * or differential (for devices with differential mode available).
3353 * @note For devices with differential mode available:
3389 * or differential (for devices with differential mode available).
3392 * @note For devices with differential mode available:
3405 /* Retrieve bits with position in register depending on parameter */ in LL_ADC_GetCalibrationFactor()
3407 /* Parameter used with mask "ADC_SINGLEDIFF_CALIB_FACTOR_MASK" because */ in LL_ADC_GetCalibrationFactor()
3506 * - It is not recommended to use with interruption or DMA
3512 * - Do use with polling: 1. Start conversion,
3517 * @note With ADC low power mode "auto wait", the ADC conversion data read
3556 * - It is not recommended to use with interruption or DMA
3562 * - Do use with polling: 1. Start conversion,
3567 * @note With ADC low power mode "auto wait", the ADC conversion data read
3598 * with the lowest value is considered for the subtraction.
3657 * (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
3658 * (6) On STM32L4, parameter available on devices with several ADC instances.\n
3682 * with parts of literals LL_ADC_CHANNEL_x or using
3687 * process the returned value with the helper macro
3735 * (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
3736 * (6) On STM32L4, parameter available on devices with several ADC instances.\n
3741 * comparison with internal channel parameter to be done
3885 * (default setting for compatibility with some ADC on other
3966 /* to match with triggers literals definition. */ in LL_ADC_REG_GetTriggerSource()
4027 * - For devices with sequencer fully configurable
4037 * - For devices with sequencer not fully configurable
4086 * - For devices with sequencer fully configurable
4096 * - For devices with sequencer not fully configurable
4280 * (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
4281 * (6) On STM32L4, parameter available on devices with several ADC instances.\n
4288 /* Set bits with content of parameter "Channel" with bits position */ in LL_ADC_REG_SetSequencerRanks()
4290 /* Parameters "Rank" and "Channel" are used with masks because containing */ in LL_ADC_REG_SetSequencerRanks()
4314 * with parts of literals LL_ADC_CHANNEL_x or using
4319 * process the returned value with the helper macro
4389 * (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
4390 * (6) On STM32L4, parameter available on devices with several ADC instances.\n
4395 * comparison with internal channel parameter to be done
4458 * This ADC mode is intended to be used with DMA mode non-circular.
4462 * This ADC mode is intended to be used with DMA mode circular.
4468 * @note For devices with several ADC instances: ADC multimode DMA
4498 * This ADC mode is intended to be used with DMA mode non-circular.
4502 * This ADC mode is intended to be used with DMA mode circular.
4508 * @note For devices with several ADC instances: ADC multimode DMA
4565 * @note Compatibility with devices without feature overrun:
4569 * Therefore, for compatibility with all devices, parameter
4615 * (default setting for compatibility with some ADC on other
4623 * ADC must not be disabled. Can be enabled with or without conversion
4696 /* to match with triggers literals definition. */ in LL_ADC_INJ_GetTriggerSource()
4724 * ADC must not be disabled. Can be enabled with or without conversion
4764 * ADC must not be disabled. Can be enabled with or without conversion
4847 * ADC must not be disabled. Can be enabled with or without conversion
4893 * (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
4894 * (6) On STM32L4, parameter available on devices with several ADC instances.\n
4901 /* Set bits with content of parameter "Channel" with bits position */ in LL_ADC_INJ_SetSequencerRanks()
4903 /* Parameters "Rank" and "Channel" are used with masks because containing */ in LL_ADC_INJ_SetSequencerRanks()
4921 * with parts of literals LL_ADC_CHANNEL_x or using
4926 * process the returned value with the helper macro
4972 * (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
4973 * (6) On STM32L4, parameter available on devices with several ADC instances.\n
4978 * comparison with internal channel parameter to be done
4994 * updated after one ADC conversion trigger and with data
5002 * ADC group injected automatic trigger is compliant only with
5125 * ADC must not be disabled. Can be enabled with or without conversion
5199 * (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
5200 * (6) On STM32L4, parameter available on devices with several ADC instances.\n
5237 * (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
5238 * (6) On STM32L4, parameter available on devices with several ADC instances.\n
5275 * (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
5276 * (6) On STM32L4, parameter available on devices with several ADC instances.\n
5313 * (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
5314 * (6) On STM32L4, parameter available on devices with several ADC instances.\n
5328 /* Set bits with content of parameter "Rankx_Channel" with bits position */ in LL_ADC_INJ_ConfigQueueContext()
5330 /* Parameters "Rankx_Channel" and "LL_ADC_INJ_RANK_x" are used with masks */ in LL_ADC_INJ_ConfigQueueContext()
5445 * (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
5446 * (6) On STM32L4, parameter available on devices with several ADC instances.\n
5466 /* Set bits with content of parameter "SamplingTime" with bits position */ in LL_ADC_SetChannelSamplingTime()
5468 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_SetChannelSamplingTime()
5543 * (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
5544 * (6) On STM32L4, parameter available on devices with several ADC instances.\n
5692 * with analog watchdog from sequencer channel definition,
5825 * (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
5826 * (6) On STM32L4, parameter available on devices with several ADC instances.
5831 /* Set bits with content of parameter "AWDChannelGroup" with bits position */ in LL_ADC_SetAnalogWDMonitChannels()
5833 /* Parameters "AWDChannelGroup" and "AWDy" are used with masks because */ in LL_ADC_SetAnalogWDMonitChannels()
5851 * with parts of literals LL_ADC_CHANNEL_x or using
5856 * process the returned value with the helper macro
6090 /* Set bits with content of parameter "AWDThresholdxxxValue" with bits */ in LL_ADC_ConfigAnalogWDThresholds()
6093 /* Parameters "AWDy" and "AWDThresholdxxxValue" are used with masks because */ in LL_ADC_ConfigAnalogWDThresholds()
6170 /* Set bits with content of parameter "AWDThresholdValue" with bits */ in LL_ADC_SetAnalogWDThresholds()
6173 /* Parameters "AWDy" and "AWDThresholdValue" are used with masks because */ in LL_ADC_SetAnalogWDThresholds()
6185 * threshold low or raw data with ADC thresholds high and low
6187 * @note If raw data with ADC thresholds high and low is retrieved,
6423 * or multimode (for devices with several ADC instances).
6430 * This check can be done with function @ref LL_ADC_IsEnabled() for each
6454 * or multimode (for devices with several ADC instances).
6480 * each ADC uses its own DMA channel, with its individual
6488 * This ADC mode is intended to be used with DMA mode non-circular.
6492 * This ADC mode is intended to be used with DMA mode circular.
6502 * is a raw data with ADC master and slave concatenated.
6531 * each ADC uses its own DMA channel, with its individual
6539 * This ADC mode is intended to be used with DMA mode non-circular.
6543 * This ADC mode is intended to be used with DMA mode circular.
6553 * is a raw data with ADC master and slave concatenated.
6583 * This check can be done with function @ref LL_ADC_IsEnabled() for each
6682 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_EnableDeepPowerDown()
6684 /* to not interfere with bits with HW property "rs". */ in LL_ADC_EnableDeepPowerDown()
6705 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_DisableDeepPowerDown()
6707 /* to not interfere with bits with HW property "rs". */ in LL_ADC_DisableDeepPowerDown()
6738 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_EnableInternalRegulator()
6740 /* to not interfere with bits with HW property "rs". */ in LL_ADC_EnableInternalRegulator()
6789 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_Enable()
6791 /* to not interfere with bits with HW property "rs". */ in LL_ADC_Enable()
6809 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_Disable()
6811 /* to not interfere with bits with HW property "rs". */ in LL_ADC_Disable()
6844 * or differential (for devices with differential mode available).
6848 * @note For devices with differential mode available:
6867 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_StartCalibration()
6869 /* to not interfere with bits with HW property "rs". */ in LL_ADC_StartCalibration()
6914 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_REG_StartConversion()
6916 /* to not interfere with bits with HW property "rs". */ in LL_ADC_REG_StartConversion()
6926 * ADC must be enabled with conversion on going on group regular,
6934 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_REG_StopConversion()
6936 /* to not interfere with bits with HW property "rs". */ in LL_ADC_REG_StopConversion()
6968 * with feature oversampling).
6981 * @note For devices with feature oversampling: Oversampling
6996 * @note For devices with feature oversampling: Oversampling
7011 * @note For devices with feature oversampling: Oversampling
7026 * @note For devices with feature oversampling: Oversampling
7041 * or raw data with ADC master and slave concatenated.
7042 * @note If raw data with ADC master and slave concatenated is retrieved,
7098 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_INJ_StartConversion()
7100 /* to not interfere with bits with HW property "rs". */ in LL_ADC_INJ_StartConversion()
7110 * ADC must be enabled with conversion on going on group injected,
7118 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_INJ_StopConversion()
7120 /* to not interfere with bits with HW property "rs". */ in LL_ADC_INJ_StopConversion()
7152 * with feature oversampling).
7178 * @note For devices with feature oversampling: Oversampling
7206 * @note For devices with feature oversampling: Oversampling
7234 * @note For devices with feature oversampling: Oversampling
7262 * @note For devices with feature oversampling: Oversampling