Lines Matching full:with
14 * If no LICENSE file comes with this software, it is provided AS-IS.
136 …_0) /* Trigger edge set to rising edge (default setting for compatibility with some ADC on other S…
139 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
147 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
164 …_0) /* Trigger edge set to rising edge (default setting for compatibility with some ADC on other S…
167 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
175 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
327 … /* Analog voltage reference (Vref+) value with which temperature s…
335 … /* Analog voltage reference (Vref+) voltage with which temperature s…
349 * @brief Driver macro reserved for internal use: isolate bits with the
420 * (setting possible with ADC enabled without conversion on going,
421 * ADC enabled with conversion on going, ...)
422 * Each feature can be updated afterwards with a unitary function
423 * and potentially with ADC in a different state than disabled,
456 * (functions with prefix "REG").
463 * (setting possible with ADC enabled without conversion on going,
464 * ADC enabled with conversion on going, ...)
465 * Each feature can be updated afterwards with a unitary function
466 * and potentially with ADC in a different state than disabled,
510 * (functions with prefix "INJ").
517 * (setting possible with ADC enabled without conversion on going,
518 * ADC enabled with conversion on going, ...)
519 * Each feature can be updated afterwards with a unitary function
520 * and potentially with ADC in a different state than disabled,
565 * @brief Flags defines which can be used with LL_ADC_ReadReg function
580 * @brief IT defines which can be used with LL_ADC_ReadReg and LL_ADC_WriteReg functions
591 /** @defgroup ADC_LL_EC_REGISTERS ADC registers compliant with specific purpose
594 /* List of ADC registers intended to be used (most commonly) with */
597 …egular conversion data register (corresponding to register DR) to be used with ADC configured in i…
606 …_ADCPRE_0) /*!< ADC asynchronous clock with prescaler division …
607 …_ADCPRE_1) /*!< ADC asynchronous clock with prescaler division …
651 …en necessary (when previous ADC conversion data is read). See description with function @ref LL_AD…
797 …mber of ADC conversions) is reached. This ADC mode is intended to be used with DMA mode non-circul…
798 …sferred (number of ADC conversions). This ADC mode is intended to be used with DMA mode circular. …
816 … ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 2 ranks in the sequ…
817 … ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 3 ranks in the sequ…
818 … ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 4 ranks in the sequ…
819 …_2 ) /*!< ADC group regular sequencer enable with 5 ranks in the sequ…
820 …_2 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 6 ranks in the sequ…
821 …_2 | ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 7 ranks in the sequ…
822 …_2 | ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 8 ranks in the sequ…
823 … ) /*!< ADC group regular sequencer enable with 9 ranks in the sequ…
824 … | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 10 ranks in the seq…
825 … | ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 11 ranks in the seq…
826 … | ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 12 ranks in the seq…
827 …_2 ) /*!< ADC group regular sequencer enable with 13 ranks in the seq…
828 …_2 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 14 ranks in the seq…
829 …_2 | ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 15 ranks in the seq…
830 …_2 | ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 16 ranks in the seq…
831 … ) /*!< ADC group regular sequencer enable with 17 ranks in the seq…
832 … | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 18 ranks in the seq…
833 … | ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 19 ranks in the seq…
834 … | ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 20 ranks in the seq…
835 …_2 ) /*!< ADC group regular sequencer enable with 21 ranks in the seq…
836 …_2 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 22 ranks in the seq…
837 …_2 | ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 23 ranks in the seq…
838 …_2 | ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 24 ranks in the seq…
839 … ) /*!< ADC group regular sequencer enable with 25 ranks in the seq…
840 … | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 26 ranks in the seq…
841 … | ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 27 ranks in the seq…
843 … | ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 28 ranks in the seq…
853 …DC_CR1_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
854 …C_CR1_DISCEN) /*!< ADC group regular sequencer discontinuous mode enabled with sequence interrupti…
855 …DC_CR1_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
856 …DC_CR1_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
857 …DC_CR1_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
858 …DC_CR1_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
859 …DC_CR1_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
860 …DC_CR1_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
936 …njected conversion trigger from ADC group regular. Setting compliant only with group injected trig…
946 … ( ADC_JSQR_JL_0) /*!< ADC group injected sequencer enable with 2 ranks in the sequ…
947 … (ADC_JSQR_JL_1 ) /*!< ADC group injected sequencer enable with 3 ranks in the sequ…
948 … (ADC_JSQR_JL_1 | ADC_JSQR_JL_0) /*!< ADC group injected sequencer enable with 4 ranks in the sequ…
957 …JDISCEN) /*!< ADC group injected sequencer discontinuous mode enable with sequence interrupti…
1240 * number is returned, either defined with number
1241 * or with bitfield (only one bit must be set).
1283 …* (2) On STM32L1, for devices with feature 'channels banks' available: Channel different i…
1284 …* (3) On STM32L1, for devices with feature 'channels banks' available: Channel common to b…
1340 …* (2) On STM32L1, for devices with feature 'channels banks' available: Channel different i…
1341 …* (3) On STM32L1, for devices with feature 'channels banks' available: Channel common to b…
1345 * comparison with internal channel parameter to be done
1412 * number in ADC registers. The differentiation is made only with
1455 …* (2) On STM32L1, for devices with feature 'channels banks' available: Channel different i…
1456 …* (3) On STM32L1, for devices with feature 'channels banks' available: Channel common to b…
1519 …* (2) On STM32L1, for devices with feature 'channels banks' available: Channel different i…
1520 …* (3) On STM32L1, for devices with feature 'channels banks' available: Channel common to b…
1558 * number in ADC registers. The differentiation is made only with
1570 …* (2) On STM32L1, for devices with feature 'channels banks' available: Channel different i…
1571 …* (3) On STM32L1, for devices with feature 'channels banks' available: Channel common to b…
1607 * define a single channel to monitor with analog watchdog
1609 * @note To be used with function @ref LL_ADC_SetAnalogWDMonitChannels().
1655 …* (2) On STM32L1, for devices with feature 'channels banks' available: Channel different i…
1656 …* (3) On STM32L1, for devices with feature 'channels banks' available: Channel common to b…
1660 * comparison with internal channel parameter to be done
1787 …* (2) On STM32L1, for devices with feature 'channels banks' available: Channel different i…
1788 …* (3) On STM32L1, for devices with feature 'channels banks' available: Channel common to b…
1806 * @note To be used with function @ref LL_ADC_SetAnalogWDThresholds().
1807 * Example, with a ADC resolution of 8 bits, to set the value of
1828 * @note To be used with function @ref LL_ADC_GetAnalogWDThresholds().
1829 * Example, with a ADC resolution of 8 bits, to get the value of
1851 * - Multimode (for devices with several ADC instances)
1862 * @note This check is required by functions with setting conditioned to
1866 * @note On devices with only 1 ADC common instance, parameter of this macro
1868 * with devices featuring several ADC common instances).
1950 * On devices with small package, the pin Vref+ is not present
1988 * with TS_ADC_DATA = temperature sensor raw data measured by ADC
2047 * with TS_ADC_DATA = temperature sensor raw data measured by ADC
2054 * of the current device has characteristics in line with
2125 * intended to be used (most commonly) with DMA transfer.
2129 * @note This macro is intended to be used with LL DMA driver, refer to
2137 * @note For devices with several ADC: in multimode, some devices
2340 * - Do not use with interruption or DMA since these modes
2343 * - Do use with polling: 1. Start conversion,
2350 * @note With ADC low power mode "auto wait", the ADC conversion data read
2391 * - Do not use with interruption or DMA since these modes
2394 * - Do use with polling: 1. Start conversion,
2401 * @note With ADC low power mode "auto wait", the ADC conversion data read
2432 * (with startup time between trigger and start of sampling).
2433 * This feature can be combined with low power mode "auto wait".
2457 * (with startup time between trigger and start of sampling).
2458 * This feature can be combined with low power mode "auto wait".
2653 /* to match with triggers literals definition. */ in LL_ADC_REG_GetTriggerSource()
2697 * - For devices with sequencer fully configurable
2707 * - For devices with sequencer not fully configurable
2772 * - For devices with sequencer fully configurable
2782 * - For devices with sequencer not fully configurable
3011 …* (2) On STM32L1, for devices with feature 'channels banks' available: Channel different i…
3012 …* (3) On STM32L1, for devices with feature 'channels banks' available: Channel common to b…
3019 /* Set bits with content of parameter "Channel" with bits position */ in LL_ADC_REG_SetSequencerRanks()
3021 /* Parameters "Rank" and "Channel" are used with masks because containing */ in LL_ADC_REG_SetSequencerRanks()
3043 * with parts of literals LL_ADC_CHANNEL_x or using
3048 * process the returned value with the helper macro
3151 …* (2) On STM32L1, for devices with feature 'channels banks' available: Channel different i…
3152 …* (3) On STM32L1, for devices with feature 'channels banks' available: Channel common to b…
3156 * comparison with internal channel parameter to be done
3214 * This ADC mode is intended to be used with DMA mode non-circular.
3218 * This ADC mode is intended to be used with DMA mode circular.
3248 * This ADC mode is intended to be used with DMA mode non-circular.
3252 * This ADC mode is intended to be used with DMA mode circular.
3277 * @note This feature is aimed to be set when using ADC with
3394 /* to match with triggers literals definition. */ in LL_ADC_INJ_GetTriggerSource()
3580 …* (2) On STM32L1, for devices with feature 'channels banks' available: Channel different i…
3581 …* (3) On STM32L1, for devices with feature 'channels banks' available: Channel common to b…
3588 /* Set bits with content of parameter "Channel" with bits position */ in LL_ADC_INJ_SetSequencerRanks()
3590 /* Parameters "Rank" and "Channel" are used with masks because containing */ in LL_ADC_INJ_SetSequencerRanks()
3606 * with parts of literals LL_ADC_CHANNEL_x or using
3611 * process the returned value with the helper macro
3664 …* (2) On STM32L1, for devices with feature 'channels banks' available: Channel different i…
3665 …* (3) On STM32L1, for devices with feature 'channels banks' available: Channel common to b…
3669 * comparison with internal channel parameter to be done
3684 * updated after one ADC conversion trigger and with data
3692 * ADC group injected automatic trigger is compliant only with
3887 …* (2) On STM32L1, for devices with feature 'channels banks' available: Channel different i…
3888 …* (3) On STM32L1, for devices with feature 'channels banks' available: Channel common to b…
3904 /* Set bits with content of parameter "SamplingTime" with bits position */ in LL_ADC_SetChannelSamplingTime()
3906 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_SetChannelSamplingTime()
3997 …* (2) On STM32L1, for devices with feature 'channels banks' available: Channel different i…
3998 …* (3) On STM32L1, for devices with feature 'channels banks' available: Channel common to b…
4112 * with analog watchdog from sequencer channel definition,
4246 …* (2) On STM32L1, for devices with feature 'channels banks' available: Channel different i…
4247 …* (3) On STM32L1, for devices with feature 'channels banks' available: Channel common to b…
4265 * with parts of literals LL_ADC_CHANNEL_x or using
4270 * process the returned value with the helper macro
4388 …* (2) On STM32L1, for devices with feature 'channels banks' available: Channel different i…
4389 …* (3) On STM32L1, for devices with feature 'channels banks' available: Channel common to b…
4584 * with feature oversampling).
4597 * @note For devices with feature oversampling: Oversampling
4612 * @note For devices with feature oversampling: Oversampling
4627 * @note For devices with feature oversampling: Oversampling
4642 * @note For devices with feature oversampling: Oversampling
4726 * with feature oversampling).
4751 * @note For devices with feature oversampling: Oversampling
4778 * @note For devices with feature oversampling: Oversampling
4805 * @note For devices with feature oversampling: Oversampling
4832 * @note For devices with feature oversampling: Oversampling