Lines Matching full:with
14 * If no LICENSE file comes with this software, it is provided AS-IS.
52 …_0) /* Trigger edge set to rising edge (default setting for compatibility with some ADC on other S…
55 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
63 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
187 …TP | ADC_CR_ADSTART | ADC_CR_ADDIS | ADC_CR_ADEN) /* ADC register CR bits with HW property "rs": S…
193 … (3000U) /* Analog voltage reference (Vref+) value with which temperature s…
204 … (3000U) /* Analog voltage reference (Vref+) voltage with which temperature s…
261 * (setting possible with ADC enabled without conversion on going,
262 * ADC enabled with conversion on going, ...)
263 * Each feature can be updated afterwards with a unitary function
264 * and potentially with ADC in a different state than disabled,
273 …ADC clock synchronous (from PCLK) with prescaler 1 must be enabled only if PCLK has a 50% duty clo…
302 * (functions with prefix "REG").
309 * (setting possible with ADC enabled without conversion on going,
310 * ADC enabled with conversion on going, ...)
311 * Each feature can be updated afterwards with a unitary function
312 * and potentially with ADC in a different state than disabled,
321 …(default setting for compatibility with some ADC on other STM32 families having this setting set b…
363 * @brief Flags defines which can be used with LL_ADC_ReadReg function
378 * @brief IT defines which can be used with LL_ADC_ReadReg and LL_ADC_WriteReg functions
392 /** @defgroup ADC_LL_EC_REGISTERS ADC registers compliant with specific purpose
395 /* List of ADC registers intended to be used (most commonly) with */
398 …egular conversion data register (corresponding to register DR) to be used with ADC configured in i…
407 …_PRESC_0) /*!< ADC asynchronous clock with prescaler division …
408 …_PRESC_1 ) /*!< ADC asynchronous clock with prescaler division …
409 …_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with prescaler division …
410 …_PRESC_2 ) /*!< ADC asynchronous clock with prescaler division …
411 …_PRESC_2 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with prescaler division …
412 …_PRESC_2 | ADC_CCR_PRESC_1 ) /*!< ADC asynchronous clock with prescaler division …
413 …_PRESC_2 | ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with prescaler division …
414 …_PRESC_3) /*!< ADC asynchronous clock with prescaler division …
415 …_PRESC_3 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with prescaler division …
416 …_PRESC_3 | ADC_CCR_PRESC_1) /*!< ADC asynchronous clock with prescaler division …
417 …_PRESC_3 | ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with prescaler division …
486 …en necessary (when previous ADC conversion data is read). See description with function @ref LL_AD…
487 …n a new ADC conversion is triggered (with startup time between trigger and start of sampling). See…
488 …DC low power modes auto wait and auto power-off combined. See description with function @ref LL_AD…
592 …mber of ADC conversions) is reached. This ADC mode is intended to be used with DMA mode non-circul…
593 …sferred (number of ADC conversions). This ADC mode is intended to be used with DMA mode circular. …
610 …ber to highest channel number (scan of all ranks, ADC conversion of ranks with channels enabled in…
611 …mber to lowest channel number (scan of all ranks, ADC conversion of ranks with channels enabled in…
620 … /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
695 …f ADC group regular. Literal suffix "continued" is kept for compatibility with other STM32 devices…
842 * number is returned, either defined with number
843 * or with bitfield (only one bit must be set).
1035 * comparison with internal channel parameter to be done
1059 * number in ADC registers. The differentiation is made only with
1165 * number in ADC registers. The differentiation is made only with
1195 * define a single channel to monitor with analog watchdog
1197 * @note To be used with function @ref LL_ADC_SetAnalogWDMonitChannels().
1228 * comparison with internal channel parameter to be done
1267 * @note To be used with function @ref LL_ADC_ConfigAnalogWDThresholds()
1269 * Example, with a ADC resolution of 8 bits, to set the value of
1290 * @note To be used with function @ref LL_ADC_GetAnalogWDThresholds().
1291 * Example, with a ADC resolution of 8 bits, to get the value of
1311 * @note To be used with function @ref LL_ADC_GetAnalogWDThresholds().
1336 * - Multimode (for devices with several ADC instances)
1347 * @note This check is required by functions with setting conditioned to
1351 * @note On devices with only 1 ADC common instance, parameter of this macro
1353 * with devices featuring several ADC common instances).
1435 * On devices with small package, the pin Vref+ is not present
1476 * with TS_ADC_DATA = temperature sensor raw data measured by ADC
1539 * with TS_ADC_DATA = temperature sensor raw data measured by ADC
1546 * of the current device has characteristics in line with
1617 * intended to be used (most commonly) with DMA transfer.
1621 * @note This macro is intended to be used with LL DMA driver, refer to
1629 * @note For devices with several ADC: in multimode, some devices
1661 * This check can be done with function @ref LL_ADC_IsEnabled() for each
1778 * This check can be done with function @ref LL_ADC_IsEnabled() for each
1900 * or differential (for devices with differential mode available).
1922 * or differential (for devices with differential mode available).
2024 * - Do not use with interruption or DMA since these modes
2027 * - Do use with polling: 1. Start conversion,
2036 * (with startup time between trigger and start of sampling).
2037 * This feature can be combined with low power mode "auto wait".
2038 * @note With ADC low power mode "auto wait", the ADC conversion data read
2079 * - Do not use with interruption or DMA since these modes
2082 * - Do use with polling: 1. Start conversion,
2091 * (with startup time between trigger and start of sampling).
2092 * This feature can be combined with low power mode "auto wait".
2093 * @note With ADC low power mode "auto wait", the ADC conversion data read
2198 * (default setting for compatibility with some ADC on other
2267 /* to match with triggers literals definition. */ in LL_ADC_REG_GetTriggerSource()
2471 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_REG_SetSequencerChannels()
2549 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_REG_SetSequencerChAdd()
2627 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_REG_SetSequencerChRem()
2776 * This ADC mode is intended to be used with DMA mode non-circular.
2780 * This ADC mode is intended to be used with DMA mode circular.
2814 * This ADC mode is intended to be used with DMA mode non-circular.
2818 * This ADC mode is intended to be used with DMA mode circular.
2842 * @note Compatibility with devices without feature overrun:
2846 * Therefore, for compatibility with all devices, parameter
2894 * with analog watchdog from sequencer channel definition,
2953 * with parts of literals LL_ADC_CHANNEL_x or using
2958 * process the returned value with the helper macro
3005 /* with bitfield. */ in LL_ADC_GetAnalogWDMonitChannels()
3075 /* Parameter "AWDThresholdsHighLow" is used with mask "0x00000010" */ in LL_ADC_SetAnalogWDThresholds()
3086 * threshold low or raw data with ADC thresholds high and low
3088 * @note If raw data with ADC thresholds high and low is retrieved,
3106 /* Parameter "AWDThresholdsHighLow" is used with mask "0x00000010" */ in LL_ADC_GetAnalogWDThresholds()
3307 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_EnableInternalRegulator()
3309 /* to not interfere with bits with HW property "rs". */ in LL_ADC_EnableInternalRegulator()
3358 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_Enable()
3360 /* to not interfere with bits with HW property "rs". */ in LL_ADC_Enable()
3378 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_Disable()
3380 /* to not interfere with bits with HW property "rs". */ in LL_ADC_Disable()
3413 * or differential (for devices with differential mode available).
3417 * @note In case of usage of ADC with DMA transfer:
3438 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_StartCalibration()
3440 /* to not interfere with bits with HW property "rs". */ in LL_ADC_StartCalibration()
3485 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_REG_StartConversion()
3487 /* to not interfere with bits with HW property "rs". */ in LL_ADC_REG_StartConversion()
3497 * ADC must be enabled with conversion on going on group regular,
3505 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_REG_StopConversion()
3507 /* to not interfere with bits with HW property "rs". */ in LL_ADC_REG_StopConversion()
3539 * with feature oversampling).
3552 * @note For devices with feature oversampling: Oversampling
3567 * @note For devices with feature oversampling: Oversampling
3582 * @note For devices with feature oversampling: Oversampling
3597 * @note For devices with feature oversampling: Oversampling