25   * If no LICENSE file comes with this software, it is provided AS-IS.
37         (++) Enable QuadSPI clock interface with __HAL_RCC_QSPI_CLK_ENABLE().
38 …(++) Reset QuadSPI Peripheral with __HAL_RCC_QSPI_FORCE_RESET() and __HAL_RCC_QSPI_RELEASE_RESET().
39         (++) Enable the clocks for the QuadSPI GPIOS with __HAL_RCC_GPIOx_CLK_ENABLE().
42             interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
44             with __HAL_RCC_MDMA_CLK_ENABLE(), configure MDMA with HAL_MDMA_Init(),
45             link it with QuadSPI handle using __HAL_LINKDMA(), enable and configure
46             MDMA global interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
109               aligned with MDMA_Source_increment_mode .
116               aligned with MDMA_Destination_increment_mode.
996       /* Configure QSPI: CCR register with functional as indirect write */  in HAL_QSPI_Transmit()
1080       /* Configure QSPI: CCR register with functional as indirect read */  in HAL_QSPI_Receive()
1135   * @brief  Send an amount of data in non-blocking mode with interrupt.
1165       /* Configure QSPI: CCR register with functional as indirect write */  in HAL_QSPI_Transmit_IT()
1195   * @brief  Receive an amount of data in non-blocking mode with interrupt.
1226       /* Configure QSPI: CCR register with functional as indirect read */  in HAL_QSPI_Receive_IT()
1259   * @brief  Send an amount of data in non-blocking mode with DMA.
1293         /* Configure QSPI: CCR register with functional mode as indirect write */  in HAL_QSPI_Transmit_DMA()
1308         /* Update MDMA configuration with the correct SourceInc field for Write operation */  in HAL_QSPI_Transmit_DMA()
1372   * @brief  Receive an amount of data in non-blocking mode with DMA.
1418       /* Update MDMA configuration with the correct DestinationInc field for read operation */  in HAL_QSPI_Receive_DMA()
1437           /* Configure QSPI: CCR register with functional as indirect read */  in HAL_QSPI_Receive_DMA()
1545       /* Configure QSPI: PSMAR register with the status match value */  in HAL_QSPI_AutoPolling()
1548       /* Configure QSPI: PSMKR register with the status mask value */  in HAL_QSPI_AutoPolling()
1551       /* Configure QSPI: PIR register with the interval value */  in HAL_QSPI_AutoPolling()
1554       /* Configure QSPI: CR register with Match mode and Automatic stop enabled  in HAL_QSPI_AutoPolling()
1646       /* Configure QSPI: PSMAR register with the status match value */  in HAL_QSPI_AutoPolling_IT()
1649       /* Configure QSPI: PSMKR register with the status mask value */  in HAL_QSPI_AutoPolling_IT()
1652       /* Configure QSPI: PIR register with the interval value */  in HAL_QSPI_AutoPolling_IT()
1655       /* Configure QSPI: CR register with Match mode and Automatic stop mode */  in HAL_QSPI_AutoPolling_IT()
1747       /* Configure QSPI: CR register with timeout counter enable */  in HAL_QSPI_MemoryMapped()
1754         /* Configure QSPI: LPTR register with the low-power timeout value */  in HAL_QSPI_MemoryMapped()
2181       /* Configure QSPI: CR register with Abort request */  in HAL_QSPI_Abort()
2266         /* Configure QSPI: CR register with Abort request */  in HAL_QSPI_Abort_IT()
2303     /* Synchronize init structure with new FIFO threshold value */  in HAL_QSPI_SetFifoThreshold()
2350     /* Synchronize init structure with new FlashID value */  in HAL_QSPI_SetFlashID()
2451     /* Configure QSPI: CR register with Abort request */  in QSPI_DMAAbortCplt()
2517     /* Configure QSPI: DLR register with the number of data to read or write */  in QSPI_Config()
2525       /* Configure QSPI: ABR register with alternate bytes value */  in QSPI_Config()
2530         /*---- Command with instruction, address and alternate bytes ----*/  in QSPI_Config()
2531         /* Configure QSPI: CCR register with all communications parameters */  in QSPI_Config()
2540           /* Configure QSPI: AR register with address value */  in QSPI_Config()
2546         /*---- Command with instruction and alternate bytes ----*/  in QSPI_Config()
2547         /* Configure QSPI: CCR register with all communications parameters */  in QSPI_Config()
2559         /*---- Command with instruction and address ----*/  in QSPI_Config()
2560         /* Configure QSPI: CCR register with all communications parameters */  in QSPI_Config()
2568           /* Configure QSPI: AR register with address value */  in QSPI_Config()
2574         /*---- Command with only instruction ----*/  in QSPI_Config()
2575         /* Configure QSPI: CCR register with all communications parameters */  in QSPI_Config()
2587       /* Configure QSPI: ABR register with alternate bytes value */  in QSPI_Config()
2592         /*---- Command with address and alternate bytes ----*/  in QSPI_Config()
2593         /* Configure QSPI: CCR register with all communications parameters */  in QSPI_Config()
2602           /* Configure QSPI: AR register with address value */  in QSPI_Config()
2608         /*---- Command with only alternate bytes ----*/  in QSPI_Config()
2609         /* Configure QSPI: CCR register with all communications parameters */  in QSPI_Config()
2620         /*---- Command with only address ----*/  in QSPI_Config()
2621         /* Configure QSPI: CCR register with all communications parameters */  in QSPI_Config()
2629           /* Configure QSPI: AR register with address value */  in QSPI_Config()
2635         /*---- Command with only data phase ----*/  in QSPI_Config()
2638           /* Configure QSPI: CCR register with all communications parameters */  in QSPI_Config()