Lines Matching full:with
14 * If no LICENSE file comes with this software, it is provided AS-IS.
129 …_0) /* Trigger edge set to rising edge (default setting for compatibility with some ADC on other S…
132 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
140 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
157 …_0) /* Trigger edge set to rising edge (default setting for compatibility with some ADC on other S…
160 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
168 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
366 …RT | ADC_CR_ADSTART | ADC_CR_ADDIS | ADC_CR_ADEN) /* ADC register CR bits with HW property "rs": S…
377 … (3300UL) /* Analog voltage reference (Vref+) value with which temperature s…
390 … (3300UL) /* Analog voltage reference (Vref+) voltage with which temperature s…
392 /* Registers addresses with ADC linearity calibration content (programmed during device production,…
460 …de configuration to operate in independent mode or multimode (for devices with several ADC instanc…
490 * (setting possible with ADC enabled without conversion on going,
491 * ADC enabled with conversion on going, ...)
492 * Each feature can be updated afterwards with a unitary function
493 * and potentially with ADC in a different state than disabled,
504 … /*!< Configures the left shifting applied to the final result with or without oversamp…
519 * (functions with prefix "REG").
526 * (setting possible with ADC enabled without conversion on going,
527 * ADC enabled with conversion on going, ...)
528 * Each feature can be updated afterwards with a unitary function
529 * and potentially with ADC in a different state than disabled,
538 …(default setting for compatibility with some ADC on other STM32 families having this setting set b…
579 * (functions with prefix "INJ").
586 * (setting possible with ADC enabled without conversion on going,
587 * ADC enabled with conversion on going, ...)
588 * Each feature can be updated afterwards with a unitary function
589 * and potentially with ADC in a different state than disabled,
598 …(default setting for compatibility with some ADC on other STM32 families having this setting set b…
634 * @brief Flags defines which can be used with LL_ADC_ReadReg function
676 * @brief IT defines which can be used with LL_ADC_ReadReg and LL_ADC_WriteReg functions
694 /** @defgroup ADC_LL_EC_REGISTERS ADC registers compliant with specific purpose
697 /* List of ADC registers intended to be used (most commonly) with */
700 …egular conversion data register (corresponding to register DR) to be used with ADC configured in i…
701 … (corresponding to register CDR) to be used with ADC configured in multimode (available on STM32 d…
710 … ) /*!< ADC synchronous clock derived from AHB clock with prescaler division …
711 …MODE_0) /*!< ADC synchronous clock derived from AHB clock with prescaler division …
713 …_PRESC_0) /*!< ADC asynchronous clock with prescaler division …
714 …_PRESC_1 ) /*!< ADC asynchronous clock with prescaler division …
715 …_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with prescaler division …
716 …_PRESC_2 ) /*!< ADC asynchronous clock with prescaler division …
717 …_PRESC_2 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with prescaler division …
718 …_PRESC_2 | ADC_CCR_PRESC_1 ) /*!< ADC asynchronous clock with prescaler division …
719 …_PRESC_2 | ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with prescaler division …
720 …_PRESC_3) /*!< ADC asynchronous clock with prescaler division …
721 …_PRESC_3 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with prescaler division …
722 …_PRESC_3 | ADC_CCR_PRESC_1) /*!< ADC asynchronous clock with prescaler division …
723 …_PRESC_3 | ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with prescaler division …
759 …ion of calibration of offset duration: 1280 ADC clock cycles. For devices with differential mode a…
760 …Duration of calibration of linearity: 15104 ADC clock cycles. For devices with differential mode a…
761 … calibration of offset and linearity: 16384 ADC clock cycles. For devices with differential mode a…
798 …is handled through functions "LL_ADC_SetResolution/LL_ADC_GetResolution" with a dedicated check o…
846 …en necessary (when previous ADC conversion data is read). See description with function @ref LL_AD…
1041 …mber of ADC conversions) is reached. This ADC mode is intended to be used with DMA mode non-circul…
1042 …sferred (number of ADC conversions). This ADC mode is intended to be used with DMA mode circular. …
1054 …mber of ADC conversions) is reached. This ADC mode is intended to be used with DMA mode non-circul…
1055 …sferred (number of ADC conversions). This ADC mode is intended to be used with DMA mode circular. …
1074 … ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 2 ranks in the sequ…
1075 … ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 3 ranks in the sequ…
1076 … ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 4 ranks in the sequ…
1077 …_2 ) /*!< ADC group regular sequencer enable with 5 ranks in the sequ…
1078 …_2 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 6 ranks in the sequ…
1079 …_2 | ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 7 ranks in the sequ…
1080 …_2 | ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 8 ranks in the sequ…
1081 … ) /*!< ADC group regular sequencer enable with 9 ranks in the sequ…
1082 … | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 10 ranks in the seq…
1083 … | ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 11 ranks in the seq…
1084 … | ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 12 ranks in the seq…
1085 …_2 ) /*!< ADC group regular sequencer enable with 13 ranks in the seq…
1086 …_2 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 14 ranks in the seq…
1087 …_2 | ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 15 ranks in the seq…
1088 …_2 | ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 16 ranks in the seq…
1097 …C_CFGR_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
1098 …_CFGR_DISCEN) /*!< ADC group regular sequencer discontinuous mode enabled with sequence interrupti…
1099 …C_CFGR_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
1100 …C_CFGR_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
1101 …C_CFGR_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
1102 …C_CFGR_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
1103 …C_CFGR_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
1104 …C_CFGR_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
1179 …njected conversion trigger from ADC group regular. Setting compliant only with group injected trig…
1198 … ( ADC_JSQR_JL_0) /*!< ADC group injected sequencer enable with 2 ranks in the sequ…
1199 … (ADC_JSQR_JL_1 ) /*!< ADC group injected sequencer enable with 3 ranks in the sequ…
1200 … (ADC_JSQR_JL_1 | ADC_JSQR_JL_0) /*!< ADC group injected sequencer enable with 4 ranks in the sequ…
1209 …_JDISCEN) /*!< ADC group injected sequencer discontinuous mode enable with sequence interrupti…
1450 … /*!< ADC dual mode enabled: group injected alternate trigger. Works only with external triggers (…
1461 …ar conversions are transferred by DMA: each ADC uses its own DMA channel, with its individual DMA …
1647 * number is returned, either defined with number
1648 * or with bitfield (only one bit must be set).
1732 * comparison with internal channel parameter to be done
1765 * number in ADC registers. The differentiation is made only with
1884 * number in ADC registers. The differentiation is made only with
1932 * define a single channel to monitor with analog watchdog
1934 * @note To be used with function @ref LL_ADC_SetAnalogWDMonitChannels().
1971 * comparison with internal channel parameter to be done
2076 * @note To be used with function @ref LL_ADC_SetAnalogWDThresholds().
2077 * Example, with a ADC resolution of 8 bits, to set the value of
2099 * @note To be used with function @ref LL_ADC_GetAnalogWDThresholds().
2100 * Example, with a ADC resolution of 8 bits, to get the value of
2119 * @brief Helper macro to set the ADC calibration value with both single ended
2121 * @note To be used with function @ref LL_ADC_SetCalibrationOffsetFactor().
2136 * or ADC slave from raw value with both ADC conversion data concatenated.
2139 * In this case the transferred data need to processed with this macro
2154 * @note In case of device with multimode available and a mix of
2155 * ADC instances compliant and not compliant with multimode feature,
2156 * ADC instances not compliant with multimode feature are
2175 * - Multimode (for devices with several ADC instances)
2198 * @note This check is required by functions with setting conditioned to
2202 * @note On devices with only 1 ADC common instance, parameter of this macro
2204 * with devices featuring several ADC common instances).
2399 * On devices with small package, the pin Vref+ is not present
2434 * with TS_ADC_DATA = temperature sensor raw data measured by ADC
2493 * with TS_ADC_DATA = temperature sensor raw data measured by ADC
2500 * of the current device has characteristics in line with
2569 * intended to be used (most commonly) with DMA transfer.
2573 * @note This macro is intended to be used with LL DMA driver, refer to
2581 * @note For devices with several ADC: in multimode, some devices
2593 * (1) Available on devices with several ADC instances.
2631 * This check can be done with function @ref LL_ADC_IsEnabled() for each
2709 * This check can be done with function @ref LL_ADC_IsEnabled() for each
2820 * or differential (for devices with differential mode available).
2824 * @note For devices with differential mode available:
2867 * or differential (for devices with differential mode available).
2870 * @note For devices with differential mode available:
2885 /* Retrieve bits with position in register depending on parameter */ in LL_ADC_GetCalibrationOffsetFactor()
2887 /* Parameter used with mask "ADC_SINGLEDIFF_CALIB_FACTOR_MASK" because */ in LL_ADC_GetCalibrationOffsetFactor()
3115 * - It is not recommended to use with interruption or DMA
3121 * - Do use with polling: 1. Start conversion,
3130 * (with startup time between trigger and start of sampling).
3131 * This feature can be combined with low power mode "auto wait".
3132 * @note With ADC low power mode "auto wait", the ADC conversion data read
3171 * - It is not recommended to use with interruption or DMA
3177 * - Do use with polling: 1. Start conversion,
3186 * (with startup time between trigger and start of sampling).
3187 * This feature can be combined with low power mode "auto wait".
3188 * @note With ADC low power mode "auto wait", the ADC conversion data read
3313 * with the lowest value is considered for the subtraction.
3400 * with parts of literals LL_ADC_CHANNEL_x or using
3405 * process the returned value with the helper macro
3451 * comparison with internal channel parameter to be done
3812 * (default setting for compatibility with some ADC on other
3903 /* to match with triggers literals definition. */ in LL_ADC_REG_GetTriggerSource()
3996 * - For devices with sequencer fully configurable
4006 * - For devices with sequencer not fully configurable
4055 * - For devices with sequencer fully configurable
4065 * - For devices with sequencer not fully configurable
4250 /* Set bits with content of parameter "Channel" with bits position */ in LL_ADC_REG_SetSequencerRanks()
4252 /* Parameters "Rank" and "Channel" are used with masks because containing */ in LL_ADC_REG_SetSequencerRanks()
4274 * with parts of literals LL_ADC_CHANNEL_x or using
4279 * process the returned value with the helper macro
4347 * comparison with internal channel parameter to be done
4446 * This ADC mode is intended to be used with DMA mode non-circular.
4450 * This ADC mode is intended to be used with DMA mode circular.
4456 * @note For devices with several ADC instances: ADC multimode DMA
4489 * This ADC mode is intended to be used with DMA mode non-circular.
4493 * This ADC mode is intended to be used with DMA mode circular.
4499 * @note For devices with several ADC instances: ADC multimode DMA
4549 * @note Compatibility with devices without feature overrun:
4553 * Therefore, for compatibility with all devices, parameter
4599 * (default setting for compatibility with some ADC on other
4607 * ADC must not be disabled. Can be enabled with or without conversion
4690 /* to match with triggers literals definition. */ in LL_ADC_INJ_GetTriggerSource()
4718 * ADC must not be disabled. Can be enabled with or without conversion
4758 * ADC must not be disabled. Can be enabled with or without conversion
4841 * ADC must not be disabled. Can be enabled with or without conversion
4888 /* Set bits with content of parameter "Channel" with bits position */ in LL_ADC_INJ_SetSequencerRanks()
4890 /* Parameters "Rank" and "Channel" are used with masks because containing */ in LL_ADC_INJ_SetSequencerRanks()
4906 * with parts of literals LL_ADC_CHANNEL_x or using
4911 * process the returned value with the helper macro
4955 * comparison with internal channel parameter to be done
4970 * updated after one ADC conversion trigger and with data
4978 * ADC group injected automatic trigger is compliant only with
5101 * ADC must not be disabled. Can be enabled with or without conversion
5281 /* Set bits with content of parameter "Rankx_Channel" with bits position */ in LL_ADC_INJ_ConfigQueueContext()
5283 /* Parameters "Rankx_Channel" and "LL_ADC_INJ_RANK_x" are used with masks */ in LL_ADC_INJ_ConfigQueueContext()
5404 /* Set bits with content of parameter "SamplingTime" with bits position */ in LL_ADC_SetChannelSamplingTime()
5406 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_SetChannelSamplingTime()
5643 * with analog watchdog from sequencer channel definition,
5769 /* Set bits with content of parameter "AWDChannelGroup" with bits position */ in LL_ADC_SetAnalogWDMonitChannels()
5771 /* Parameters "AWDChannelGroup" and "AWDy" are used with masks because */ in LL_ADC_SetAnalogWDMonitChannels()
5787 * with parts of literals LL_ADC_CHANNEL_x or using
5792 * process the returned value with the helper macro
6020 /* Set bits with content of parameter "AWDThresholdValue" with bits */ in LL_ADC_SetAnalogWDThresholds()
6023 /* Parameters "AWDy" and "AWDThresholdValue" are used with masks because */ in LL_ADC_SetAnalogWDThresholds()
6033 /* Set bits with content of parameter "AWDThresholdValue" with bits */ in LL_ADC_SetAnalogWDThresholds()
6036 /* Parameters "AWDy" and "AWDThresholdValue" are used with masks because */ in LL_ADC_SetAnalogWDThresholds()
6045 /* Set bits with content of parameter "AWDThresholdValue" with bits */ in LL_ADC_SetAnalogWDThresholds()
6048 /* Parameters "AWDy" and "AWDThresholdValue" are used with masks because */ in LL_ADC_SetAnalogWDThresholds()
6060 * threshold low or raw data with ADC thresholds high and low
6146 /* Set bits with content of parameter "AWDThresholdxxxValue" with bits */ in LL_ADC_ConfigAnalogWDThresholds()
6149 /* Parameters "AWDy" and "AWDThresholdxxxValue" are used with masks because */ in LL_ADC_ConfigAnalogWDThresholds()
6532 * or multimode (for devices with several ADC instances).
6539 * This check can be done with function @ref LL_ADC_IsEnabled() for each
6563 * or multimode (for devices with several ADC instances).
6589 * each ADC uses its own DMA channel, with its individual
6597 * This ADC mode is intended to be used with DMA mode non-circular.
6601 * This ADC mode is intended to be used with DMA mode circular.
6611 * is a raw data with ADC master and slave concatenated.
6637 * each ADC uses its own DMA channel, with its individual
6645 * This ADC mode is intended to be used with DMA mode non-circular.
6649 * This ADC mode is intended to be used with DMA mode circular.
6659 * is a raw data with ADC master and slave concatenated.
6686 * This check can be done with function @ref LL_ADC_IsEnabled() for each
6776 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_EnableDeepPowerDown()
6778 /* to not interfere with bits with HW property "rs". */ in LL_ADC_EnableDeepPowerDown()
6799 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_DisableDeepPowerDown()
6801 /* to not interfere with bits with HW property "rs". */ in LL_ADC_DisableDeepPowerDown()
6832 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_EnableInternalRegulator()
6834 /* to not interfere with bits with HW property "rs". */ in LL_ADC_EnableInternalRegulator()
6883 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_Enable()
6885 /* to not interfere with bits with HW property "rs". */ in LL_ADC_Enable()
6903 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_Disable()
6905 /* to not interfere with bits with HW property "rs". */ in LL_ADC_Disable()
6938 * or differential (for devices with differential mode available).
6945 * @note For devices with differential mode available:
6971 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_StartCalibration()
6973 /* to not interfere with bits with HW property "rs". */ in LL_ADC_StartCalibration()
7018 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_REG_StartConversion()
7020 /* to not interfere with bits with HW property "rs". */ in LL_ADC_REG_StartConversion()
7030 * ADC must be enabled with conversion on going on group regular,
7038 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_REG_StopConversion()
7040 /* to not interfere with bits with HW property "rs". */ in LL_ADC_REG_StopConversion()
7072 * with feature oversampling).
7085 * @note For devices with feature oversampling: Oversampling
7100 * @note For devices with feature oversampling: Oversampling
7115 * @note For devices with feature oversampling: Oversampling
7130 * @note For devices with feature oversampling: Oversampling
7145 * @note For devices with feature oversampling: Oversampling
7158 * or raw data with ADC master and slave concatenated.
7159 * @note If raw data with ADC master and slave concatenated is retrieved,
7213 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_INJ_StartConversion()
7215 /* to not interfere with bits with HW property "rs". */ in LL_ADC_INJ_StartConversion()
7225 * ADC must be enabled with conversion on going on group injected,
7233 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_INJ_StopConversion()
7235 /* to not interfere with bits with HW property "rs". */ in LL_ADC_INJ_StopConversion()
7267 * with feature oversampling).
7292 * @note For devices with feature oversampling: Oversampling
7319 * @note For devices with feature oversampling: Oversampling
7346 * @note For devices with feature oversampling: Oversampling
7373 * @note For devices with feature oversampling: Oversampling
7400 * @note For devices with feature oversampling: Oversampling