Lines Matching full:on

107 #define HAL_FLASH_ERROR_WRP_BANK1    FLASH_FLAG_WRPERR_BANK1   /*!< Write Protection Error on Bank …
108 #define HAL_FLASH_ERROR_PGS_BANK1 FLASH_FLAG_PGSERR_BANK1 /*!< Program Sequence Error on Bank …
109 #define HAL_FLASH_ERROR_STRB_BANK1 FLASH_FLAG_STRBERR_BANK1 /*!< Strobe Error on Bank 1 …
110 #define HAL_FLASH_ERROR_INC_BANK1 FLASH_FLAG_INCERR_BANK1 /*!< Inconsistency Error on Bank 1 …
112 #define HAL_FLASH_ERROR_OPE_BANK1 FLASH_FLAG_OPERR_BANK1 /*!< Operation Error on Bank 1 …
114 #define HAL_FLASH_ERROR_RDP_BANK1 FLASH_FLAG_RDPERR_BANK1 /*!< Read Protection Error on Bank 1…
115 #define HAL_FLASH_ERROR_RDS_BANK1 FLASH_FLAG_RDSERR_BANK1 /*!< Read Secured Error on Bank 1 …
116 #define HAL_FLASH_ERROR_SNECC_BANK1 FLASH_FLAG_SNECCERR_BANK1 /*!< ECC Single Correction Error on
117 #define HAL_FLASH_ERROR_DBECC_BANK1 FLASH_FLAG_DBECCERR_BANK1 /*!< ECC Double Detection Error on B…
118 #define HAL_FLASH_ERROR_CRCRD_BANK1 FLASH_FLAG_CRCRDERR_BANK1 /*!< CRC Read Error on Bank1 …
120 #define HAL_FLASH_ERROR_WRP_BANK2 FLASH_FLAG_WRPERR_BANK2 /*!< Write Protection Error on Bank…
121 #define HAL_FLASH_ERROR_PGS_BANK2 FLASH_FLAG_PGSERR_BANK2 /*!< Program Sequence Error on Bank…
122 #define HAL_FLASH_ERROR_STRB_BANK2 FLASH_FLAG_STRBERR_BANK2 /*!< Strobe Error on Bank 2 …
123 #define HAL_FLASH_ERROR_INC_BANK2 FLASH_FLAG_INCERR_BANK2 /*!< Inconsistency Error on Bank 2 …
125 #define HAL_FLASH_ERROR_OPE_BANK2 FLASH_FLAG_OPERR_BANK2 /*!< Operation Error on Bank 2 …
127 #define HAL_FLASH_ERROR_RDP_BANK2 FLASH_FLAG_RDPERR_BANK2 /*!< Read Protection Error on Bank …
128 #define HAL_FLASH_ERROR_RDS_BANK2 FLASH_FLAG_RDSERR_BANK2 /*!< Read Secured Error on Bank 2 …
129 #define HAL_FLASH_ERROR_SNECC_BANK2 FLASH_FLAG_SNECCERR_BANK2 /*!< ECC Single Correction Error on
130 #define HAL_FLASH_ERROR_DBECC_BANK2 FLASH_FLAG_DBECCERR_BANK2 /*!< ECC Double Detection Error on
131 #define HAL_FLASH_ERROR_CRCRD_BANK2 FLASH_FLAG_CRCRDERR_BANK2 /*!< CRC Read Error on Bank2 …
155 #define FLASH_FLAG_QW FLASH_SR_QW /*!< Wait Queue on flag */
157 #define FLASH_FLAG_EOP FLASH_SR_EOP /*!< End Of Program on flag */
158 #define FLASH_FLAG_WRPERR FLASH_SR_WRPERR /*!< Write Protection Error on
159 #define FLASH_FLAG_PGSERR FLASH_SR_PGSERR /*!< Program Sequence Error on
161 #define FLASH_FLAG_INCERR FLASH_SR_INCERR /*!< Inconsistency Error on fla…
163 #define FLASH_FLAG_OPERR FLASH_SR_OPERR /*!< Operation Error on flag */
165 #define FLASH_FLAG_RDPERR FLASH_SR_RDPERR /*!< Read Protection Error on f…
166 #define FLASH_FLAG_RDSERR FLASH_SR_RDSERR /*!< Read Secured Error on flag…
167 …H_FLAG_SNECCERR FLASH_SR_SNECCERR /*!< Single ECC Error Correction on flag */
168 …SH_FLAG_DBECCERR FLASH_SR_DBECCERR /*!< Double Detection ECC Error on flag */
170 #define FLASH_FLAG_CRCRDERR FLASH_SR_CRCRDERR /*!< CRC Read Error on bank fla…
173 #define FLASH_FLAG_WBNE_BANK1 FLASH_SR_WBNE /*!< Write Buffer Not Empty on
174 #define FLASH_FLAG_QW_BANK1 FLASH_SR_QW /*!< Wait Queue on Bank 1 flag …
175 #define FLASH_FLAG_CRC_BUSY_BANK1 FLASH_SR_CRC_BUSY /*!< CRC Busy on Bank 1 flag */
176 #define FLASH_FLAG_EOP_BANK1 FLASH_SR_EOP /*!< End Of Program on Bank 1 f…
177 #define FLASH_FLAG_WRPERR_BANK1 FLASH_SR_WRPERR /*!< Write Protection Error on
178 #define FLASH_FLAG_PGSERR_BANK1 FLASH_SR_PGSERR /*!< Program Sequence Error on
179 #define FLASH_FLAG_STRBERR_BANK1 FLASH_SR_STRBERR /*!< Strobe Error on Bank 1 fla…
180 #define FLASH_FLAG_INCERR_BANK1 FLASH_SR_INCERR /*!< Inconsistency Error on Ban…
182 #define FLASH_FLAG_OPERR_BANK1 FLASH_SR_OPERR /*!< Operation Error on Bank 1 …
184 #define FLASH_FLAG_RDPERR_BANK1 FLASH_SR_RDPERR /*!< Read Protection Error on B…
185 #define FLASH_FLAG_RDSERR_BANK1 FLASH_SR_RDSERR /*!< Read Secured Error on Bank…
186 …SNECCERR_BANK1 FLASH_SR_SNECCERR /*!< Single ECC Error Correction on Bank 1 flag */
187 …_DBECCERR_BANK1 FLASH_SR_DBECCERR /*!< Double Detection ECC Error on Bank 1 flag */
188 #define FLASH_FLAG_CRCEND_BANK1 FLASH_SR_CRCEND /*!< CRC End of Calculation on
189 #define FLASH_FLAG_CRCRDERR_BANK1 FLASH_SR_CRCRDERR /*!< CRC Read error on Bank 1 f…
211 … (FLASH_SR_WBNE | 0x80000000U) /*!< Write Buffer Not Empty on Bank 2 flag */
212 …_QW_BANK2 (FLASH_SR_QW | 0x80000000U) /*!< Wait Queue on Bank 2 flag */
213 …AG_CRC_BUSY_BANK2 (FLASH_SR_CRC_BUSY | 0x80000000U) /*!< CRC Busy on Bank 2 flag */
214 …_BANK2 (FLASH_SR_EOP | 0x80000000U) /*!< End Of Program on Bank 2 flag */
215 …2 (FLASH_SR_WRPERR | 0x80000000U) /*!< Write Protection Error on Bank 2 flag */
216 …2 (FLASH_SR_PGSERR | 0x80000000U) /*!< Program Sequence Error on Bank 2 flag */
217 …TRBERR_BANK2 (FLASH_SR_STRBERR | 0x80000000U) /*!< Strobe Error on Bank 2 flag */
218 …ANK2 (FLASH_SR_INCERR | 0x80000000U) /*!< Inconsistency Error on Bank 2 flag */
220 …R_BANK2 (FLASH_SR_OPERR | 0x80000000U) /*!< Operation Error on Bank 2 flag */
222 …K2 (FLASH_SR_RDPERR | 0x80000000U) /*!< Read Protection Error on Bank 2 flag */
223 …BANK2 (FLASH_SR_RDSERR | 0x80000000U) /*!< Read Secured Error on Bank 2 flag */
224 … (FLASH_SR_SNECCERR | 0x80000000U) /*!< Single ECC Error Correction on Bank 2 flag */
225 … (FLASH_SR_DBECCERR | 0x80000000U) /*!< Double Detection ECC Error on Bank 2 flag */
226 …2 (FLASH_SR_CRCEND | 0x80000000U) /*!< CRC End of Calculation on Bank 2 flag */
227 …RDERR_BANK2 (FLASH_SR_CRCRDERR | 0x80000000U) /*!< CRC Read error on Bank 2 flag */
256 #define FLASH_IT_WRPERR_BANK1 FLASH_CR_WRPERRIE /*!< Write Protection Error on Ban…
257 #define FLASH_IT_PGSERR_BANK1 FLASH_CR_PGSERRIE /*!< Program Sequence Error on Ban…
258 #define FLASH_IT_STRBERR_BANK1 FLASH_CR_STRBERRIE /*!< Strobe Error on Bank 1 Interr…
259 #define FLASH_IT_INCERR_BANK1 FLASH_CR_INCERRIE /*!< Inconsistency Error on Bank 1…
261 #define FLASH_IT_OPERR_BANK1 FLASH_CR_OPERRIE /*!< Operation Error on Bank 1 Int…
263 #define FLASH_IT_RDPERR_BANK1 FLASH_CR_RDPERRIE /*!< Read protection Error on Bank…
264 #define FLASH_IT_RDSERR_BANK1 FLASH_CR_RDSERRIE /*!< Read Secured Error on Bank 1 …
265 …RR_BANK1 FLASH_CR_SNECCERRIE /*!< Single ECC Error Correction on Bank 1 Interrupt sou…
266 #define FLASH_IT_DBECCERR_BANK1 FLASH_CR_DBECCERRIE /*!< Double Detection ECC Error on
267 #define FLASH_IT_CRCEND_BANK1 FLASH_CR_CRCENDIE /*!< CRC End on Bank 1 Interrupt s…
268 #define FLASH_IT_CRCRDERR_BANK1 FLASH_CR_CRCRDERRIE /*!< CRC Read error on Bank 1 Inte…
287 … (FLASH_CR_WRPERRIE | 0x80000000U) /*!< Write Protection Error on Bank 2 Interrupt sou…
288 … (FLASH_CR_PGSERRIE | 0x80000000U) /*!< Program Sequence Error on Bank 2 Interrupt sou…
289 …R_BANK2 (FLASH_CR_STRBERRIE | 0x80000000U) /*!< Strobe Error on Bank 2 Interrupt sou…
290 … (FLASH_CR_INCERRIE | 0x80000000U) /*!< Inconsistency Error on Bank 2 Interrupt sou…
292 …K2 (FLASH_CR_OPERRIE | 0x80000000U) /*!< Operation Error on Bank 2 Interrupt sou…
294 … (FLASH_CR_RDPERRIE | 0x80000000U) /*!< Read protection Error on Bank 2 Interrupt sou…
295 … (FLASH_CR_RDSERRIE | 0x80000000U) /*!< Read Secured Error on Bank 2 Interrupt sou…
296 … (FLASH_CR_SNECCERRIE | 0x80000000U) /*!< Single ECC Error Correction on Bank 2 Interrupt sou…
297 … (FLASH_CR_DBECCERRIE | 0x80000000U) /*!< Double Detection ECC Error on Bank 2 Interrupt sou…
298 #define FLASH_IT_CRCEND_BANK2 (FLASH_CR_CRCENDIE | 0x80000000U) /*!< CRC End on Ban…
299 …_BANK2 (FLASH_CR_CRCRDERRIE | 0x80000000U) /*!< CRC Read Error on Bank 2 Interrupt sou…
493 * The value of this parameter depend on device used within the same series
502 * The value of this parameter depend on device used within the same series
511 * @arg FLASH_IT_WRPERR_BANK1 : Write Protection Error on Bank 1 Interrupt source
512 * @arg FLASH_IT_PGSERR_BANK1 : Program Sequence Error on Bank 1 Interrupt source
513 * @arg FLASH_IT_STRBERR_BANK1 : Strobe Error on Bank 1 Interrupt source
514 * @arg FLASH_IT_INCERR_BANK1 : Inconsistency Error on Bank 1 Interrupt source
515 * @arg FLASH_IT_OPERR_BANK1 : Operation Error on Bank 1 Interrupt source
516 * @arg FLASH_IT_RDPERR_BANK1 : Read protection Error on Bank 1 Interrupt source
517 * @arg FLASH_IT_RDSERR_BANK1 : Read secure Error on Bank 1 Interrupt source
518 * @arg FLASH_IT_SNECCERR_BANK1 : Single ECC Error Correction on Bank 1 Interrupt source
519 * @arg FLASH_IT_DBECCERR_BANK1 : Double Detection ECC Error on Bank 1 Interrupt source
520 * @arg FLASH_IT_CRCEND_BANK1 : CRC End on Bank 1 Interrupt source
521 * @arg FLASH_IT_CRCRDERR_BANK1 : CRC Read error on Bank 1 Interrupt source
526 * @arg FLASH_IT_WRPERR_BANK2 : Write Protection Error on Bank 2 Interrupt source
527 * @arg FLASH_IT_PGSERR_BANK2 : Program Sequence Error on Bank 2 Interrupt source
528 * @arg FLASH_IT_STRBERR_BANK2 : Strobe Error on Bank 2 Interrupt source
529 * @arg FLASH_IT_INCERR_BANK2 : Inconsistency Error on Bank 2 Interrupt source
530 * @arg FLASH_IT_OPERR_BANK2 : Operation Error on Bank 2 Interrupt source
531 * @arg FLASH_IT_RDPERR_BANK2 : Read protection Error on Bank 2 Interrupt source
532 * @arg FLASH_IT_RDSERR_BANK2 : Read secure Error on Bank 2 Interrupt source
533 * @arg FLASH_IT_SNECCERR_BANK2 : Single ECC Error Correction on Bank 2 Interrupt source
534 * @arg FLASH_IT_DBECCERR_BANK2 : Double Detection ECC Error on Bank 2 Interrupt source
535 * @arg FLASH_IT_CRCEND_BANK2 : CRC End on Bank 2 Interrupt source
536 * @arg FLASH_IT_CRCRDERR_BANK2 : CRC Read error on Bank 2 Interrupt source
559 * @arg FLASH_IT_WRPERR_BANK1 : Write Protection Error on Bank 1 Interrupt source
560 * @arg FLASH_IT_PGSERR_BANK1 : Program Sequence Error on Bank 1 Interrupt source
561 * @arg FLASH_IT_STRBERR_BANK1 : Strobe Error on Bank 1 Interrupt source
562 * @arg FLASH_IT_INCERR_BANK1 : Inconsistency Error on Bank 1 Interrupt source
563 * @arg FLASH_IT_OPERR_BANK1 : Operation Error on Bank 1 Interrupt source
564 * @arg FLASH_IT_RDPERR_BANK1 : Read protection Error on Bank 1 Interrupt source
565 * @arg FLASH_IT_RDSERR_BANK1 : Read secure Error on Bank 1 Interrupt source
566 * @arg FLASH_IT_SNECCERR_BANK1 : Single ECC Error Correction on Bank 1 Interrupt source
567 * @arg FLASH_IT_DBECCERR_BANK1 : Double Detection ECC Error on Bank 1 Interrupt source
568 * @arg FLASH_IT_CRCEND_BANK1 : CRC End on Bank 1 Interrupt source
569 * @arg FLASH_IT_CRCRDERR_BANK1 : CRC Read error on Bank 1 Interrupt source
574 * @arg FLASH_IT_WRPERR_BANK2 : Write Protection Error on Bank 2 Interrupt source
575 * @arg FLASH_IT_PGSERR_BANK2 : Program Sequence Error on Bank 2 Interrupt source
576 * @arg FLASH_IT_STRBERR_BANK2 : Strobe Error on Bank 2 Interrupt source
577 * @arg FLASH_IT_INCERR_BANK2 : Inconsistency Error on Bank 2 Interrupt source
578 * @arg FLASH_IT_OPERR_BANK2 : Operation Error on Bank 2 Interrupt source
579 * @arg FLASH_IT_RDPERR_BANK2 : Read protection Error on Bank 2 Interrupt source
580 * @arg FLASH_IT_RDSERR_BANK2 : Read secure Error on Bank 2 Interrupt source
581 * @arg FLASH_IT_SNECCERR_BANK2 : Single ECC Error Correction on Bank 2 Interrupt source
582 * @arg FLASH_IT_DBECCERR_BANK2 : Double Detection ECC Error on Bank 2 Interrupt source
583 * @arg FLASH_IT_CRCEND_BANK2 : CRC End on Bank 2 Interrupt source
584 * @arg FLASH_IT_CRCRDERR_BANK2 : CRC Read error on Bank 2 Interrupt source
607 * @arg FLASH_FLAG_WBNE_BANK1 : Write Buffer Not Empty on Bank 1 flag
608 * @arg FLASH_FLAG_QW_BANK1 : Wait Queue on Bank 1 flag
609 * @arg FLASH_FLAG_CRC_BUSY_BANK1 : CRC module is working on Bank 1 flag
610 * @arg FLASH_FLAG_EOP_BANK1 : End Of Program on Bank 1 flag
611 * @arg FLASH_FLAG_WRPERR_BANK1 : Write Protection Error on Bank 1 flag
612 * @arg FLASH_FLAG_PGSERR_BANK1 : Program Sequence Error on Bank 1 flag
613 * @arg FLASH_FLAG_STRBER_BANK1 : Program Alignment Error on Bank 1 flag
614 * @arg FLASH_FLAG_INCERR_BANK1 : Inconsistency Error on Bank 1 flag
615 * @arg FLASH_FLAG_OPERR_BANK1 : Operation Error on Bank 1 flag
616 * @arg FLASH_FLAG_RDPERR_BANK1 : Read Protection Error on Bank 1 flag
617 * @arg FLASH_FLAG_RDSERR_BANK1 : Read secure Error on Bank 1 flag
618 * @arg FLASH_FLAG_SNECCE_BANK1 : Single ECC Error Correction on Bank 1 flag
619 * @arg FLASH_FLAG_DBECCE_BANK1 : Double Detection ECC Error on Bank 1 flag
620 * @arg FLASH_FLAG_CRCEND_BANK1 : CRC End on Bank 1 flag
621 * @arg FLASH_FLAG_CRCRDERR_BANK1 : CRC Read error on Bank 1 flag
625 * @arg FLASH_FLAG_WBNE_BANK2 : Write Buffer Not Empty on Bank 2 flag
626 * @arg FLASH_FLAG_QW_BANK2 : Wait Queue on Bank 2 flag
627 * @arg FLASH_FLAG_CRC_BUSY_BANK2 : CRC module is working on Bank 2 flag
628 * @arg FLASH_FLAG_EOP_BANK2 : End Of Program on Bank 2 flag
629 * @arg FLASH_FLAG_WRPERR_BANK2 : Write Protection Error on Bank 2 flag
630 * @arg FLASH_FLAG_PGSERR_BANK2 : Program Sequence Error on Bank 2 flag
631 * @arg FLASH_FLAG_STRBER_BANK2 : Program Alignment Error on Bank 2 flag
632 * @arg FLASH_FLAG_INCERR_BANK2 : Inconsistency Error on Bank 2 flag
633 * @arg FLASH_FLAG_OPERR_BANK2 : Operation Error on Bank 2 flag
634 * @arg FLASH_FLAG_RDPERR_BANK2 : Read Protection Error on Bank 2 flag
635 * @arg FLASH_FLAG_RDSERR_BANK2 : Read secure Error on Bank 2 flag
636 * @arg FLASH_FLAG_SNECCE_BANK2 : Single ECC Error Correction on Bank 2 flag
637 * @arg FLASH_FLAG_DBECCE_BANK2 : Double Detection ECC Error on Bank 2 flag
638 * @arg FLASH_FLAG_CRCEND_BANK2 : CRC End on Bank 2 flag
639 * @arg FLASH_FLAG_CRCRDERR_BANK2 : CRC Read error on Bank 2 flag
658 * @arg FLASH_FLAG_EOP_BANK1 : End Of Program on Bank 1 flag
659 * @arg FLASH_FLAG_WRPERR_BANK1 : Write Protection Error on Bank 1 flag
660 * @arg FLASH_FLAG_PGSERR_BANK1 : Program Sequence Error on Bank 1 flag
661 * @arg FLASH_FLAG_STRBER_BANK1 : Program Alignment Error on Bank 1 flag
662 * @arg FLASH_FLAG_INCERR_BANK1 : Inconsistency Error on Bank 1 flag
663 * @arg FLASH_FLAG_OPERR_BANK1 : Operation Error on Bank 1 flag
664 * @arg FLASH_FLAG_RDPERR_BANK1 : Read Protection Error on Bank 1 flag
665 * @arg FLASH_FLAG_RDSERR_BANK1 : Read secure Error on Bank 1 flag
666 * @arg FLASH_FLAG_SNECCE_BANK1 : Single ECC Error Correction on Bank 1 flag
667 * @arg FLASH_FLAG_DBECCE_BANK1 : Double Detection ECC Error on Bank 1 flag
668 * @arg FLASH_FLAG_CRCEND_BANK1 : CRC End on Bank 1 flag
669 * @arg FLASH_FLAG_CRCRDERR_BANK1 : CRC Read error on Bank 1 flag
674 * @arg FLASH_FLAG_EOP_BANK2 : End Of Program on Bank 2 flag
675 * @arg FLASH_FLAG_WRPERR_BANK2 : Write Protection Error on Bank 2 flag
676 * @arg FLASH_FLAG_PGSERR_BANK2 : Program Sequence Error on Bank 2 flag
677 * @arg FLASH_FLAG_STRBER_BANK2 : Program Alignment Error on Bank 2 flag
678 * @arg FLASH_FLAG_INCERR_BANK2 : Inconsistency Error on Bank 2 flag
679 * @arg FLASH_FLAG_OPERR_BANK2 : Operation Error on Bank 2 flag
680 * @arg FLASH_FLAG_RDPERR_BANK2 : Read Protection Error on Bank 2 flag
681 * @arg FLASH_FLAG_RDSERR_BANK2 : Read secure Error on Bank 2 flag
682 * @arg FLASH_FLAG_SNECCE_BANK2 : Single ECC Error Correction on Bank 2 flag
683 * @arg FLASH_FLAG_DBECCE_BANK2 : Double Detection ECC Error on Bank 2 flag
684 * @arg FLASH_FLAG_CRCEND_BANK2 : CRC End on Bank 2 flag
685 * @arg FLASH_FLAG_CRCRDERR_BANK2 : CRC Read error on Bank 2 flag