Lines Matching full:with
14 * If no LICENSE file comes with this software, it is provided AS-IS.
72 … compatibility with some ADC on other STM32 families
76 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
84 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
106 ADC_CHANNEL_ID_NUMBER_MASK with reduced range: on this STM32 series, ADC group regular sequencer,
107 if set to mode "fully configurable", can contain channels with a restricted channel number.
254 … | ADC_CR_ADSTART | ADC_CR_ADSTP) /* ADC register CR bits with
264 with which VrefInt has been calibrated in production (tolerance: +-10 mV) (unit: mV). */
277 …with which temperature sensor has been calibrated in production (tolerance: +-10 mV) (unit: mV). */
341 * (setting possible with ADC enabled without conversion on going,
342 * ADC enabled with conversion on going, ...)
343 * Each feature can be updated afterwards with a unitary function
344 * and potentially with ADC in a different state than disabled,
353 … ADC clock synchronous (from PCLK) with prescaler 1 must be enabled
383 * (functions with prefix "REG").
390 * (setting possible with ADC enabled without conversion on going,
391 * ADC enabled with conversion on going, ...)
392 * Each feature can be updated afterwards with a unitary function
393 * and potentially with ADC in a different state than disabled,
404 … with some ADC on other STM32 families having this setting set by HW
464 * @brief Flags defines which can be used with LL_ADC_ReadReg function
484 * @brief IT defines which can be used with LL_ADC_ReadReg and LL_ADC_WriteReg functions
504 /** @defgroup ADC_LL_EC_REGISTERS ADC registers compliant with specific purpose
507 /* List of ADC registers intended to be used (most commonly) with */
511 … (corresponding to register DR) to be used with ADC
525 …DC_CLOCK_ASYNC_DIV2 (ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with
528 …DC_CLOCK_ASYNC_DIV4 (ADC_CCR_PRESC_1) /*!< ADC asynchronous clock with
531 …DC_CLOCK_ASYNC_DIV6 (ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with
534 …DC_CLOCK_ASYNC_DIV8 (ADC_CCR_PRESC_2) /*!< ADC asynchronous clock with
537 …DC_CLOCK_ASYNC_DIV10 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with
540 …DC_CLOCK_ASYNC_DIV12 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_1) /*!< ADC asynchronous clock with
544 … | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with
547 …DC_CLOCK_ASYNC_DIV32 (ADC_CCR_PRESC_3) /*!< ADC asynchronous clock with
550 …DC_CLOCK_ASYNC_DIV64 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with
553 …DC_CLOCK_ASYNC_DIV128 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_1) /*!< ADC asynchronous clock with
557 … | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with
636 See description with function @ref LL_ADC_SetLowPowerMode(). */
639 (with startup time between trigger and start of sampling). See description with function
642 and auto power-off combined. See description with function @ref LL_ADC_SetLowPowerMode(). */
784 ADC conversions) is reached. This ADC mode is intended to be used with DMA mode non-circular. */
787 (number of ADC conversions). This ADC mode is intended to be used with DMA mode circular. */
823 … with 2 ranks in the sequence */
825 … with 3 ranks in the sequence */
827 … with 4 ranks in the sequence */
829 … with 5 ranks in the sequence */
831 … with 6 ranks in the sequence */
833 … with 7 ranks in the sequence */
835 … with 8 ranks in the sequence */
846 all ranks, ADC conversion of ranks with channels enabled in sequencer). On some other STM32 series,…
851 all ranks, ADC conversion of ranks with channels enabled in sequencer) */
862 discontinuous mode enable with sequence interruption every rank */
1011 ADC group regular. Literal suffix "continued" is kept for compatibility with other STM32 devices fe…
1200 * number is returned, either defined with number
1201 * or with bitfield (only one bit must be set).
1293 * comparison with internal channel parameter to be done
1315 * number in ADC registers. The differentiation is made only with
1426 * number in ADC registers. The differentiation is made only with
1443 * define a single channel to monitor with analog watchdog
1445 * @note To be used with function @ref LL_ADC_SetAnalogWDMonitChannels().
1478 * comparison with internal channel parameter to be done
1515 * @note To be used with function @ref LL_ADC_ConfigAnalogWDThresholds()
1517 * Example, with a ADC resolution of 8 bits, to set the value of
1538 * @note To be used with function @ref LL_ADC_GetAnalogWDThresholds().
1539 * Example, with a ADC resolution of 8 bits, to get the value of
1559 * @note To be used with function @ref LL_ADC_GetAnalogWDThresholds().
1577 * - Multimode (for devices with several ADC instances)
1588 * @note This check is required by functions with setting conditioned to
1592 * @note On devices with only 1 ADC common instance, parameter of this macro
1594 * with devices featuring several ADC common instances).
1678 * On devices with small package, the pin Vref+ is not present
1712 * with TS_ADC_DATA = temperature sensor raw data measured by ADC
1775 * with TS_ADC_DATA = temperature sensor raw data measured by ADC
1782 * of the current device has characteristics in line with
1855 * intended to be used (most commonly) with DMA transfer.
1859 * @note This macro is intended to be used with LL DMA driver, refer to
1867 * @note For devices with several ADC: in multimode, some devices
1900 * This check can be done with function @ref LL_ADC_IsEnabled() for each
2020 * This check can be done with function @ref LL_ADC_IsEnabled() for each
2062 * This check can be done with function @ref LL_ADC_IsEnabled() for each
2092 * This check can be done with function @ref LL_ADC_IsEnabled() for each
2196 * or differential (for devices with differential mode available).
2218 * or differential (for devices with differential mode available).
2318 * - It is not recommended to use with interruption or DMA
2324 * - Do use with polling: 1. Start conversion,
2333 * (with startup time between trigger and start of sampling).
2334 * This feature can be combined with low power mode "auto wait".
2335 * @note With ADC low power mode "auto wait", the ADC conversion data read
2375 * - It is not recommended to use with interruption or DMA
2381 * - Do use with polling: 1. Start conversion,
2390 * (with startup time between trigger and start of sampling).
2391 * This feature can be combined with low power mode "auto wait".
2392 * @note With ADC low power mode "auto wait", the ADC conversion data read
2422 * @note Usage of ADC trigger frequency mode with ADC low power mode:
2552 * (default setting for compatibility with some ADC on other
2622 /* to match with triggers literals definition. */ in LL_ADC_REG_GetTriggerSource()
2745 * - For devices with sequencer fully configurable
2755 * - For devices with sequencer not fully configurable
2817 * - For devices with sequencer fully configurable
2827 * - For devices with sequencer not fully configurable
3053 /* Set bits with content of parameter "Channel" with bits position */ in LL_ADC_REG_SetSequencerRanks()
3055 /* Parameters "Rank" and "Channel" are used with masks because containing */ in LL_ADC_REG_SetSequencerRanks()
3076 * with parts of literals LL_ADC_CHANNEL_x or using
3081 * process the returned value with the helper macro
3129 * comparison with internal channel parameter to be done
3154 * This function can be used with setting "not fully configurable".
3228 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_REG_SetSequencerChannels()
3246 * This function can be used with setting "not fully configurable".
3320 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_REG_SetSequencerChAdd()
3338 * This function can be used with setting "not fully configurable".
3412 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_REG_SetSequencerChRem()
3428 * This function can be used with setting "not fully configurable".
3567 * This ADC mode is intended to be used with DMA mode non-circular.
3571 * This ADC mode is intended to be used with DMA mode circular.
3604 * This ADC mode is intended to be used with DMA mode non-circular.
3608 * This ADC mode is intended to be used with DMA mode circular.
3632 * @note Compatibility with devices without feature overrun:
3636 * Therefore, for compatibility with all devices, parameter
3752 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_SetChannelSamplingTime()
3850 * with analog watchdog from sequencer channel definition,
3914 /* Set bits with content of parameter "AWDChannelGroup" with bits position */ in LL_ADC_SetAnalogWDMonitChannels()
3916 /* Parameters "AWDChannelGroup" and "AWDy" are used with masks because */ in LL_ADC_SetAnalogWDMonitChannels()
3941 * with parts of literals LL_ADC_CHANNEL_x or using
3946 * process the returned value with the helper macro
4135 /* Set bits with content of parameter "AWDThresholdxxxValue" with bits */ in LL_ADC_ConfigAnalogWDThresholds()
4138 /* Parameters "AWDy" and "AWDThresholdxxxValue" are used with masks because */ in LL_ADC_ConfigAnalogWDThresholds()
4196 * ADC can be disabled, enabled with or without conversion on going
4218 /* Set bits with content of parameter "AWDThresholdValue" with bits */ in LL_ADC_SetAnalogWDThresholds()
4221 /* Parameters "AWDy" and "AWDThresholdValue" are used with masks because */ in LL_ADC_SetAnalogWDThresholds()
4236 * threshold low or raw data with ADC thresholds high and low
4238 * @note If raw data with ADC thresholds high and low is retrieved,
4264 /* Set bits with content of parameter "AWDThresholdValue" with bits */ in LL_ADC_GetAnalogWDThresholds()
4267 /* Parameters "AWDy" and "AWDThresholdValue" are used with masks because */ in LL_ADC_GetAnalogWDThresholds()
4469 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_EnableInternalRegulator()
4471 /* to not interfere with bits with HW property "rs". */ in LL_ADC_EnableInternalRegulator()
4520 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_Enable()
4522 /* to not interfere with bits with HW property "rs". */ in LL_ADC_Enable()
4540 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_Disable()
4542 /* to not interfere with bits with HW property "rs". */ in LL_ADC_Disable()
4575 * or differential (for devices with differential mode available).
4579 * @note In case of usage of ADC with DMA transfer:
4603 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_StartCalibration()
4605 /* to not interfere with bits with HW property "rs". */ in LL_ADC_StartCalibration()
4650 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_REG_StartConversion()
4652 /* to not interfere with bits with HW property "rs". */ in LL_ADC_REG_StartConversion()
4662 * ADC must be enabled with conversion on going on group regular,
4670 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_REG_StopConversion()
4672 /* to not interfere with bits with HW property "rs". */ in LL_ADC_REG_StopConversion()
4704 * with feature oversampling).
4717 * @note For devices with feature oversampling: Oversampling
4732 * @note For devices with feature oversampling: Oversampling
4747 * @note For devices with feature oversampling: Oversampling
4762 * @note For devices with feature oversampling: Oversampling