Lines Matching full:with
14 * If no LICENSE file comes with this software, it is provided AS-IS.
110 …_0) /* Trigger edge set to rising edge (default setting for compatibility with some ADC on other S…
113 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
121 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
138 …_0) /* Trigger edge set to rising edge (default setting for compatibility with some ADC on other S…
141 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
149 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
266 * @brief Driver macro reserved for internal use: isolate bits with the
315 …de configuration to operate in independent mode or multimode (for devices with several ADC instanc…
345 * (setting possible with ADC enabled without conversion on going,
346 * ADC enabled with conversion on going, ...)
347 * Each feature can be updated afterwards with a unitary function
348 * and potentially with ADC in a different state than disabled,
376 * (functions with prefix "REG").
383 * (setting possible with ADC enabled without conversion on going,
384 * ADC enabled with conversion on going, ...)
385 * Each feature can be updated afterwards with a unitary function
386 * and potentially with ADC in a different state than disabled,
430 * (functions with prefix "INJ").
437 * (setting possible with ADC enabled without conversion on going,
438 * ADC enabled with conversion on going, ...)
439 * Each feature can be updated afterwards with a unitary function
440 * and potentially with ADC in a different state than disabled,
485 * @brief Flags defines which can be used with LL_ADC_ReadReg function
511 * @brief IT defines which can be used with LL_ADC_ReadReg and LL_ADC_WriteReg functions
522 /** @defgroup ADC_LL_EC_REGISTERS ADC registers compliant with specific purpose
525 /* List of ADC registers intended to be used (most commonly) with */
528 …egular conversion data register (corresponding to register DR) to be used with ADC configured in i…
529 … (corresponding to register CDR) to be used with ADC configured in multimode (available on STM32 d…
537 … /*!< ADC synchronous clock derived from AHB clock with prescaler division …
538 …CPRE_0) /*!< ADC synchronous clock derived from AHB clock with prescaler division …
539 … ) /*!< ADC synchronous clock derived from AHB clock with prescaler division …
540 …CPRE_0) /*!< ADC synchronous clock derived from AHB clock with prescaler division …
676 …mber of ADC conversions) is reached. This ADC mode is intended to be used with DMA mode non-circul…
677 …sferred (number of ADC conversions). This ADC mode is intended to be used with DMA mode circular. …
695 … ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 2 ranks in the sequ…
696 … ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 3 ranks in the sequ…
697 … ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 4 ranks in the sequ…
698 …_2 ) /*!< ADC group regular sequencer enable with 5 ranks in the sequ…
699 …_2 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 6 ranks in the sequ…
700 …_2 | ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 7 ranks in the sequ…
701 …_2 | ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 8 ranks in the sequ…
702 … ) /*!< ADC group regular sequencer enable with 9 ranks in the sequ…
703 … | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 10 ranks in the seq…
704 … | ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 11 ranks in the seq…
705 … | ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 12 ranks in the seq…
706 …_2 ) /*!< ADC group regular sequencer enable with 13 ranks in the seq…
707 …_2 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 14 ranks in the seq…
708 …_2 | ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 15 ranks in the seq…
709 …_2 | ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 16 ranks in the seq…
718 …DC_CR1_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
719 …C_CR1_DISCEN) /*!< ADC group regular sequencer discontinuous mode enabled with sequence interrupti…
720 …DC_CR1_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
721 …DC_CR1_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
722 …DC_CR1_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
723 …DC_CR1_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
724 …DC_CR1_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
725 …DC_CR1_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
791 …njected conversion trigger from ADC group regular. Setting compliant only with group injected trig…
801 … ( ADC_JSQR_JL_0) /*!< ADC group injected sequencer enable with 2 ranks in the sequ…
802 … (ADC_JSQR_JL_1 ) /*!< ADC group injected sequencer enable with 3 ranks in the sequ…
803 … (ADC_JSQR_JL_1 | ADC_JSQR_JL_0) /*!< ADC group injected sequencer enable with 4 ranks in the sequ…
812 …JDISCEN) /*!< ADC group injected sequencer discontinuous mode enable with sequence interrupti…
944 … /*!< ADC dual mode enabled: group injected alternate trigger. Works only with external triggers (…
954 …*!< ADC triple mode enabled: group injected alternate trigger. Works only with external triggers (…
963 …ar conversions are transferred by DMA: each ADC uses its own DMA channel, with its individual DMA …
964 …mber of ADC conversions) is reached. This ADC mode is intended to be used with DMA mode non-circul…
965 …mber of ADC conversions) is reached. This ADC mode is intended to be used with DMA mode non-circul…
966 …mber of ADC conversions) is reached. This ADC mode is intended to be used with DMA mode non-circul…
967 …mber of ADC conversions) is reached. This ADC mode is intended to be used with DMA mode non-circul…
968 …mber of ADC conversions) is reached. This ADC mode is intended to be used with DMA mode non-circul…
969 …mber of ADC conversions) is reached. This ADC mode is intended to be used with DMA mode non-circul…
1091 * number is returned, either defined with number
1092 * or with bitfield (only one bit must be set).
1156 * comparison with internal channel parameter to be done
1187 * number in ADC registers. The differentiation is made only with
1293 * number in ADC registers. The differentiation is made only with
1313 * define a single channel to monitor with analog watchdog
1315 * @note To be used with function @ref LL_ADC_SetAnalogWDMonitChannels().
1346 * comparison with internal channel parameter to be done
1440 * @note To be used with function @ref LL_ADC_SetAnalogWDThresholds().
1441 * Example, with a ADC resolution of 8 bits, to set the value of
1462 * @note To be used with function @ref LL_ADC_GetAnalogWDThresholds().
1463 * Example, with a ADC resolution of 8 bits, to get the value of
1482 * or ADC slave from raw value with both ADC conversion data concatenated.
1485 * In this case the transferred data need to processed with this macro
1501 * - Multimode (for devices with several ADC instances)
1520 * @note This check is required by functions with setting conditioned to
1524 * @note On devices with only 1 ADC common instance, parameter of this macro
1526 * with devices featuring several ADC common instances).
1619 * with TS_ADC_DATA = temperature sensor raw data measured by ADC
1626 * of the current device has characteristics in line with
1696 * intended to be used (most commonly) with DMA transfer.
1700 * @note This macro is intended to be used with LL DMA driver, refer to
1708 * @note For devices with several ADC: in multimode, some devices
1720 * (1) Available on devices with several ADC instances.
2053 /* to match with triggers literals definition. */ in LL_ADC_REG_GetTriggerSource()
2097 * - For devices with sequencer fully configurable
2107 * - For devices with sequencer not fully configurable
2158 * - For devices with sequencer fully configurable
2168 * - For devices with sequencer not fully configurable
2345 /* Set bits with content of parameter "Channel" with bits position */ in LL_ADC_REG_SetSequencerRanks()
2347 /* Parameters "Rank" and "Channel" are used with masks because containing */ in LL_ADC_REG_SetSequencerRanks()
2369 * with parts of literals LL_ADC_CHANNEL_x or using
2374 * process the returned value with the helper macro
2436 * comparison with internal channel parameter to be done
2494 * This ADC mode is intended to be used with DMA mode non-circular.
2498 * This ADC mode is intended to be used with DMA mode circular.
2504 * @note For devices with several ADC instances: ADC multimode DMA
2530 * This ADC mode is intended to be used with DMA mode non-circular.
2534 * This ADC mode is intended to be used with DMA mode circular.
2540 * @note For devices with several ADC instances: ADC multimode DMA
2561 * @note This feature is aimed to be set when using ADC with
2686 /* to match with triggers literals definition. */ in LL_ADC_INJ_GetTriggerSource()
2860 /* Set bits with content of parameter "Channel" with bits position */ in LL_ADC_INJ_SetSequencerRanks()
2862 /* Parameters "Rank" and "Channel" are used with masks because containing */ in LL_ADC_INJ_SetSequencerRanks()
2880 * with parts of literals LL_ADC_CHANNEL_x or using
2885 * process the returned value with the helper macro
2923 * comparison with internal channel parameter to be done
2940 * updated after one ADC conversion trigger and with data
2948 * ADC group injected automatic trigger is compliant only with
3127 /* Set bits with content of parameter "SamplingTime" with bits position */ in LL_ADC_SetChannelSamplingTime()
3129 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_SetChannelSamplingTime()
3226 * with analog watchdog from sequencer channel definition,
3327 * with parts of literals LL_ADC_CHANNEL_x or using
3332 * process the returned value with the helper macro
3477 * or multimode (for devices with several ADC instances).
3508 * or multimode (for devices with several ADC instances).
3540 * each ADC uses its own DMA channel, with its individual
3548 * This ADC mode is intended to be used with DMA mode non-circular.
3552 * This ADC mode is intended to be used with DMA mode circular.
3562 * is a raw data with ADC master and slave concatenated.
3589 * each ADC uses its own DMA channel, with its individual
3597 * This ADC mode is intended to be used with DMA mode non-circular.
3601 * This ADC mode is intended to be used with DMA mode circular.
3611 * is a raw data with ADC master and slave concatenated.
3811 * with feature oversampling).
3824 * @note For devices with feature oversampling: Oversampling
3839 * @note For devices with feature oversampling: Oversampling
3854 * @note For devices with feature oversampling: Oversampling
3869 * @note For devices with feature oversampling: Oversampling
3883 * or raw data with ADC master and slave concatenated.
3884 * @note If raw data with ADC master and slave concatenated is retrieved,
3982 * with feature oversampling).
4007 * @note For devices with feature oversampling: Oversampling
4034 * @note For devices with feature oversampling: Oversampling
4061 * @note For devices with feature oversampling: Oversampling
4088 * @note For devices with feature oversampling: Oversampling