111 static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32…
112 static void DMA_CalcDMAMUXChannelBaseAndMask(DMA_HandleTypeDef *hdma);
113 static void DMA_CalcDMAMUXRequestGenBaseAndMask(DMA_HandleTypeDef *hdma);
151 HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)  in HAL_DMA_Init()  argument
156   if (hdma == NULL)  in HAL_DMA_Init()
162   assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));  in HAL_DMA_Init()
163   assert_param(IS_DMA_DIRECTION(hdma->Init.Direction));  in HAL_DMA_Init()
164   assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc));  in HAL_DMA_Init()
165   assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc));  in HAL_DMA_Init()
166   assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment));  in HAL_DMA_Init()
167   assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment));  in HAL_DMA_Init()
168   assert_param(IS_DMA_MODE(hdma->Init.Mode));  in HAL_DMA_Init()
169   assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));  in HAL_DMA_Init()
171   assert_param(IS_DMA_ALL_REQUEST(hdma->Init.Request));  in HAL_DMA_Init()
175   if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1))  in HAL_DMA_Init()
178 …hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Chann…  in HAL_DMA_Init()
179     hdma->DmaBaseAddress = DMA1;  in HAL_DMA_Init()
184 …hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Chann…  in HAL_DMA_Init()
185     hdma->DmaBaseAddress = DMA2;  in HAL_DMA_Init()
189 …hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Chann…  in HAL_DMA_Init()
190   hdma->DmaBaseAddress = DMA1;  in HAL_DMA_Init()
194   hdma->State = HAL_DMA_STATE_BUSY;  in HAL_DMA_Init()
197   tmp = hdma->Instance->CCR;  in HAL_DMA_Init()
205   tmp |=  hdma->Init.Direction        |  in HAL_DMA_Init()
206           hdma->Init.PeriphInc           | hdma->Init.MemInc           |  in HAL_DMA_Init()
207           hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |  in HAL_DMA_Init()
208           hdma->Init.Mode                | hdma->Init.Priority;  in HAL_DMA_Init()
211   hdma->Instance->CCR = tmp;  in HAL_DMA_Init()
216   DMA_CalcDMAMUXChannelBaseAndMask(hdma);  in HAL_DMA_Init()
218   if (hdma->Init.Direction == DMA_MEMORY_TO_MEMORY)  in HAL_DMA_Init()
221     hdma->Init.Request = DMA_REQUEST_MEM2MEM;  in HAL_DMA_Init()
225   hdma->DMAmuxChannel->CCR = (hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID);  in HAL_DMA_Init()
228   hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;  in HAL_DMA_Init()
230   if (((hdma->Init.Request >  0U) && (hdma->Init.Request <= DMA_REQUEST_GENERATOR3)))  in HAL_DMA_Init()
235     DMA_CalcDMAMUXRequestGenBaseAndMask(hdma);  in HAL_DMA_Init()
238     hdma->DMAmuxRequestGen->RGCR = 0U;  in HAL_DMA_Init()
241     hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;  in HAL_DMA_Init()
245     hdma->DMAmuxRequestGen = 0U;  in HAL_DMA_Init()
246     hdma->DMAmuxRequestGenStatus = 0U;  in HAL_DMA_Init()
247     hdma->DMAmuxRequestGenStatusMask = 0U;  in HAL_DMA_Init()
251   hdma->ErrorCode = HAL_DMA_ERROR_NONE;  in HAL_DMA_Init()
254   hdma->State  = HAL_DMA_STATE_READY;  in HAL_DMA_Init()
257   hdma->Lock = HAL_UNLOCKED;  in HAL_DMA_Init()
268 HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)  in HAL_DMA_DeInit()  argument
272   if (NULL == hdma)  in HAL_DMA_DeInit()
278   assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));  in HAL_DMA_DeInit()
281   __HAL_DMA_DISABLE(hdma);  in HAL_DMA_DeInit()
285   if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1))  in HAL_DMA_DeInit()
288 …hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Chann…  in HAL_DMA_DeInit()
289     hdma->DmaBaseAddress = DMA1;  in HAL_DMA_DeInit()
294 …hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Chann…  in HAL_DMA_DeInit()
295     hdma->DmaBaseAddress = DMA2;  in HAL_DMA_DeInit()
299 …hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Chann…  in HAL_DMA_DeInit()
300   hdma->DmaBaseAddress = DMA1;  in HAL_DMA_DeInit()
304   hdma->Instance->CCR  = 0U;  in HAL_DMA_DeInit()
307   hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1cU));  in HAL_DMA_DeInit()
312   DMA_CalcDMAMUXChannelBaseAndMask(hdma);  in HAL_DMA_DeInit()
315   hdma->DMAmuxChannel->CCR = 0U;  in HAL_DMA_DeInit()
318   hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;  in HAL_DMA_DeInit()
321   if (((hdma->Init.Request >  0U) && (hdma->Init.Request <= DMA_REQUEST_GENERATOR3)))  in HAL_DMA_DeInit()
326     DMA_CalcDMAMUXRequestGenBaseAndMask(hdma);  in HAL_DMA_DeInit()
329     hdma->DMAmuxRequestGen->RGCR = 0U;  in HAL_DMA_DeInit()
332     hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;  in HAL_DMA_DeInit()
335   hdma->DMAmuxRequestGen = 0U;  in HAL_DMA_DeInit()
336   hdma->DMAmuxRequestGenStatus = 0U;  in HAL_DMA_DeInit()
337   hdma->DMAmuxRequestGenStatusMask = 0U;  in HAL_DMA_DeInit()
340   hdma->XferCpltCallback = NULL;  in HAL_DMA_DeInit()
341   hdma->XferHalfCpltCallback = NULL;  in HAL_DMA_DeInit()
342   hdma->XferErrorCallback = NULL;  in HAL_DMA_DeInit()
343   hdma->XferAbortCallback = NULL;  in HAL_DMA_DeInit()
346   hdma->ErrorCode = HAL_DMA_ERROR_NONE;  in HAL_DMA_DeInit()
349   hdma->State = HAL_DMA_STATE_RESET;  in HAL_DMA_DeInit()
352   __HAL_UNLOCK(hdma);  in HAL_DMA_DeInit()
389 HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, …  in HAL_DMA_Start()  argument
397   __HAL_LOCK(hdma);  in HAL_DMA_Start()
399   if (HAL_DMA_STATE_READY == hdma->State)  in HAL_DMA_Start()
402     hdma->State = HAL_DMA_STATE_BUSY;  in HAL_DMA_Start()
403     hdma->ErrorCode = HAL_DMA_ERROR_NONE;  in HAL_DMA_Start()
406     __HAL_DMA_DISABLE(hdma);  in HAL_DMA_Start()
409     DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);  in HAL_DMA_Start()
412     __HAL_DMA_ENABLE(hdma);  in HAL_DMA_Start()
417     __HAL_UNLOCK(hdma);  in HAL_DMA_Start()
432 HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddres…  in HAL_DMA_Start_IT()  argument
441   __HAL_LOCK(hdma);  in HAL_DMA_Start_IT()
443   if (HAL_DMA_STATE_READY == hdma->State)  in HAL_DMA_Start_IT()
446     hdma->State = HAL_DMA_STATE_BUSY;  in HAL_DMA_Start_IT()
447     hdma->ErrorCode = HAL_DMA_ERROR_NONE;  in HAL_DMA_Start_IT()
450     __HAL_DMA_DISABLE(hdma);  in HAL_DMA_Start_IT()
453     DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);  in HAL_DMA_Start_IT()
457     if (NULL != hdma->XferHalfCpltCallback)  in HAL_DMA_Start_IT()
460       __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));  in HAL_DMA_Start_IT()
464       __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);  in HAL_DMA_Start_IT()
465       __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE));  in HAL_DMA_Start_IT()
469     if ((hdma->DMAmuxChannel->CCR & DMAMUX_CxCR_SE) != 0U)  in HAL_DMA_Start_IT()
472       hdma->DMAmuxChannel->CCR |= DMAMUX_CxCR_SOIE;  in HAL_DMA_Start_IT()
475     if (hdma->DMAmuxRequestGen != 0U)  in HAL_DMA_Start_IT()
479       hdma->DMAmuxRequestGen->RGCR |= DMAMUX_RGxCR_OIE;  in HAL_DMA_Start_IT()
483     __HAL_DMA_ENABLE(hdma);  in HAL_DMA_Start_IT()
488     __HAL_UNLOCK(hdma);  in HAL_DMA_Start_IT()
502 HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)  in HAL_DMA_Abort()  argument
506   if (NULL == hdma)  in HAL_DMA_Abort()
512   if (hdma->State != HAL_DMA_STATE_BUSY)  in HAL_DMA_Abort()
514     hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;  in HAL_DMA_Abort()
517     __HAL_UNLOCK(hdma);  in HAL_DMA_Abort()
524     __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));  in HAL_DMA_Abort()
527     hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE;  in HAL_DMA_Abort()
530     __HAL_DMA_DISABLE(hdma);  in HAL_DMA_Abort()
533     hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1cU));  in HAL_DMA_Abort()
536     hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;  in HAL_DMA_Abort()
538     if (hdma->DMAmuxRequestGen != 0U)  in HAL_DMA_Abort()
542       hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE;  in HAL_DMA_Abort()
545       hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;  in HAL_DMA_Abort()
549     hdma->State = HAL_DMA_STATE_READY;  in HAL_DMA_Abort()
552     __HAL_UNLOCK(hdma);  in HAL_DMA_Abort()
564 HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)  in HAL_DMA_Abort_IT()  argument
568   if (HAL_DMA_STATE_BUSY != hdma->State)  in HAL_DMA_Abort_IT()
571     hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;  in HAL_DMA_Abort_IT()
578     __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));  in HAL_DMA_Abort_IT()
581     __HAL_DMA_DISABLE(hdma);  in HAL_DMA_Abort_IT()
584     hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE;  in HAL_DMA_Abort_IT()
587     hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1cU));  in HAL_DMA_Abort_IT()
590     hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;  in HAL_DMA_Abort_IT()
592     if (hdma->DMAmuxRequestGen != 0U)  in HAL_DMA_Abort_IT()
596       hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE;  in HAL_DMA_Abort_IT()
599       hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;  in HAL_DMA_Abort_IT()
603     hdma->State = HAL_DMA_STATE_READY;  in HAL_DMA_Abort_IT()
606     __HAL_UNLOCK(hdma);  in HAL_DMA_Abort_IT()
609     if (hdma->XferAbortCallback != NULL)  in HAL_DMA_Abort_IT()
611       hdma->XferAbortCallback(hdma);  in HAL_DMA_Abort_IT()
625 HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_LevelCompleteTypeDef Com…  in HAL_DMA_PollForTransfer()  argument
631   if (HAL_DMA_STATE_BUSY != hdma->State)  in HAL_DMA_PollForTransfer()
634     hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;  in HAL_DMA_PollForTransfer()
635     __HAL_UNLOCK(hdma);  in HAL_DMA_PollForTransfer()
640   if ((hdma->Instance->CCR & DMA_CCR_CIRC) != 0U)  in HAL_DMA_PollForTransfer()
642     hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED;  in HAL_DMA_PollForTransfer()
650     temp = DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1cU);  in HAL_DMA_PollForTransfer()
655     temp = DMA_FLAG_HT1 << (hdma->ChannelIndex  & 0x1cU);  in HAL_DMA_PollForTransfer()
661   while ((hdma->DmaBaseAddress->ISR & temp) == 0U)  in HAL_DMA_PollForTransfer()
663     if ((hdma->DmaBaseAddress->ISR & (DMA_FLAG_TE1 << (hdma->ChannelIndex & 0x1CU))) != 0U)  in HAL_DMA_PollForTransfer()
668       hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1cU));  in HAL_DMA_PollForTransfer()
671       hdma->ErrorCode = HAL_DMA_ERROR_TE;  in HAL_DMA_PollForTransfer()
674       hdma->State = HAL_DMA_STATE_READY;  in HAL_DMA_PollForTransfer()
677       __HAL_UNLOCK(hdma);  in HAL_DMA_PollForTransfer()
687         hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;  in HAL_DMA_PollForTransfer()
690         hdma->State = HAL_DMA_STATE_READY;  in HAL_DMA_PollForTransfer()
693         __HAL_UNLOCK(hdma);  in HAL_DMA_PollForTransfer()
701   if (hdma->DMAmuxRequestGen != 0U)  in HAL_DMA_PollForTransfer()
704     if ((hdma->DMAmuxRequestGenStatus->RGSR & hdma->DMAmuxRequestGenStatusMask) != 0U)  in HAL_DMA_PollForTransfer()
707       hdma->DMAmuxRequestGen->RGCR |= DMAMUX_RGxCR_OIE;  in HAL_DMA_PollForTransfer()
710       hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;  in HAL_DMA_PollForTransfer()
713       hdma->ErrorCode |= HAL_DMA_ERROR_REQGEN;  in HAL_DMA_PollForTransfer()
718   if ((hdma->DMAmuxChannelStatus->CSR & hdma->DMAmuxChannelStatusMask) != 0U)  in HAL_DMA_PollForTransfer()
721     hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;  in HAL_DMA_PollForTransfer()
724     hdma->ErrorCode |= HAL_DMA_ERROR_SYNC;  in HAL_DMA_PollForTransfer()
730     hdma->DmaBaseAddress->IFCR = (DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1cU));  in HAL_DMA_PollForTransfer()
733     __HAL_UNLOCK(hdma);  in HAL_DMA_PollForTransfer()
737     hdma->State = HAL_DMA_STATE_READY;  in HAL_DMA_PollForTransfer()
742     hdma->DmaBaseAddress->IFCR = (DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1cU));  in HAL_DMA_PollForTransfer()
754 void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)  in HAL_DMA_IRQHandler()  argument
756   uint32_t flag_it = hdma->DmaBaseAddress->ISR;  in HAL_DMA_IRQHandler()
757   uint32_t source_it = hdma->Instance->CCR;  in HAL_DMA_IRQHandler()
760 …if (((flag_it & (DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1cU))) != 0U) && ((source_it & DMA_IT_HT)…  in HAL_DMA_IRQHandler()
763     if ((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)  in HAL_DMA_IRQHandler()
766       __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);  in HAL_DMA_IRQHandler()
769     hdma->DmaBaseAddress->IFCR = (DMA_ISR_HTIF1 << (hdma->ChannelIndex & 0x1CU));  in HAL_DMA_IRQHandler()
774     if (hdma->XferHalfCpltCallback != NULL)  in HAL_DMA_IRQHandler()
777       hdma->XferHalfCpltCallback(hdma);  in HAL_DMA_IRQHandler()
782 …else if (((flag_it & (DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1cU))) != 0U) && ((source_it & DMA_I…  in HAL_DMA_IRQHandler()
784     if ((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)  in HAL_DMA_IRQHandler()
787       __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC);  in HAL_DMA_IRQHandler()
790       hdma->State = HAL_DMA_STATE_READY;  in HAL_DMA_IRQHandler()
793     hdma->DmaBaseAddress->IFCR = (DMA_ISR_TCIF1 << (hdma->ChannelIndex & 0x1cU));  in HAL_DMA_IRQHandler()
796     __HAL_UNLOCK(hdma);  in HAL_DMA_IRQHandler()
798     if (hdma->XferCpltCallback != NULL)  in HAL_DMA_IRQHandler()
801       hdma->XferCpltCallback(hdma);  in HAL_DMA_IRQHandler()
806 …else if (((flag_it & (DMA_FLAG_TE1 << (hdma->ChannelIndex & 0x1cU))) != 0U) && ((source_it & DMA_I…  in HAL_DMA_IRQHandler()
811     __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));  in HAL_DMA_IRQHandler()
814     hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1cU));  in HAL_DMA_IRQHandler()
817     hdma->ErrorCode = HAL_DMA_ERROR_TE;  in HAL_DMA_IRQHandler()
820     hdma->State = HAL_DMA_STATE_READY;  in HAL_DMA_IRQHandler()
823     __HAL_UNLOCK(hdma);  in HAL_DMA_IRQHandler()
825     if (hdma->XferErrorCallback != NULL)  in HAL_DMA_IRQHandler()
828       hdma->XferErrorCallback(hdma);  in HAL_DMA_IRQHandler()
848 HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef Callb…  in HAL_DMA_RegisterCallback()  argument
853   __HAL_LOCK(hdma);  in HAL_DMA_RegisterCallback()
855   if (HAL_DMA_STATE_READY == hdma->State)  in HAL_DMA_RegisterCallback()
860         hdma->XferCpltCallback = pCallback;  in HAL_DMA_RegisterCallback()
864         hdma->XferHalfCpltCallback = pCallback;  in HAL_DMA_RegisterCallback()
868         hdma->XferErrorCallback = pCallback;  in HAL_DMA_RegisterCallback()
872         hdma->XferAbortCallback = pCallback;  in HAL_DMA_RegisterCallback()
886   __HAL_UNLOCK(hdma);  in HAL_DMA_RegisterCallback()
899 HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef Cal…  in HAL_DMA_UnRegisterCallback()  argument
904   __HAL_LOCK(hdma);  in HAL_DMA_UnRegisterCallback()
906   if (HAL_DMA_STATE_READY == hdma->State)  in HAL_DMA_UnRegisterCallback()
911         hdma->XferCpltCallback = NULL;  in HAL_DMA_UnRegisterCallback()
915         hdma->XferHalfCpltCallback = NULL;  in HAL_DMA_UnRegisterCallback()
919         hdma->XferErrorCallback = NULL;  in HAL_DMA_UnRegisterCallback()
923         hdma->XferAbortCallback = NULL;  in HAL_DMA_UnRegisterCallback()
927         hdma->XferCpltCallback = NULL;  in HAL_DMA_UnRegisterCallback()
928         hdma->XferHalfCpltCallback = NULL;  in HAL_DMA_UnRegisterCallback()
929         hdma->XferErrorCallback = NULL;  in HAL_DMA_UnRegisterCallback()
930         hdma->XferAbortCallback = NULL;  in HAL_DMA_UnRegisterCallback()
944   __HAL_UNLOCK(hdma);  in HAL_DMA_UnRegisterCallback()
977 HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma)  in HAL_DMA_GetState()  argument
980   return hdma->State;  in HAL_DMA_GetState()
989 uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma)  in HAL_DMA_GetError()  argument
991   return hdma->ErrorCode;  in HAL_DMA_GetError()
1015 static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32…  in DMA_SetConfig()  argument
1018   hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;  in DMA_SetConfig()
1020   if (hdma->DMAmuxRequestGen != 0U)  in DMA_SetConfig()
1023     hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;  in DMA_SetConfig()
1027   hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1cU));  in DMA_SetConfig()
1030   hdma->Instance->CNDTR = DataLength;  in DMA_SetConfig()
1033   if ((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)  in DMA_SetConfig()
1036     hdma->Instance->CPAR = DstAddress;  in DMA_SetConfig()
1039     hdma->Instance->CMAR = SrcAddress;  in DMA_SetConfig()
1045     hdma->Instance->CPAR = SrcAddress;  in DMA_SetConfig()
1048     hdma->Instance->CMAR = DstAddress;  in DMA_SetConfig()
1058 static void DMA_CalcDMAMUXChannelBaseAndMask(DMA_HandleTypeDef *hdma)  in DMA_CalcDMAMUXChannelBaseAndMask()  argument
1064   if ((uint32_t)hdma->Instance < (uint32_t)DMA2_Channel1)  in DMA_CalcDMAMUXChannelBaseAndMask()
1067     hdma->DMAmuxChannel = (DMAMUX1_Channel0 + (hdma->ChannelIndex >> 2U));  in DMA_CalcDMAMUXChannelBaseAndMask()
1072     hdma->DMAmuxChannel = (DMAMUX1_Channel7 + (hdma->ChannelIndex >> 2U));  in DMA_CalcDMAMUXChannelBaseAndMask()
1076   hdma->DMAmuxChannel = (DMAMUX1_Channel0 + (hdma->ChannelIndex >> 2U));  in DMA_CalcDMAMUXChannelBaseAndMask()
1078   channel_number = (((uint32_t)hdma->Instance & 0xFFU) - 8U) / 20U;  in DMA_CalcDMAMUXChannelBaseAndMask()
1079   hdma->DMAmuxChannelStatus = DMAMUX1_ChannelStatus;  in DMA_CalcDMAMUXChannelBaseAndMask()
1082   hdma->DMAmuxChannelStatusMask = 1UL << (channel_number & 0x1FU);  in DMA_CalcDMAMUXChannelBaseAndMask()
1092 static void DMA_CalcDMAMUXRequestGenBaseAndMask(DMA_HandleTypeDef *hdma)  in DMA_CalcDMAMUXRequestGenBaseAndMask()  argument
1094   uint32_t request =  hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID;  in DMA_CalcDMAMUXRequestGenBaseAndMask()
1097 …hdma->DMAmuxRequestGen = (DMAMUX_RequestGen_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_RequestGenera…  in DMA_CalcDMAMUXRequestGenBaseAndMask()
1099   hdma->DMAmuxRequestGenStatus = DMAMUX1_RequestGenStatus;  in DMA_CalcDMAMUXRequestGenBaseAndMask()
1102   hdma->DMAmuxRequestGenStatusMask = 1UL << ((request - 1U) & 0x3U);  in DMA_CalcDMAMUXRequestGenBaseAndMask()