2122 __STATIC_INLINE void LL_RCC_SetMSIPLLMode(uint32_t Source)  in LL_RCC_SetMSIPLLMode()  argument
2124   MODIFY_REG(RCC->CR, RCC_CR_MSIPLLSEL, Source);  in LL_RCC_SetMSIPLLMode()
2515 __STATIC_INLINE void LL_RCC_LSCO_SetSource(uint32_t Source)  in LL_RCC_LSCO_SetSource()  argument
2517   MODIFY_REG(RCC->BDCR, RCC_BDCR_LSCOSEL, Source);  in LL_RCC_LSCO_SetSource()
2550 __STATIC_INLINE void LL_RCC_SetSysClkSource(uint32_t Source)  in LL_RCC_SetSysClkSource()  argument
2552   MODIFY_REG(RCC->CFGR1, RCC_CFGR1_SW, Source);  in LL_RCC_SetSysClkSource()
3109 __STATIC_INLINE void LL_RCC_SetUSBPHYClockSource(uint32_t Source)  in LL_RCC_SetUSBPHYClockSource()  argument
3111   MODIFY_REG(RCC->CCIPR2, RCC_CCIPR2_USBPHYCSEL, Source);  in LL_RCC_SetUSBPHYClockSource()
3155 __STATIC_INLINE void LL_RCC_SetDAC1ClockSource(uint32_t Source)  in LL_RCC_SetDAC1ClockSource()  argument
3157   MODIFY_REG(RCC->CCIPR3, RCC_CCIPR3_DAC1SEL, Source);  in LL_RCC_SetDAC1ClockSource()
3171 __STATIC_INLINE void LL_RCC_SetADF1ClockSource(uint32_t Source)  in LL_RCC_SetADF1ClockSource()  argument
3173   MODIFY_REG(RCC->CCIPR3, RCC_CCIPR3_ADF1SEL, Source);  in LL_RCC_SetADF1ClockSource()
3187 __STATIC_INLINE void LL_RCC_SetMDF1ClockSource(uint32_t Source)  in LL_RCC_SetMDF1ClockSource()  argument
3189   MODIFY_REG(RCC->CCIPR2, RCC_CCIPR2_MDF1SEL, Source);  in LL_RCC_SetMDF1ClockSource()
3202 __STATIC_INLINE void LL_RCC_SetOCTOSPIClockSource(uint32_t Source)  in LL_RCC_SetOCTOSPIClockSource()  argument
3204   MODIFY_REG(RCC->CCIPR2, RCC_CCIPR2_OCTOSPISEL, Source);  in LL_RCC_SetOCTOSPIClockSource()
3218 __STATIC_INLINE void LL_RCC_SetHSPIClockSource(uint32_t Source)  in LL_RCC_SetHSPIClockSource()  argument
3220   MODIFY_REG(RCC->CCIPR2, RCC_CCIPR2_HSPISEL, Source);  in LL_RCC_SetHSPIClockSource()
3233 __STATIC_INLINE void LL_RCC_SetSAESClockSource(uint32_t Source)  in LL_RCC_SetSAESClockSource()  argument
3235   MODIFY_REG(RCC->CCIPR2, RCC_CCIPR2_SAESSEL, Source);  in LL_RCC_SetSAESClockSource()
3248 __STATIC_INLINE void LL_RCC_SetDSIClockSource(uint32_t Source)  in LL_RCC_SetDSIClockSource()  argument
3250   MODIFY_REG(RCC->CCIPR2, RCC_CCIPR2_DSIHOSTSEL, Source);  in LL_RCC_SetDSIClockSource()
3263 __STATIC_INLINE void LL_RCC_SetLTDCClockSource(uint32_t Source)  in LL_RCC_SetLTDCClockSource()  argument
3265   MODIFY_REG(RCC->CCIPR2, RCC_CCIPR2_LTDCSEL, Source);  in LL_RCC_SetLTDCClockSource()
3760 __STATIC_INLINE void LL_RCC_SetRTCClockSource(uint32_t Source)  in LL_RCC_SetRTCClockSource()  argument
3762   MODIFY_REG(RCC->BDCR, RCC_BDCR_RTCSEL, Source);  in LL_RCC_SetRTCClockSource()
3890 __STATIC_INLINE void LL_RCC_PLL1_ConfigDomain_SYS(uint32_t Source, uint32_t PLLM, uint32_t PLLN, ui…  in LL_RCC_PLL1_ConfigDomain_SYS()  argument
3892   MODIFY_REG(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1SRC | RCC_PLL1CFGR_PLL1M, Source | \  in LL_RCC_PLL1_ConfigDomain_SYS()
3918 __STATIC_INLINE void LL_RCC_PLL1_ConfigDomain_SAI(uint32_t Source, uint32_t PLLM, uint32_t PLLN, ui…  in LL_RCC_PLL1_ConfigDomain_SAI()  argument
3920   MODIFY_REG(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1SRC | RCC_PLL1CFGR_PLL1M, Source | \  in LL_RCC_PLL1_ConfigDomain_SAI()
3946 __STATIC_INLINE void LL_RCC_PLL1_ConfigDomain_48M(uint32_t Source, uint32_t PLLM, uint32_t PLLN, ui…  in LL_RCC_PLL1_ConfigDomain_48M()  argument
3948   MODIFY_REG(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1SRC | RCC_PLL1CFGR_PLL1M, Source | \  in LL_RCC_PLL1_ConfigDomain_48M()
4377 __STATIC_INLINE void LL_RCC_PLL2_ConfigDomain_48M(uint32_t Source, uint32_t PLLM, uint32_t PLLN, ui…  in LL_RCC_PLL2_ConfigDomain_48M()  argument
4379   MODIFY_REG(RCC->PLL2CFGR, RCC_PLL2CFGR_PLL2SRC | RCC_PLL2CFGR_PLL2M, Source | \  in LL_RCC_PLL2_ConfigDomain_48M()
4404 __STATIC_INLINE void LL_RCC_PLL2_ConfigDomain_SAI(uint32_t Source, uint32_t PLLM, uint32_t PLLN, ui…  in LL_RCC_PLL2_ConfigDomain_SAI()  argument
4406   MODIFY_REG(RCC->PLL2CFGR, RCC_PLL2CFGR_PLL2SRC | RCC_PLL2CFGR_PLL2M, Source | \  in LL_RCC_PLL2_ConfigDomain_SAI()
4431 __STATIC_INLINE void LL_RCC_PLL2_ConfigDomain_ADC(uint32_t Source, uint32_t PLLM, uint32_t PLLN, ui…  in LL_RCC_PLL2_ConfigDomain_ADC()  argument
4433   MODIFY_REG(RCC->PLL2CFGR, RCC_PLL2CFGR_PLL2SRC | RCC_PLL2CFGR_PLL2M, Source | \  in LL_RCC_PLL2_ConfigDomain_ADC()
4793 __STATIC_INLINE void LL_RCC_PLL3_ConfigDomain_SAI(uint32_t Source, uint32_t PLLM, uint32_t PLLN, ui…  in LL_RCC_PLL3_ConfigDomain_SAI()  argument
4795   MODIFY_REG(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3SRC | RCC_PLL3CFGR_PLL3M, Source | \  in LL_RCC_PLL3_ConfigDomain_SAI()
4821 __STATIC_INLINE void LL_RCC_PLL3_ConfigDomain_48M(uint32_t Source, uint32_t PLLM, uint32_t PLLN, ui…  in LL_RCC_PLL3_ConfigDomain_48M()  argument
4823   MODIFY_REG(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3SRC | RCC_PLL3CFGR_PLL3M, Source | \  in LL_RCC_PLL3_ConfigDomain_48M()
4851 __STATIC_INLINE void LL_RCC_PLL3_ConfigDomain_HSPI_LTDC(uint32_t Source, uint32_t PLLM, uint32_t PL…  in LL_RCC_PLL3_ConfigDomain_HSPI_LTDC()  argument
4853   MODIFY_REG(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3SRC | RCC_PLL3CFGR_PLL3M, Source | \  in LL_RCC_PLL3_ConfigDomain_HSPI_LTDC()