Lines Matching refs:Source

2214 __STATIC_INLINE void LL_RCC_SetSysClkSource(uint32_t Source)  in LL_RCC_SetSysClkSource()  argument
2216 MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, Source); in LL_RCC_SetSysClkSource()
2573 __STATIC_INLINE void LL_RCC_SetCECClockSource(uint32_t Source) in LL_RCC_SetCECClockSource() argument
2575 MODIFY_REG(RCC->DCKCFGR2, RCC_DCKCFGR2_CECSEL, Source); in LL_RCC_SetCECClockSource()
2587 __STATIC_INLINE void LL_RCC_SetI2SClockSource(uint32_t Source) in LL_RCC_SetI2SClockSource() argument
2589 MODIFY_REG(RCC->CFGR, RCC_CFGR_I2SSRC, Source); in LL_RCC_SetI2SClockSource()
2601 __STATIC_INLINE void LL_RCC_SetDSIClockSource(uint32_t Source) in LL_RCC_SetDSIClockSource() argument
2603 MODIFY_REG(RCC->DCKCFGR2, RCC_DCKCFGR2_DSISEL, Source); in LL_RCC_SetDSIClockSource()
2616 __STATIC_INLINE void LL_RCC_SetDFSDMAudioClockSource(uint32_t Source) in LL_RCC_SetDFSDMAudioClockSource() argument
2618 MODIFY_REG(RCC->DCKCFGR1, RCC_DCKCFGR1_ADFSDM1SEL, Source); in LL_RCC_SetDFSDMAudioClockSource()
2629 __STATIC_INLINE void LL_RCC_SetDFSDMClockSource(uint32_t Source) in LL_RCC_SetDFSDMClockSource() argument
2631 MODIFY_REG(RCC->DCKCFGR1, RCC_DCKCFGR1_DFSDM1SEL, Source); in LL_RCC_SetDFSDMClockSource()
2934 __STATIC_INLINE void LL_RCC_SetRTCClockSource(uint32_t Source) in LL_RCC_SetRTCClockSource() argument
2936 MODIFY_REG(RCC->BDCR, RCC_BDCR_RTCSEL, Source); in LL_RCC_SetRTCClockSource()
3241 __STATIC_INLINE void LL_RCC_PLL_ConfigDomain_SYS(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uin… in LL_RCC_PLL_ConfigDomain_SYS() argument
3244 Source | PLLM | PLLN << RCC_PLLCFGR_PLLN_Pos | PLLP); in LL_RCC_PLL_ConfigDomain_SYS()
3341 __STATIC_INLINE void LL_RCC_PLL_ConfigDomain_48M(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uin… in LL_RCC_PLL_ConfigDomain_48M() argument
3344 Source | PLLM | PLLN << RCC_PLLCFGR_PLLN_Pos | PLLQ); in LL_RCC_PLL_ConfigDomain_48M()
3434 __STATIC_INLINE void LL_RCC_PLL_ConfigDomain_DSI(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uin… in LL_RCC_PLL_ConfigDomain_DSI() argument
3437 Source | PLLM | PLLN << RCC_PLLCFGR_PLLN_Pos | PLLR); in LL_RCC_PLL_ConfigDomain_DSI()
3844 __STATIC_INLINE void LL_RCC_PLLI2S_ConfigDomain_SAI(uint32_t Source, uint32_t PLLM, uint32_t PLLN, … in LL_RCC_PLLI2S_ConfigDomain_SAI() argument
3846 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM, Source | PLLM); in LL_RCC_PLLI2S_ConfigDomain_SAI()
3936 __STATIC_INLINE void LL_RCC_PLLI2S_ConfigDomain_SPDIFRX(uint32_t Source, uint32_t PLLM, uint32_t PL… in LL_RCC_PLLI2S_ConfigDomain_SPDIFRX() argument
3938 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM, Source | PLLM); in LL_RCC_PLLI2S_ConfigDomain_SPDIFRX()
4029 __STATIC_INLINE void LL_RCC_PLLI2S_ConfigDomain_I2S(uint32_t Source, uint32_t PLLM, uint32_t PLLN, … in LL_RCC_PLLI2S_ConfigDomain_I2S() argument
4031 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM, Source | PLLM); in LL_RCC_PLLI2S_ConfigDomain_I2S()
4312 __STATIC_INLINE void LL_RCC_PLLSAI_ConfigDomain_SAI(uint32_t Source, uint32_t PLLM, uint32_t PLLN, … in LL_RCC_PLLSAI_ConfigDomain_SAI() argument
4314 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM, Source | PLLM); in LL_RCC_PLLSAI_ConfigDomain_SAI()
4403 __STATIC_INLINE void LL_RCC_PLLSAI_ConfigDomain_48M(uint32_t Source, uint32_t PLLM, uint32_t PLLN, … in LL_RCC_PLLSAI_ConfigDomain_48M() argument
4405 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM, Source | PLLM); in LL_RCC_PLLSAI_ConfigDomain_48M()
4502 __STATIC_INLINE void LL_RCC_PLLSAI_ConfigDomain_LTDC(uint32_t Source, uint32_t PLLM, uint32_t PLLN,… in LL_RCC_PLLSAI_ConfigDomain_LTDC() argument
4504 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM, Source | PLLM); in LL_RCC_PLLSAI_ConfigDomain_LTDC()