208                                     FSMC_NORSRAM_InitTypeDef *Init)  in FSMC_NORSRAM_Init()  argument
216   assert_param(IS_FSMC_NORSRAM_BANK(Init->NSBank));  in FSMC_NORSRAM_Init()
217   assert_param(IS_FSMC_MUX(Init->DataAddressMux));  in FSMC_NORSRAM_Init()
218   assert_param(IS_FSMC_MEMORY(Init->MemoryType));  in FSMC_NORSRAM_Init()
219   assert_param(IS_FSMC_NORSRAM_MEMORY_WIDTH(Init->MemoryDataWidth));  in FSMC_NORSRAM_Init()
220   assert_param(IS_FSMC_BURSTMODE(Init->BurstAccessMode));  in FSMC_NORSRAM_Init()
221   assert_param(IS_FSMC_WAIT_POLARITY(Init->WaitSignalPolarity));  in FSMC_NORSRAM_Init()
222   assert_param(IS_FSMC_WRAP_MODE(Init->WrapMode));  in FSMC_NORSRAM_Init()
223   assert_param(IS_FSMC_WAIT_SIGNAL_ACTIVE(Init->WaitSignalActive));  in FSMC_NORSRAM_Init()
224   assert_param(IS_FSMC_WRITE_OPERATION(Init->WriteOperation));  in FSMC_NORSRAM_Init()
225   assert_param(IS_FSMC_WAITE_SIGNAL(Init->WaitSignal));  in FSMC_NORSRAM_Init()
226   assert_param(IS_FSMC_EXTENDED_MODE(Init->ExtendedMode));  in FSMC_NORSRAM_Init()
227   assert_param(IS_FSMC_ASYNWAIT(Init->AsynchronousWait));  in FSMC_NORSRAM_Init()
228   assert_param(IS_FSMC_WRITE_BURST(Init->WriteBurst));  in FSMC_NORSRAM_Init()
229   assert_param(IS_FSMC_PAGESIZE(Init->PageSize));  in FSMC_NORSRAM_Init()
232   __FSMC_NORSRAM_DISABLE(Device, Init->NSBank);  in FSMC_NORSRAM_Init()
235   if (Init->MemoryType == FSMC_MEMORY_TYPE_NOR)  in FSMC_NORSRAM_Init()
245               Init->DataAddressMux          | \  in FSMC_NORSRAM_Init()
246               Init->MemoryType              | \  in FSMC_NORSRAM_Init()
247               Init->MemoryDataWidth         | \  in FSMC_NORSRAM_Init()
248               Init->BurstAccessMode         | \  in FSMC_NORSRAM_Init()
249               Init->WaitSignalPolarity      | \  in FSMC_NORSRAM_Init()
250               Init->WaitSignalActive        | \  in FSMC_NORSRAM_Init()
251               Init->WriteOperation          | \  in FSMC_NORSRAM_Init()
252               Init->WaitSignal              | \  in FSMC_NORSRAM_Init()
253               Init->ExtendedMode            | \  in FSMC_NORSRAM_Init()
254               Init->AsynchronousWait        | \  in FSMC_NORSRAM_Init()
255               Init->WriteBurst);  in FSMC_NORSRAM_Init()
257   btcr_reg |= Init->WrapMode;  in FSMC_NORSRAM_Init()
258   btcr_reg |= Init->PageSize;  in FSMC_NORSRAM_Init()
277   MODIFY_REG(Device->BTCR[Init->NSBank], mask, btcr_reg);  in FSMC_NORSRAM_Init()
528 HAL_StatusTypeDef FSMC_NAND_Init(FSMC_NAND_TypeDef *Device, FSMC_NAND_InitTypeDef *Init)  in FSMC_NAND_Init()  argument
532   assert_param(IS_FSMC_NAND_BANK(Init->NandBank));  in FSMC_NAND_Init()
533   assert_param(IS_FSMC_WAIT_FEATURE(Init->Waitfeature));  in FSMC_NAND_Init()
534   assert_param(IS_FSMC_NAND_MEMORY_WIDTH(Init->MemoryDataWidth));  in FSMC_NAND_Init()
535   assert_param(IS_FSMC_ECC_STATE(Init->EccComputation));  in FSMC_NAND_Init()
536   assert_param(IS_FSMC_ECCPAGE_SIZE(Init->ECCPageSize));  in FSMC_NAND_Init()
537   assert_param(IS_FSMC_TCLR_TIME(Init->TCLRSetupTime));  in FSMC_NAND_Init()
538   assert_param(IS_FSMC_TAR_TIME(Init->TARSetupTime));  in FSMC_NAND_Init()
541   if (Init->NandBank == FSMC_NAND_BANK2)  in FSMC_NAND_Init()
544 … MODIFY_REG(Device->PCR2, PCR_CLEAR_MASK, (Init->Waitfeature                                      |  in FSMC_NAND_Init()
546 …                                           Init->MemoryDataWidth                                  |  in FSMC_NAND_Init()
547 …                                           Init->EccComputation                                   |  in FSMC_NAND_Init()
548 …                                           Init->ECCPageSize                                      |  in FSMC_NAND_Init()
549                                               ((Init->TCLRSetupTime) << FSMC_PCRx_TCLR_Pos)  |  in FSMC_NAND_Init()
550                                               ((Init->TARSetupTime)  << FSMC_PCRx_TAR_Pos)));  in FSMC_NAND_Init()
555 … MODIFY_REG(Device->PCR3, PCR_CLEAR_MASK, (Init->Waitfeature                                      |  in FSMC_NAND_Init()
557 …                                           Init->MemoryDataWidth                                  |  in FSMC_NAND_Init()
558 …                                           Init->EccComputation                                   |  in FSMC_NAND_Init()
559 …                                           Init->ECCPageSize                                      |  in FSMC_NAND_Init()
560                                               ((Init->TCLRSetupTime) << FSMC_PCRx_TCLR_Pos)  |  in FSMC_NAND_Init()
561                                               ((Init->TARSetupTime)  << FSMC_PCRx_TAR_Pos)));  in FSMC_NAND_Init()
856 HAL_StatusTypeDef FSMC_PCCARD_Init(FSMC_PCCARD_TypeDef *Device, FSMC_PCCARD_InitTypeDef *Init)  in FSMC_PCCARD_Init()  argument
861   assert_param(IS_FSMC_WAIT_FEATURE(Init->Waitfeature));  in FSMC_PCCARD_Init()
862   assert_param(IS_FSMC_TCLR_TIME(Init->TCLRSetupTime));  in FSMC_PCCARD_Init()
863   assert_param(IS_FSMC_TAR_TIME(Init->TARSetupTime));  in FSMC_PCCARD_Init()
874               Init->Waitfeature                                      |  in FSMC_PCCARD_Init()
876               (Init->TCLRSetupTime << FSMC_PCRx_TCLR_Pos)   |  in FSMC_PCCARD_Init()
877               (Init->TARSetupTime  << FSMC_PCRx_TAR_Pos)));  in FSMC_PCCARD_Init()