Lines Matching full:with
13 * the "License"; You may not use this file except in compliance with the
210 * @brief Driver macro reserved for internal use: isolate bits with the
254 …de configuration to operate in independent mode or multimode (for devices with several ADC instanc…
272 * (setting possible with ADC enabled without conversion on going,
273 * ADC enabled with conversion on going, ...)
274 * Each feature can be updated afterwards with a unitary function
275 * and potentially with ADC in a different state than disabled,
298 * (functions with prefix "REG").
305 * (setting possible with ADC enabled without conversion on going,
306 * ADC enabled with conversion on going, ...)
307 * Each feature can be updated afterwards with a unitary function
308 * and potentially with ADC in a different state than disabled,
316 … @note On this STM32 serie, external trigger is set with trigger polarity: rising edge
352 * (functions with prefix "INJ").
359 * (setting possible with ADC enabled without conversion on going,
360 * ADC enabled with conversion on going, ...)
361 * Each feature can be updated afterwards with a unitary function
362 * and potentially with ADC in a different state than disabled,
370 … @note On this STM32 serie, external trigger is set with trigger polarity: rising edge
407 * @brief Flags defines which can be used with LL_ADC_ReadReg function
428 * @brief IT defines which can be used with LL_ADC_ReadReg and LL_ADC_WriteReg functions
438 /** @defgroup ADC_LL_EC_REGISTERS ADC registers compliant with specific purpose
441 /* List of ADC registers intended to be used (most commonly) with */
444 …egular conversion data register (corresponding to register DR) to be used with ADC configured in i…
446 … (corresponding to register CDR) to be used with ADC configured in multimode (available on STM32 d…
585 …sferred (number of ADC conversions). This ADC mode is intended to be used with DMA mode circular. …
594 … ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 2 ranks in the sequ…
595 … ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 3 ranks in the sequ…
596 … ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 4 ranks in the sequ…
597 …_2 ) /*!< ADC group regular sequencer enable with 5 ranks in the sequ…
598 …_2 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 6 ranks in the sequ…
599 …_2 | ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 7 ranks in the sequ…
600 …_2 | ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 8 ranks in the sequ…
601 … ) /*!< ADC group regular sequencer enable with 9 ranks in the sequ…
602 … | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 10 ranks in the seq…
603 … | ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 11 ranks in the seq…
604 … | ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 12 ranks in the seq…
605 …_2 ) /*!< ADC group regular sequencer enable with 13 ranks in the seq…
606 …_2 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 14 ranks in the seq…
607 …_2 | ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 15 ranks in the seq…
608 …_2 | ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 16 ranks in the seq…
617 …DC_CR1_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
618 …C_CR1_DISCEN) /*!< ADC group regular sequencer discontinuous mode enabled with sequence interrupti…
619 …DC_CR1_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
620 …DC_CR1_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
621 …DC_CR1_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
622 …DC_CR1_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
623 …DC_CR1_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
624 …DC_CR1_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
697 …njected conversion trigger from ADC group regular. Setting compliant only with group injected trig…
707 … ( ADC_JSQR_JL_0) /*!< ADC group injected sequencer enable with 2 ranks in the sequ…
708 … (ADC_JSQR_JL_1 ) /*!< ADC group injected sequencer enable with 3 ranks in the sequ…
709 … (ADC_JSQR_JL_1 | ADC_JSQR_JL_0) /*!< ADC group injected sequencer enable with 4 ranks in the sequ…
718 …JDISCEN) /*!< ADC group injected sequencer discontinuous mode enable with sequence interrupti…
855 … /*!< ADC dual mode enabled: group injected alternate trigger. Works only with external triggers (…
976 * number is returned, either defined with number
977 * or with bitfield (only one bit must be set).
1037 * comparison with internal channel parameter to be done
1068 * number in ADC registers. The differentiation is made only with
1169 * number in ADC registers. The differentiation is made only with
1192 * define a single channel to monitor with analog watchdog
1194 * @note To be used with function @ref LL_ADC_SetAnalogWDMonitChannels().
1223 * comparison with internal channel parameter to be done
1311 * @note To be used with function @ref LL_ADC_SetAnalogWDThresholds().
1312 * Example, with a ADC resolution of 8 bits, to set the value of
1324 /* This macro has been kept anyway for compatibility with other */
1333 * @note To be used with function @ref LL_ADC_GetAnalogWDThresholds().
1334 * Example, with a ADC resolution of 8 bits, to get the value of
1346 /* This macro has been kept anyway for compatibility with other */
1354 * or ADC slave from raw value with both ADC conversion data concatenated.
1357 * In this case the transferred data need to processed with this macro
1374 * - Multimode (for devices with several ADC instances)
1409 * @note This check is required by functions with setting conditioned to
1413 * @note On devices with only 1 ADC common instance, parameter of this macro
1415 * with devices featuring several ADC common instances).
1494 * with TS_ADC_DATA = temperature sensor raw data measured by ADC
1501 * of the current device has characteristics in line with
1568 * intended to be used (most commonly) with DMA transfer.
1572 * @note This macro is intended to be used with LL DMA driver, refer to
1580 * @note For devices with several ADC: in multimode, some devices
1587 * @note On STM32F1, multimode can be used only with ADC1 and ADC2, not ADC3.
1589 * for multimode can be used only with ADC1 and ADC2.
1597 * (1) Available on devices with several ADC instances.
1785 * @note On this STM32 serie, external trigger is set with trigger polarity:
1887 * - For devices with sequencer fully configurable
1897 * - For devices with sequencer not fully configurable
1948 * - For devices with sequencer fully configurable
1958 * - For devices with sequencer not fully configurable
2133 /* Set bits with content of parameter "Channel" with bits position */ in LL_ADC_REG_SetSequencerRanks()
2135 /* Parameters "Rank" and "Channel" are used with masks because containing */ in LL_ADC_REG_SetSequencerRanks()
2157 * with parts of literals LL_ADC_CHANNEL_x or using
2162 * process the returned value with the helper macro
2222 * comparison with internal channel parameter to be done
2280 * This ADC mode is intended to be used with DMA mode non-circular.
2284 * This ADC mode is intended to be used with DMA mode circular.
2312 * This ADC mode is intended to be used with DMA mode non-circular.
2316 * This ADC mode is intended to be used with DMA mode circular.
2347 * @note On this STM32 serie, external trigger is set with trigger polarity:
2577 /* Set bits with content of parameter "Channel" with bits position */ in LL_ADC_INJ_SetSequencerRanks()
2579 /* Parameters "Rank" and "Channel" are used with masks because containing */ in LL_ADC_INJ_SetSequencerRanks()
2597 * with parts of literals LL_ADC_CHANNEL_x or using
2602 * process the returned value with the helper macro
2638 * comparison with internal channel parameter to be done
2655 * updated after one ADC conversion trigger and with data
2663 * ADC group injected automatic trigger is compliant only with
2839 /* Set bits with content of parameter "SamplingTime" with bits position */ in LL_ADC_SetChannelSamplingTime()
2841 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_SetChannelSamplingTime()
2935 * with analog watchdog from sequencer channel definition,
3030 * with parts of literals LL_ADC_CHANNEL_x or using
3035 * process the returned value with the helper macro
3175 * or multimode (for devices with several ADC instances).
3202 * or multimode (for devices with several ADC instances).
3274 * or differential (for devices with differential mode available).
3373 * with feature oversampling).
3386 * @note For devices with feature oversampling: Oversampling
3401 * or raw data with ADC master and slave concatenated.
3402 * @note If raw data with ADC master and slave concatenated is retrieved,
3499 * with feature oversampling).
3524 * @note For devices with feature oversampling: Oversampling