1977   uint32_t reg;  in EMU_BUPDInit()  local
1980   reg = EMU->PWRCONF & ~(_EMU_PWRCONF_PWRRES_MASK  in EMU_BUPDInit()
1985   reg |= bupdInit->resistor  in EMU_BUPDInit()
1990   EMU->PWRCONF = reg;  in EMU_BUPDInit()
1993   reg = EMU->BUINACT & ~(_EMU_BUINACT_PWRCON_MASK);  in EMU_BUPDInit()
1994   reg |= (bupdInit->inactivePower);  in EMU_BUPDInit()
1995   EMU->BUINACT = reg;  in EMU_BUPDInit()
1998   reg = EMU->BUACT & ~(_EMU_BUACT_PWRCON_MASK);  in EMU_BUPDInit()
1999   reg |= (bupdInit->activePower);  in EMU_BUPDInit()
2000   EMU->BUACT = reg;  in EMU_BUPDInit()
2003   reg = EMU->BUCTRL & ~(_EMU_BUCTRL_PROBE_MASK  in EMU_BUPDInit()
2010   reg |= bupdInit->probe  in EMU_BUPDInit()
2016   EMU->BUCTRL = reg;  in EMU_BUPDInit()
2086   uint32_t reg = 0;  in EMU_BUInit()  local
2089   reg |= (buInit->disMaxComp << _EMU_BUCTRL_DISMAXCOMP_SHIFT);  in EMU_BUInit()
2090   reg |= (uint32_t)(buInit->inactivePwrCon);  in EMU_BUInit()
2091   reg |= (uint32_t)(buInit->activePwrCon);  in EMU_BUInit()
2092   reg |= (uint32_t)(buInit->pwrRes);  in EMU_BUInit()
2093   reg |= (uint32_t)(buInit->voutRes);  in EMU_BUInit()
2094   reg |= (buInit->buVinProbeEn << _EMU_BUCTRL_BUVINPROBEEN_SHIFT);  in EMU_BUInit()
2095   reg |= (buInit->staEn << _EMU_BUCTRL_STATEN_SHIFT);  in EMU_BUInit()
2096   reg |= (buInit->enable << _EMU_BUCTRL_EN_SHIFT);  in EMU_BUInit()
2097   EMU->BUCTRL = reg;  in EMU_BUInit()
2111   uint32_t reg;  in EMU_BUDisMaxCompSet()  local
2113   reg = EMU->BUCTRL & ~(_EMU_BUCTRL_DISMAXCOMP_MASK);  in EMU_BUDisMaxCompSet()
2114   reg |= (disableMainBuComparator << _EMU_BUCTRL_DISMAXCOMP_SHIFT);  in EMU_BUDisMaxCompSet()
2115   EMU->BUCTRL = reg;  in EMU_BUDisMaxCompSet()
2129   uint32_t reg;  in EMU_BUBuInactPwrConSet()  local
2131   reg = EMU->BUCTRL & ~(_EMU_BUCTRL_BUINACTPWRCON_MASK);  in EMU_BUBuInactPwrConSet()
2132   reg |= (uint32_t)(inactPwrCon);  in EMU_BUBuInactPwrConSet()
2133   EMU->BUCTRL = reg;  in EMU_BUBuInactPwrConSet()
2147   uint32_t reg;  in EMU_BUBuActPwrConSet()  local
2149   reg = EMU->BUCTRL & ~(_EMU_BUCTRL_BUACTPWRCON_MASK);  in EMU_BUBuActPwrConSet()
2150   reg |= (uint32_t)(actPwrCon);  in EMU_BUBuActPwrConSet()
2151   EMU->BUCTRL = reg;  in EMU_BUBuActPwrConSet()
2165   uint32_t reg;  in EMU_BUPwrResSet()  local
2167   reg = EMU->BUCTRL & ~(_EMU_BUCTRL_PWRRES_MASK);  in EMU_BUPwrResSet()
2168   reg |= (uint32_t)(pwrRes);  in EMU_BUPwrResSet()
2169   EMU->BUCTRL = reg;  in EMU_BUPwrResSet()
2183   uint32_t reg;  in EMU_BUVoutResSet()  local
2185   reg = EMU->BUCTRL & ~(_EMU_BUCTRL_VOUTRES_MASK);  in EMU_BUVoutResSet()
2186   reg |= (uint32_t)(resistorSel);  in EMU_BUVoutResSet()
2187   EMU->BUCTRL = reg;  in EMU_BUVoutResSet()
2201   uint32_t reg;  in EMU_BUBuVinProbeEnSet()  local
2203   reg = EMU->BUCTRL & ~(_EMU_BUCTRL_BUVINPROBEEN_MASK);  in EMU_BUBuVinProbeEnSet()
2204   reg |= (enable << _EMU_BUCTRL_BUVINPROBEEN_SHIFT);  in EMU_BUBuVinProbeEnSet()
2205   EMU->BUCTRL = reg;  in EMU_BUBuVinProbeEnSet()
2219   uint32_t reg;  in EMU_BUStatEnSet()  local
2221   reg = EMU->BUCTRL & ~(_EMU_BUCTRL_STATEN_MASK);  in EMU_BUStatEnSet()
2222   reg |= (enable << _EMU_BUCTRL_STATEN_SHIFT);  in EMU_BUStatEnSet()
2223   EMU->BUCTRL = reg;  in EMU_BUStatEnSet()
2237   uint32_t reg;  in EMU_BUEnableSet()  local
2239   reg = EMU->BUCTRL & ~(_EMU_BUCTRL_EN_MASK);  in EMU_BUEnableSet()
2240   reg |= (enable << _EMU_BUCTRL_EN_SHIFT);  in EMU_BUEnableSet()
2241   EMU->BUCTRL = reg;  in EMU_BUEnableSet()
2270   volatile uint32_t *reg;  in dcdcConstCalibrationLoad()  local
2282     reg = (volatile uint32_t *)*diCal_EMU_DCDCLNFREQCTRL;  in dcdcConstCalibrationLoad()
2283     *reg = val;  in dcdcConstCalibrationLoad()
2286     reg = (volatile uint32_t *)*diCal_EMU_DCDCLNVCTRL;  in dcdcConstCalibrationLoad()
2287     *reg = val;  in dcdcConstCalibrationLoad()
2290     reg = (volatile uint32_t *)*diCal_EMU_DCDCLPCTRL;  in dcdcConstCalibrationLoad()
2291     *reg = val;  in dcdcConstCalibrationLoad()
2294     reg = (volatile uint32_t *)*diCal_EMU_DCDCLPVCTRL;  in dcdcConstCalibrationLoad()
2295     *reg = val;  in dcdcConstCalibrationLoad()
2298     reg = (volatile uint32_t *)*diCal_EMU_DCDCTRIM0;  in dcdcConstCalibrationLoad()
2299     *reg = val;  in dcdcConstCalibrationLoad()
2302     reg = (volatile uint32_t *)*diCal_EMU_DCDCTRIM1;  in dcdcConstCalibrationLoad()
2303     *reg = val;  in dcdcConstCalibrationLoad()
3954   uint32_t volatile * reg;  in EMU_VmonEnable()  local
3959       reg = &(EMU->VMONAVDDCTRL);  in EMU_VmonEnable()
3963       reg = &(EMU->VMONALTAVDDCTRL);  in EMU_VmonEnable()
3967       reg = &(EMU->VMONDVDDCTRL);  in EMU_VmonEnable()
3971       reg = &(EMU->VMONIO0CTRL);  in EMU_VmonEnable()
3976       reg = &(EMU->VMONIO1CTRL);  in EMU_VmonEnable()
3982       reg = &(EMU->VMONBUVDDCTRL);  in EMU_VmonEnable()
3991   BUS_RegBitWrite(reg, bit, (uint32_t)enable);  in EMU_VmonEnable()