Lines Matching refs:CMU_CLKEN0_DCDC
3290 CMU->CLKEN0_SET = CMU_CLKEN0_DCDC; in EMU_DCDCBoostInit()
3333 dcdcClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_DCDC) != 0); in EMU_EM01BoostPeakCurrentSet()
3334 CMU->CLKEN0_SET = CMU_CLKEN0_DCDC; in EMU_EM01BoostPeakCurrentSet()
3353 CMU->CLKEN0_CLR = CMU_CLKEN0_DCDC; in EMU_EM01BoostPeakCurrentSet()
3412 CMU->CLKEN0_SET = CMU_CLKEN0_DCDC; in EMU_DCDCModeSet()
3488 CMU->CLKEN0_SET = CMU_CLKEN0_DCDC; in EMU_DCDCInit()
3556 dcdcClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_DCDC) != 0); in EMU_EM01PeakCurrentSet()
3557 CMU->CLKEN0_SET = CMU_CLKEN0_DCDC; in EMU_EM01PeakCurrentSet()
3591 CMU->CLKEN0_CLR = CMU_CLKEN0_DCDC; in EMU_EM01PeakCurrentSet()
3617 dcdcClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_DCDC) != 0); in EMU_DCDCSetPFMXModePeakCurrent()
3618 CMU->CLKEN0_SET = CMU_CLKEN0_DCDC; in EMU_DCDCSetPFMXModePeakCurrent()
3636 CMU->CLKEN0_CLR = CMU_CLKEN0_DCDC; in EMU_DCDCSetPFMXModePeakCurrent()
3656 dcdcClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_DCDC) != 0); in EMU_DCDCSetPFMXTimeoutMaxCtrl()
3657 CMU->CLKEN0_SET = CMU_CLKEN0_DCDC; in EMU_DCDCSetPFMXTimeoutMaxCtrl()
3675 CMU->CLKEN0_CLR = CMU_CLKEN0_DCDC; in EMU_DCDCSetPFMXTimeoutMaxCtrl()