Lines Matching refs:EFM_ASSERT
297 EFM_ASSERT(cycles <= (_CMU_CALCTRL_CALTOP_MASK in CMU_Calibrate()
300 EFM_ASSERT(cycles <= (_CMU_CALTOP_CALTOP_MASK in CMU_Calibrate()
349 EFM_ASSERT(downCycles <= (_CMU_CALCTRL_CALTOP_MASK in CMU_CalibrateConfig()
353 EFM_ASSERT(downCycles <= (_CMU_CALTOP_CALTOP_MASK >> _CMU_CALTOP_CALTOP_SHIFT)); in CMU_CalibrateConfig()
404 EFM_ASSERT(false); in CMU_CalibrateConfig()
451 EFM_ASSERT(false); in CMU_CalibrateConfig()
516 EFM_ASSERT(pin <= 15U); in CMU_ClkOutPinConfig()
521 EFM_ASSERT((port == 2U) || (port == 3U)); in CMU_ClkOutPinConfig()
524 EFM_ASSERT((port == 0U) || (port == 1U)); in CMU_ClkOutPinConfig()
527 EFM_ASSERT(false); in CMU_ClkOutPinConfig()
555 EFM_ASSERT((clkDiv > 0U) && (clkDiv <= 32U)); in CMU_ClkOutPinConfig()
579 EFM_ASSERT(false); in CMU_ClkOutPinConfig()
636 EFM_ASSERT(false); in CMU_ClockDivGet()
645 EFM_ASSERT(false); in CMU_ClockDivGet()
661 EFM_ASSERT(false); in CMU_ClockDivGet()
709 EFM_ASSERT((div == 1U) || (div == 2U) || (div == 4U)); in CMU_ClockDivSet()
711 EFM_ASSERT((div == 1U) || (div == 2U) || (div == 4U) in CMU_ClockDivSet()
754 EFM_ASSERT((div == 1U) || (div == 2U) || (div == 3U) || (div == 4U)); in CMU_ClockDivSet()
756 EFM_ASSERT((div == 1U) || (div == 2U) || (div == 4U)); in CMU_ClockDivSet()
774 EFM_ASSERT((div >= 1U) && (div <= 32U)); in CMU_ClockDivSet()
780 EFM_ASSERT((div == 1U) || (div == 2U)); in CMU_ClockDivSet()
786 EFM_ASSERT(false); in CMU_ClockDivSet()
815 EFM_ASSERT(false); /* No enable for this clock. */ in CMU_ClockEnable()
829 EFM_ASSERT(false); in CMU_ClockEnable()
940 EFM_ASSERT(false); in CMU_ClockFreqGet()
1172 EFM_ASSERT(false); in CMU_ClockFreqGet()
1222 EFM_ASSERT(false); in CMU_ClockSelectGet()
1401 EFM_ASSERT(false); in CMU_ClockSelectGet()
1585 EFM_ASSERT(false); in CMU_ClockSelectSet()
1658 EFM_ASSERT(false); in CMU_ClockSelectSet()
1721 EFM_ASSERT(false); in CMU_ClockSelectSet()
1761 EFM_ASSERT(false); in CMU_ClockSelectSet()
1793 EFM_ASSERT(false); in CMU_ClockSelectSet()
1827 EFM_ASSERT(false); in CMU_ClockSelectSet()
1868 EFM_ASSERT(false); in CMU_ClockSelectSet()
1904 EFM_ASSERT(false); in CMU_ClockSelectSet()
1940 EFM_ASSERT(false); in CMU_ClockSelectSet()
1968 EFM_ASSERT(false); in CMU_ClockSelectSet()
2017 EFM_ASSERT(false); in CMU_ClockSelectSet()
2053 EFM_ASSERT(false); in CMU_ClockSelectSet()
2109 EFM_ASSERT(false); in CMU_ClockSelectSet()
2158 EFM_ASSERT(false); in CMU_ClockSelectSet()
2188 EFM_ASSERT(false); in CMU_ClockSelectSet()
2220 EFM_ASSERT(false); in CMU_ClockSelectSet()
2248 EFM_ASSERT(false); in CMU_ClockSelectSet()
2274 EFM_ASSERT(false); in CMU_ClockSelectSet()
2298 EFM_ASSERT(false); in CMU_ClockSelectSet()
2320 EFM_ASSERT(false); in CMU_ClockSelectSet()
2339 EFM_ASSERT(false); in CMU_ClockSelectSet()
2361 EFM_ASSERT(false); in CMU_ClockSelectSet()
2370 EFM_ASSERT(false); in CMU_ClockSelectSet()
2501 EFM_ASSERT((freqCal != 0UL) && (freqCal != UINT_MAX)); in CMU_HFRCODPLLBandSet()
2573 EFM_ASSERT(hfrcoFreqRangeExpected == hfrcoFreqRangeActual); in CMU_HFRCODPLLBandSet()
2590 EFM_ASSERT(sysFreq <= (uint32_t)freq); in CMU_HFRCODPLLBandSet()
2656 EFM_ASSERT(init->frequency >= hfrcoCalTable[0].minFreq); in CMU_DPLLLock()
2657 EFM_ASSERT(init->frequency in CMU_DPLLLock()
2660 EFM_ASSERT(init->n > 300U); in CMU_DPLLLock()
2661 EFM_ASSERT(init->n <= (_DPLL_CFG1_N_MASK >> _DPLL_CFG1_N_SHIFT)); in CMU_DPLLLock()
2662 EFM_ASSERT(init->m <= (_DPLL_CFG1_M_MASK >> _DPLL_CFG1_M_SHIFT)); in CMU_DPLLLock()
2667 EFM_ASSERT(false); in CMU_DPLLLock()
2681 EFM_ASSERT(false); in CMU_DPLLLock()
2738 EFM_ASSERT(hfrcoFreqRangeExpected == hfrcoFreqRangeActual); in CMU_DPLLLock()
2790 EFM_ASSERT(sysFreq <= init->frequency); in CMU_DPLLLock()
2791 EFM_ASSERT(sysFreq <= SystemHFRCODPLLClockGet()); in CMU_DPLLLock()
2792 EFM_ASSERT(init->frequency == SystemHFRCODPLLClockGet()); in CMU_DPLLLock()
2878 EFM_ASSERT(CMU_ClockSelectGet(cmuClock_SYSCLK) != cmuSelect_RFFPLLSYS); in CMU_RFFPLLInit()
2879 EFM_ASSERT(pllInit->dividerY >= 8 && pllInit->dividerY <= 31); in CMU_RFFPLLInit()
2880 EFM_ASSERT(pllInit->dividerX >= 4 && pllInit->dividerX <= 15); in CMU_RFFPLLInit()
2881 EFM_ASSERT(pllInit->dividerN >= 32 && pllInit->dividerN <= 127); in CMU_RFFPLLInit()
2925 EFM_ASSERT(hfxoInit->timeoutCbLsb in CMU_HFXOInit()
2928 EFM_ASSERT(hfxoInit->timeoutSteadyFirstLock in CMU_HFXOInit()
2931 EFM_ASSERT(hfxoInit->timeoutSteady in CMU_HFXOInit()
2934 EFM_ASSERT(hfxoInit->ctuneXoStartup in CMU_HFXOInit()
2937 EFM_ASSERT(hfxoInit->ctuneXiStartup in CMU_HFXOInit()
2940 EFM_ASSERT(hfxoInit->coreBiasStartup in CMU_HFXOInit()
2943 EFM_ASSERT(hfxoInit->imCoreBiasStartup in CMU_HFXOInit()
2946 EFM_ASSERT(hfxoInit->coreDegenAna in CMU_HFXOInit()
2949 EFM_ASSERT(hfxoInit->ctuneFixAna in CMU_HFXOInit()
2952 EFM_ASSERT(hfxoInit->mode in CMU_HFXOInit()
3161 EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin)); in CMU_HFXOStartCrystalSharingLeader()
3221 EFM_ASSERT(prsAsyncCh < PRS_ASYNC_CH_NUM); in CMU_HFXOCrystalSharingFollowerInit()
3222 EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin)); in CMU_HFXOCrystalSharingFollowerInit()
3236 EFM_ASSERT(false); in CMU_HFXOCrystalSharingFollowerInit()
3245 EFM_ASSERT(false); in CMU_HFXOCrystalSharingFollowerInit()
3507 EFM_ASSERT(lfxoInit->timeout in CMU_LFXOInit()
3509 EFM_ASSERT(lfxoInit->mode in CMU_LFXOInit()
3511 EFM_ASSERT(lfxoInit->gain in CMU_LFXOInit()
3513 EFM_ASSERT(lfxoInit->capTune in CMU_LFXOInit()
3714 EFM_ASSERT(false); in CMU_OscillatorTuningGet()
3749 EFM_ASSERT(val <= (_LFRCO_CAL_FREQTRIM_MASK in CMU_OscillatorTuningSet()
3763 EFM_ASSERT(val <= (_HFRCO_CAL_TUNING_MASK >> _HFRCO_CAL_TUNING_SHIFT)); in CMU_OscillatorTuningSet()
3773 EFM_ASSERT(val <= (_HFRCO_CAL_TUNING_MASK >> _HFRCO_CAL_TUNING_SHIFT)); in CMU_OscillatorTuningSet()
3786 EFM_ASSERT(val <= (_HFXO_XTALCTRL_COREBIASANA_MASK >> _HFXO_XTALCTRL_COREBIASANA_SHIFT)); in CMU_OscillatorTuningSet()
3788 EFM_ASSERT((HFXO0->STATUS & HFXO_STATUS_ENS) == 0); in CMU_OscillatorTuningSet()
3820 EFM_ASSERT(val <= (_LFXO_CAL_CAPTUNE_MASK >> _LFXO_CAL_CAPTUNE_SHIFT)); in CMU_OscillatorTuningSet()
3837 EFM_ASSERT(false); in CMU_OscillatorTuningSet()
3923 EFM_ASSERT((freqCal != 0UL) && (freqCal != UINT_MAX)); in CMU_HFRCOEM23BandSet()
4008 EFM_ASSERT(false); in em01GrpbClkGet()
4050 EFM_ASSERT(false); in euart0ClkGet()
4131 EFM_ASSERT(false); in eusart0ClkGet()
4196 EFM_ASSERT(false); in em01GrpcClkGet()
4244 EFM_ASSERT(false); in lcdClkGet()
4296 EFM_ASSERT(false); in vdac0ClkGet()
4347 EFM_ASSERT(false); in vdac1ClkGet()
4390 EFM_ASSERT(false); in pcnt0ClkGet()
4432 EFM_ASSERT(false); in lesenseHFClkGet()
4521 EFM_ASSERT(false); in HFRCOEM23DevinfoGet()
4575 EFM_ASSERT(false); in traceClkGet()
4629 EFM_ASSERT(false); in dpllRefClkGet()
4700 EFM_ASSERT(false); in em01GrpaClkGet()
4750 EFM_ASSERT(false); in em23GrpaClkGet()
4800 EFM_ASSERT(false); in em4GrpaClkGet()
4998 EFM_ASSERT(false); in HFRCODPLLDevinfoGet()
5041 EFM_ASSERT(false); in iadcClkGet()
5114 EFM_ASSERT(false); in rtccClkGet()
5166 EFM_ASSERT(false); in sysrtcClkGet()
5231 EFM_ASSERT(false); in wdog0ClkGet()
5287 EFM_ASSERT(false); in wdog1ClkGet()
5365 EFM_ASSERT(false); in usbClkGet()
5656 EFM_ASSERT(false); in maxFreqHfle()
5698 EFM_ASSERT((_GENERIC_HFLE_WS_MASK >> _GENERIC_HFLE_WS_SHIFT) == 0x1U); in setHfLeConfig()
5788 EFM_ASSERT(false); in auxClkGet()
5846 EFM_ASSERT(false); in dbgClkGet()
5878 EFM_ASSERT(false); in adcAsyncClkGet()
5901 EFM_ASSERT(false); in adcAsyncClkGet()
5943 EFM_ASSERT(false); in sdioRefClkGet()
5970 EFM_ASSERT(false); in qspiRefClkGet()
5993 EFM_ASSERT(false); in qspiRefClkGet()
6031 EFM_ASSERT(false); in pdmRefClkGet()
6080 EFM_ASSERT(false); in usbRateClkGet()
6164 EFM_ASSERT(false); in flashWaitStateControl()
6419 EFM_ASSERT(false); in lfClkGet()
6433 EFM_ASSERT(false); in lfClkGet()
6443 EFM_ASSERT(false); in lfClkGet()
6454 EFM_ASSERT(false); in lfClkGet()
6466 EFM_ASSERT(false); in lfClkGet()
6509 EFM_ASSERT(false); in lfClkGet()
6548 EFM_ASSERT(false); in lfClkGet()
6753 EFM_ASSERT(false); in CMU_AUXHFRCOBandSet()
6850 EFM_ASSERT((freqCal != 0UL) && (freqCal != UINT_MAX)); in CMU_AUXHFRCOBandSet()
6907 EFM_ASSERT(HFCycles <= (_CMU_CALCNT_CALCNT_MASK >> _CMU_CALCNT_CALCNT_SHIFT)); in CMU_Calibrate()
6944 EFM_ASSERT(false); in CMU_Calibrate()
7002 EFM_ASSERT(downCycles <= (_CMU_CALCNT_CALCNT_MASK >> _CMU_CALCNT_CALCNT_SHIFT)); in CMU_CalibrateConfig()
7039 EFM_ASSERT(false); in CMU_CalibrateConfig()
7081 EFM_ASSERT(false); in CMU_CalibrateConfig()
7215 EFM_ASSERT(false); in CMU_ClockDivGet()
7240 EFM_ASSERT(false); in CMU_ClockDivGet()
7247 EFM_ASSERT(false); in CMU_ClockDivGet()
7292 EFM_ASSERT((div >= cmuClkDiv_1) && (div <= cmuClkDiv_8)); in CMU_ClockDivSet()
7311 EFM_ASSERT((div >= cmuClkDiv_1) && (div <= cmuClkDiv_512)); in CMU_ClockDivSet()
7333 EFM_ASSERT((div >= cmuClkDiv_1) && (div <= cmuClkDiv_512)); in CMU_ClockDivSet()
7363 EFM_ASSERT(div <= cmuClkDiv_32768); in CMU_ClockDivSet()
7377 EFM_ASSERT(div <= cmuClkDiv_32768); in CMU_ClockDivSet()
7392 EFM_ASSERT((div >= cmuClkDiv_16) && (div <= cmuClkDiv_128)); in CMU_ClockDivSet()
7408 EFM_ASSERT(div <= cmuClkDiv_8); in CMU_ClockDivSet()
7422 EFM_ASSERT(false); in CMU_ClockDivSet()
7431 EFM_ASSERT(div <= cmuClkDiv_8); in CMU_ClockDivSet()
7446 EFM_ASSERT(div <= cmuClkDiv_8); in CMU_ClockDivSet()
7460 EFM_ASSERT(false); in CMU_ClockDivSet()
7466 EFM_ASSERT(false); in CMU_ClockDivSet()
7600 EFM_ASSERT(false); in CMU_ClockEnable()
7904 EFM_ASSERT(false); in CMU_ClockFreqGet()
8020 EFM_ASSERT(false); in CMU_ClockPrescGet()
8056 EFM_ASSERT(false); in CMU_ClockPrescGet()
8071 EFM_ASSERT(false); in CMU_ClockPrescGet()
8095 EFM_ASSERT(false); in CMU_ClockPrescGet()
8108 EFM_ASSERT(false); in CMU_ClockPrescGet()
8149 EFM_ASSERT(presc < 32U); in CMU_ClockPrescSet()
8171 EFM_ASSERT(presc < 32U); in CMU_ClockPrescSet()
8184 EFM_ASSERT(presc < 512U); in CMU_ClockPrescSet()
8191 EFM_ASSERT(presc < 512U); in CMU_ClockPrescSet()
8199 EFM_ASSERT(presc < 512U); in CMU_ClockPrescSet()
8206 EFM_ASSERT(presc < 512U); in CMU_ClockPrescSet()
8224 EFM_ASSERT(presc <= 32768U); in CMU_ClockPrescSet()
8241 EFM_ASSERT(presc <= _CMU_LFEPRESC0_RTCC_DIV4); in CMU_ClockPrescSet()
8243 EFM_ASSERT(presc <= _CMU_LFEPRESC0_RTCC_DIV2); in CMU_ClockPrescSet()
8245 EFM_ASSERT(presc <= 0U); in CMU_ClockPrescSet()
8254 EFM_ASSERT(presc <= 32768U); in CMU_ClockPrescSet()
8270 EFM_ASSERT(presc <= 32768U); in CMU_ClockPrescSet()
8285 EFM_ASSERT(presc <= 32768U); in CMU_ClockPrescSet()
8300 EFM_ASSERT(presc <= 8U); in CMU_ClockPrescSet()
8316 EFM_ASSERT(presc <= 32768U); in CMU_ClockPrescSet()
8330 EFM_ASSERT(false); in CMU_ClockPrescSet()
8339 EFM_ASSERT(presc <= 8U); in CMU_ClockPrescSet()
8354 EFM_ASSERT(presc <= 8U); in CMU_ClockPrescSet()
8369 EFM_ASSERT((presc <= 127U) && (presc >= 15U)); in CMU_ClockPrescSet()
8384 EFM_ASSERT(false); in CMU_ClockPrescSet()
8394 EFM_ASSERT(presc <= _CMU_LFEPRESC0_RTCC_DIV4); in CMU_ClockPrescSet()
8396 EFM_ASSERT(presc <= _CMU_LFEPRESC0_RTCC_DIV2); in CMU_ClockPrescSet()
8398 EFM_ASSERT(presc <= 0U); in CMU_ClockPrescSet()
8410 EFM_ASSERT(false); in CMU_ClockPrescSet()
8421 EFM_ASSERT(presc <= 3); in CMU_ClockPrescSet()
8429 EFM_ASSERT(presc <= 3); in CMU_ClockPrescSet()
8435 EFM_ASSERT(false); in CMU_ClockPrescSet()
8443 EFM_ASSERT(presc <= _CMU_HFBUSPRESC_MASK >> _CMU_HFBUSPRESC_PRESC_SHIFT); in CMU_ClockPrescSet()
8450 EFM_ASSERT(false); in CMU_ClockPrescSet()
8961 EFM_ASSERT(false); in CMU_ClockSelectGet()
9018 EFM_ASSERT(false); in sli_em_cmu_HFClockSelectLFOsc()
9519 EFM_ASSERT(false); in CMU_ClockSelectSet()
9524 EFM_ASSERT(false); in CMU_ClockSelectSet()
9587 EFM_ASSERT(ref != cmuSelect_HFCLKLE); in CMU_ClockSelectSet()
9595 EFM_ASSERT(ref != cmuSelect_HFCLKLE); in CMU_ClockSelectSet()
9603 EFM_ASSERT(ref != cmuSelect_HFCLKLE); in CMU_ClockSelectSet()
9646 EFM_ASSERT(false); in CMU_ClockSelectSet()
9693 EFM_ASSERT(false); in CMU_ClockSelectSet()
9742 EFM_ASSERT(false); in CMU_ClockSelectSet()
9784 EFM_ASSERT(false); in CMU_ClockSelectSet()
9847 EFM_ASSERT(false); in CMU_ClockSelectSet()
9878 EFM_ASSERT(false); in CMU_ClockSelectSet()
9913 EFM_ASSERT(false); in CMU_ClockSelectSet()
9952 EFM_ASSERT(false); in CMU_ClockSelectSet()
9991 EFM_ASSERT(false); in CMU_ClockSelectSet()
10018 EFM_ASSERT(SystemHFXOClockGet() <= 25000000u); in CMU_ClockSelectSet()
10049 EFM_ASSERT(false); in CMU_ClockSelectSet()
10082 EFM_ASSERT(false); in CMU_ClockSelectSet()
10093 EFM_ASSERT(false); in CMU_ClockSelectSet()
10214 EFM_ASSERT(init->frequency >= hfrcoCtrlTable[0].minFreq); in CMU_DPLLLock()
10215 EFM_ASSERT(init->frequency in CMU_DPLLLock()
10217 EFM_ASSERT(init->n > 300U); in CMU_DPLLLock()
10218 EFM_ASSERT(init->n <= (_CMU_DPLLCTRL1_N_MASK >> _CMU_DPLLCTRL1_N_SHIFT)); in CMU_DPLLLock()
10219 EFM_ASSERT(init->m <= (_CMU_DPLLCTRL1_M_MASK >> _CMU_DPLLCTRL1_M_SHIFT)); in CMU_DPLLLock()
10220 EFM_ASSERT(init->ssInterval <= (_CMU_HFRCOSS_SSINV_MASK in CMU_DPLLLock()
10222 EFM_ASSERT(init->ssAmplitude <= (_CMU_HFRCOSS_SSAMP_MASK in CMU_DPLLLock()
10228 EFM_ASSERT(false); in CMU_DPLLLock()
10242 EFM_ASSERT(false); in CMU_DPLLLock()
10313 EFM_ASSERT(sysFreq <= init->frequency); in CMU_DPLLLock()
10314 EFM_ASSERT(sysFreq <= SystemHfrcoFreq); in CMU_DPLLLock()
10315 EFM_ASSERT(init->frequency == SystemHfrcoFreq); in CMU_DPLLLock()
10451 EFM_ASSERT(false); in CMU_HFRCOBandSet()
10579 EFM_ASSERT((freqCal != 0UL) && (freqCal != UINT_MAX)); in CMU_HFRCOBandSet()
10596 EFM_ASSERT(freqCal != UINT_MAX); in CMU_HFRCOBandSet()
10640 EFM_ASSERT(sysFreq <= (uint32_t)setFreq); in CMU_HFRCOBandSet()
10641 EFM_ASSERT(sysFreq <= SystemHfrcoFreq); in CMU_HFRCOBandSet()
10642 EFM_ASSERT((uint32_t)setFreq == SystemHfrcoFreq); in CMU_HFRCOBandSet()
10691 EFM_ASSERT(delay <= 31); in CMU_HFRCOStartupDelaySet()
10767 EFM_ASSERT((freqCal != 0) && (freqCal != UINT_MAX)); in CMU_USHFRCOBandSet()
10809 EFM_ASSERT((EMU->CTRL & _EMU_CTRL_EM23VSCALE_MASK) == EMU_CTRL_EM23VSCALE_VSCALE2); in CMU_HFXOAutostartEnable()
10867 EFM_ASSERT(CMU_ClockSelectGet(cmuClock_HF) != cmuSelect_HFXO); in CMU_HFXOInit()
10887 EFM_ASSERT(false); /* Unsupported configuration */ in CMU_HFXOInit()
10928 EFM_ASSERT(hfxoInit->mode != cmuOscMode_AcCoupled); in CMU_HFXOInit()
11021 EFM_ASSERT(div <= cmuClkDiv_128); in CMU_LCDClkFDIVSet()
11051 EFM_ASSERT(CMU_ClockSelectGet(cmuClock_HF) != cmuSelect_LFXO); in CMU_LFXOInit()
11243 EFM_ASSERT(false); in CMU_OscillatorEnable()
11257 EFM_ASSERT(false); in CMU_OscillatorEnable()
11272 EFM_ASSERT((EMU->PWRCTRL & EMU_PWRCTRL_REGPWRSEL_DVDD) != 0UL); in CMU_OscillatorEnable()
11403 EFM_ASSERT(false); in CMU_OscillatorTuningGet()
11444 EFM_ASSERT(val <= (_CMU_LFRCOCTRL_TUNING_MASK in CMU_OscillatorTuningSet()
11457 EFM_ASSERT(val <= (_CMU_HFRCOCTRL_TUNING_MASK in CMU_OscillatorTuningSet()
11471 EFM_ASSERT(val <= (_CMU_USHFRCOCTRL_TUNING_MASK in CMU_OscillatorTuningSet()
11484 EFM_ASSERT(val <= (_CMU_AUXHFRCOCTRL_TUNING_MASK in CMU_OscillatorTuningSet()
11500 EFM_ASSERT((CMU->STATUS & CMU_STATUS_HFXOENS) == 0UL); in CMU_OscillatorTuningSet()
11527 EFM_ASSERT(val <= (_CMU_LFXOCTRL_TUNING_MASK >> _CMU_LFXOCTRL_TUNING_SHIFT)); in CMU_OscillatorTuningSet()
11541 EFM_ASSERT(false); in CMU_OscillatorTuningSet()
11565 EFM_ASSERT(osc == cmuOsc_HFXO); in CMU_OscillatorTuningWait()
11592 EFM_ASSERT(false); in CMU_OscillatorTuningWait()
11646 EFM_ASSERT(false); in CMU_OscillatorTuningOptimize()
11709 EFM_ASSERT(instance < (unsigned)PCNT_COUNT); in CMU_PCNTClockExternalSet()
11765 EFM_ASSERT(CMU_ClockSelectGet(cmuClock_HF) != cmuSelect_USHFRCODIV2); in CMU_USHFRCOBandSet()
11790 EFM_ASSERT(false); in CMU_USHFRCOBandSet()